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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S -passes=constraint-elimination < %s | FileCheck %s3 4define void @multiple_pow2(i64 %count) {5; CHECK-LABEL: define void @multiple_pow2(6; CHECK-SAME: i64 [[COUNT:%.*]]) {7; CHECK-NEXT: entry:8; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 29; CHECK-NEXT: br label [[LOOP:%.*]]10; CHECK: loop:11; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]12; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 413; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]14; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP_LATCH]]15; CHECK: loop.latch:16; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT]]17; CHECK: exit:18; CHECK-NEXT: ret void19;20entry:21 %end = shl i64 %count, 222 br label %loop23 24loop:25 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]26 %iv.next = add i64 %iv, 427 %cmp.i.not = icmp eq i64 %iv, %end28 br i1 %cmp.i.not, label %exit, label %loop.latch29 30loop.latch:31 %cmp2.i.i = icmp ult i64 %iv, %end32 br i1 %cmp2.i.i, label %loop, label %exit33 34exit:35 ret void36}37 38define void @multiple_pow2_larger_than_needed(i64 %count) {39; CHECK-LABEL: define void @multiple_pow2_larger_than_needed(40; CHECK-SAME: i64 [[COUNT:%.*]]) {41; CHECK-NEXT: entry:42; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 343; CHECK-NEXT: br label [[LOOP:%.*]]44; CHECK: loop:45; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]46; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 447; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]48; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP_LATCH]]49; CHECK: loop.latch:50; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT]]51; CHECK: exit:52; CHECK-NEXT: ret void53;54entry:55 %end = shl i64 %count, 356 br label %loop57 58loop:59 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]60 %iv.next = add i64 %iv, 461 %cmp.i.not = icmp eq i64 %iv, %end62 br i1 %cmp.i.not, label %exit, label %loop.latch63 64loop.latch:65 %cmp2.i.i = icmp ult i64 %iv, %end66 br i1 %cmp2.i.i, label %loop, label %exit67 68exit:69 ret void70}71 72define void @multiple_pow2_too_small(i64 %count) {73; CHECK-LABEL: define void @multiple_pow2_too_small(74; CHECK-SAME: i64 [[COUNT:%.*]]) {75; CHECK-NEXT: entry:76; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 177; CHECK-NEXT: br label [[LOOP:%.*]]78; CHECK: loop:79; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]80; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 481; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]82; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP_LATCH]]83; CHECK: loop.latch:84; CHECK-NEXT: [[CMP2_I_I:%.*]] = icmp ult i64 [[IV]], [[END]]85; CHECK-NEXT: br i1 [[CMP2_I_I]], label [[LOOP]], label [[EXIT]]86; CHECK: exit:87; CHECK-NEXT: ret void88;89entry:90 %end = shl i64 %count, 191 br label %loop92 93loop:94 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]95 %iv.next = add i64 %iv, 496 %cmp.i.not = icmp eq i64 %iv, %end97 br i1 %cmp.i.not, label %exit, label %loop.latch98 99loop.latch:100 %cmp2.i.i = icmp ult i64 %iv, %end101 br i1 %cmp2.i.i, label %loop, label %exit102 103exit:104 ret void105}106 107define void @multiple_pow2_start_offset(i64 %count) {108; CHECK-LABEL: define void @multiple_pow2_start_offset(109; CHECK-SAME: i64 [[COUNT:%.*]]) {110; CHECK-NEXT: entry:111; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 2112; CHECK-NEXT: [[PRECOND:%.*]] = icmp ugt i64 [[END]], 4113; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]114; CHECK: loop:115; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 4, [[ENTRY:%.*]] ]116; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4117; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]118; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]119; CHECK: loop.latch:120; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT]]121; CHECK: exit:122; CHECK-NEXT: ret void123;124entry:125 %end = shl i64 %count, 2126 %precond = icmp ugt i64 %end, 4127 br i1 %precond, label %loop, label %exit128 129loop:130 %iv = phi i64 [ %iv.next, %loop.latch ], [ 4, %entry ]131 %iv.next = add i64 %iv, 4132 %cmp.i.not = icmp eq i64 %iv, %end133 br i1 %cmp.i.not, label %exit, label %loop.latch134 135loop.latch:136 %cmp2.i.i = icmp ult i64 %iv, %end137 br i1 %cmp2.i.i, label %loop, label %exit138 139exit:140 ret void141}142 143define void @multiple_pow2_wrong_start_offset(i64 %count) {144; CHECK-LABEL: define void @multiple_pow2_wrong_start_offset(145; CHECK-SAME: i64 [[COUNT:%.*]]) {146; CHECK-NEXT: entry:147; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 2148; CHECK-NEXT: [[PRECOND:%.*]] = icmp ugt i64 [[END]], 1149; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]150; CHECK: loop:151; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 1, [[ENTRY:%.*]] ]152; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4153; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]154; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]155; CHECK: loop.latch:156; CHECK-NEXT: [[CMP2_I_I:%.*]] = icmp ult i64 [[IV]], [[END]]157; CHECK-NEXT: br i1 [[CMP2_I_I]], label [[LOOP]], label [[EXIT]]158; CHECK: exit:159; CHECK-NEXT: ret void160;161entry:162 %end = shl i64 %count, 2163 %precond = icmp ugt i64 %end, 1164 br i1 %precond, label %loop, label %exit165 166loop:167 %iv = phi i64 [ %iv.next, %loop.latch ], [ 1, %entry ]168 %iv.next = add i64 %iv, 4169 %cmp.i.not = icmp eq i64 %iv, %end170 br i1 %cmp.i.not, label %exit, label %loop.latch171 172loop.latch:173 %cmp2.i.i = icmp ult i64 %iv, %end174 br i1 %cmp2.i.i, label %loop, label %exit175 176exit:177 ret void178}179 180define void @multiple_pow2_start_offset_dynamic(i64 %count) {181; CHECK-LABEL: define void @multiple_pow2_start_offset_dynamic(182; CHECK-SAME: i64 [[COUNT:%.*]]) {183; CHECK-NEXT: entry:184; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[COUNT]], 2185; CHECK-NEXT: [[END:%.*]] = add i64 [[SHL]], 1186; CHECK-NEXT: [[PRECOND:%.*]] = icmp ne i64 [[END]], 0187; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]188; CHECK: loop:189; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 1, [[ENTRY:%.*]] ]190; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4191; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]192; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]193; CHECK: loop.latch:194; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT]]195; CHECK: exit:196; CHECK-NEXT: ret void197;198entry:199 %shl = shl i64 %count, 2200 %end = add i64 %shl, 1201 %precond = icmp ne i64 %end, 0202 br i1 %precond, label %loop, label %exit203 204loop:205 %iv = phi i64 [ %iv.next, %loop.latch ], [ 1, %entry ]206 %iv.next = add i64 %iv, 4207 %cmp.i.not = icmp eq i64 %iv, %end208 br i1 %cmp.i.not, label %exit, label %loop.latch209 210loop.latch:211 %cmp2.i.i = icmp ult i64 %iv, %end212 br i1 %cmp2.i.i, label %loop, label %exit213 214exit:215 ret void216}217 218define void @multiple_non_pow2_nuw(i64 %count) {219; CHECK-LABEL: define void @multiple_non_pow2_nuw(220; CHECK-SAME: i64 [[COUNT:%.*]]) {221; CHECK-NEXT: entry:222; CHECK-NEXT: [[END:%.*]] = mul nuw i64 [[COUNT]], 3223; CHECK-NEXT: br label [[LOOP:%.*]]224; CHECK: loop:225; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]226; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 3227; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]228; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP_LATCH]]229; CHECK: loop.latch:230; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT]]231; CHECK: exit:232; CHECK-NEXT: ret void233;234entry:235 %end = mul nuw i64 %count, 3236 br label %loop237 238loop:239 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]240 %iv.next = add i64 %iv, 3241 %cmp.i.not = icmp eq i64 %iv, %end242 br i1 %cmp.i.not, label %exit, label %loop.latch243 244loop.latch:245 %cmp2.i.i = icmp ult i64 %iv, %end246 br i1 %cmp2.i.i, label %loop, label %exit247 248exit:249 ret void250}251 252define void @multiple_non_pow2_missing_nuw(i64 %count) {253; CHECK-LABEL: define void @multiple_non_pow2_missing_nuw(254; CHECK-SAME: i64 [[COUNT:%.*]]) {255; CHECK-NEXT: entry:256; CHECK-NEXT: [[END:%.*]] = mul i64 [[COUNT]], 3257; CHECK-NEXT: br label [[LOOP:%.*]]258; CHECK: loop:259; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]260; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 3261; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]262; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP_LATCH]]263; CHECK: loop.latch:264; CHECK-NEXT: [[CMP2_I_I:%.*]] = icmp ult i64 [[IV]], [[END]]265; CHECK-NEXT: br i1 [[CMP2_I_I]], label [[LOOP]], label [[EXIT]]266; CHECK: exit:267; CHECK-NEXT: ret void268;269entry:270 %end = mul i64 %count, 3271 br label %loop272 273loop:274 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]275 %iv.next = add i64 %iv, 3276 %cmp.i.not = icmp eq i64 %iv, %end277 br i1 %cmp.i.not, label %exit, label %loop.latch278 279loop.latch:280 %cmp2.i.i = icmp ult i64 %iv, %end281 br i1 %cmp2.i.i, label %loop, label %exit282 283exit:284 ret void285}286