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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s3 4declare void @llvm.assume(i1)5 6define i1 @test_mul_const_nuw_unsigned_1(i8 %start, i8 %high) {7; CHECK-LABEL: @test_mul_const_nuw_unsigned_1(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 410; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]11; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])12; CHECK-NEXT: ret i1 true13;14entry:15 %start.mul.4 = mul nuw i8 %start, 416 %c.1 = icmp ult i8 %start.mul.4, %high17 call void @llvm.assume(i1 %c.1)18 19 %t.1 = icmp ult i8 %start, %high20 ret i1 %t.121}22 23define i1 @test_mul_const_nuw_unsigned_2(i8 %start, i8 %high) {24; CHECK-LABEL: @test_mul_const_nuw_unsigned_2(25; CHECK-NEXT: entry:26; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 427; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]28; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])29; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 230; CHECK-NEXT: ret i1 true31;32entry:33 %start.mul.4 = mul nuw i8 %start, 434 %c.1 = icmp ult i8 %start.mul.4, %high35 call void @llvm.assume(i1 %c.1)36 37 %start.mul.2 = mul nuw i8 %start, 238 %t = icmp ult i8 %start.mul.2, %high39 ret i1 %t40}41 42define i1 @test_mul_const_nuw_unsigned_3(i8 %start, i8 %high) {43; CHECK-LABEL: @test_mul_const_nuw_unsigned_3(44; CHECK-NEXT: entry:45; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 446; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]47; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])48; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 249; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]50; CHECK-NEXT: ret i1 true51;52entry:53 %start.mul.4 = mul nuw i8 %start, 454 %c.1 = icmp ult i8 %start.mul.4, %high55 call void @llvm.assume(i1 %c.1)56 57 %start.mul.2 = mul nuw i8 %start, 258 %start.add.1 = add nuw i8 %start, %start59 %t = icmp ule i8 %start.add.1, %start.mul.260 ret i1 %t61}62 63 64define i1 @test_mul_const_nuw_unsigned_4(i8 %start, i8 %high) {65; CHECK-LABEL: @test_mul_const_nuw_unsigned_4(66; CHECK-NEXT: entry:67; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 468; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]69; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])70; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 271; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]72; CHECK-NEXT: ret i1 false73;74entry:75 %start.mul.4 = mul nuw i8 %start, 476 %c.1 = icmp ult i8 %start.mul.4, %high77 call void @llvm.assume(i1 %c.1)78 79 %start.mul.2 = mul nuw i8 %start, 280 %start.add.1 = add nuw i8 %start, %start81 %f = icmp ult i8 %start.add.1, %start.mul.282 ret i1 %f83}84 85 86define i1 @test_mul_const_nuw_unsigned_5(i8 %start, i8 %high) {87; CHECK-LABEL: @test_mul_const_nuw_unsigned_5(88; CHECK-NEXT: entry:89; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 490; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]91; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])92; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]93; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]94; CHECK-NEXT: ret i1 true95;96entry:97 %start.mul.4 = mul nuw i8 %start, 498 %c.1 = icmp ult i8 %start.mul.4, %high99 call void @llvm.assume(i1 %c.1)100 101 %start.add.1 = add nuw i8 %start, %start102 %start.add.2 = add nuw i8 %start.add.1, %start.add.1103 %t.4 = icmp ule i8 %start.add.2, %start.mul.4104 ret i1 %t.4105}106 107define i1 @test_mul_const_nuw_unsigned_6(i8 %start, i8 %high) {108; CHECK-LABEL: @test_mul_const_nuw_unsigned_6(109; CHECK-NEXT: entry:110; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 4111; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]112; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])113; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]114; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]115; CHECK-NEXT: ret i1 false116;117entry:118 %start.mul.4 = mul nuw i8 %start, 4119 %c.1 = icmp ult i8 %start.mul.4, %high120 call void @llvm.assume(i1 %c.1)121 122 %start.add.1 = add nuw i8 %start, %start123 %start.add.2 = add nuw i8 %start.add.1, %start.add.1124 %f.2 = icmp ult i8 %start.add.2, %start.mul.4125 ret i1 %f.2126}127 128define i1 @test_mul_const_nuw_unsigned_7(i8 %start, i8 %high) {129; CHECK-LABEL: @test_mul_const_nuw_unsigned_7(130; CHECK-NEXT: entry:131; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 4132; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]133; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])134; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2135; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]136; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]137; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1138; CHECK-NEXT: ret i1 false139;140entry:141 %start.mul.4 = mul nuw i8 %start, 4142 %c.1 = icmp ult i8 %start.mul.4, %high143 call void @llvm.assume(i1 %c.1)144 145 %start.mul.2 = mul nuw i8 %start, 2146 %start.add.1 = add nuw i8 %start, %start147 %start.add.2 = add nuw i8 %start.add.1, %start.add.1148 %start.add.2.1 = add nuw i8 %start.add.2, 1149 %f.3 = icmp ule i8 %start.add.2.1, %start.mul.4150 ret i1 %f.3151}152 153define i1 @test_mul_const_nuw_unsigned_8(i8 %start, i8 %high) {154; CHECK-LABEL: @test_mul_const_nuw_unsigned_8(155; CHECK-NEXT: entry:156; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 4157; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]158; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])159; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2160; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]161; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]162; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1163; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3164; CHECK-NEXT: ret i1 true165;166entry:167 %start.mul.4 = mul nuw i8 %start, 4168 %c.1 = icmp ult i8 %start.mul.4, %high169 call void @llvm.assume(i1 %c.1)170 171 %start.mul.2 = mul nuw i8 %start, 2172 %start.add.1 = add nuw i8 %start, %start173 %start.add.2 = add nuw i8 %start.add.1, %start.add.1174 %start.add.2.1 = add nuw i8 %start.add.2, 1175 %start.mul.3 = mul nuw i8 %start, 3176 %t.5 = icmp ule i8 %start.add.1, %start.mul.3177 ret i1 %t.5178}179 180define i1 @test_mul_const_nuw_unsigned_9(i8 %start, i8 %high) {181; CHECK-LABEL: @test_mul_const_nuw_unsigned_9(182; CHECK-NEXT: entry:183; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[START:%.*]], 4184; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]185; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])186; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2187; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]188; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]189; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1190; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3191; CHECK-NEXT: ret i1 false192;193entry:194 %start.mul.4 = mul nuw i8 %start, 4195 %c.1 = icmp ult i8 %start.mul.4, %high196 call void @llvm.assume(i1 %c.1)197 198 %start.mul.2 = mul nuw i8 %start, 2199 %start.add.1 = add nuw i8 %start, %start200 %start.add.2 = add nuw i8 %start.add.1, %start.add.1201 %start.add.2.1 = add nuw i8 %start.add.2, 1202 %start.mul.3 = mul nuw i8 %start, 3203 %f.5 = icmp ult i8 %start.add.2, %start.mul.3204 ret i1 %f.5205}206 207define i1 @test_mul_const_nuw_unsigned_10(i8 %start, i8 %high) {208; CHECK-LABEL: @test_mul_const_nuw_unsigned_10(209; CHECK-NEXT: entry:210; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START:%.*]], 5211; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]212; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])213; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3214; CHECK-NEXT: ret i1 true215;216entry:217 %start.mul.5 = mul nuw i8 %start, 5218 %c.0 = icmp ult i8 %start, %start.mul.5219 call void @llvm.assume(i1 %c.0)220 221 %start.mul.3 = mul nuw i8 %start, 3222 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5223 ret i1 %t.1224}225 226define i1 @test_mul_const_nuw_unsigned_11(i8 %start, i8 %high) {227; CHECK-LABEL: @test_mul_const_nuw_unsigned_11(228; CHECK-NEXT: entry:229; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START:%.*]], 5230; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]231; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])232; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3233; CHECK-NEXT: ret i1 false234;235entry:236 %start.mul.5 = mul nuw i8 %start, 5237 %c.0 = icmp ult i8 %start, %start.mul.5238 call void @llvm.assume(i1 %c.0)239 240 %start.mul.3 = mul nuw i8 %start, 3241 %c.1 = icmp ule i8 %start.mul.5, %start.mul.3242 ret i1 %c.1243}244 245define i1 @test_mul_const_nuw_unsigned_12(i8 %start) {246; CHECK-LABEL: @test_mul_const_nuw_unsigned_12(247; CHECK-NEXT: entry:248; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START:%.*]], 3249; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_MUL_3]]250; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])251; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START]], 5252; CHECK-NEXT: ret i1 true253;254entry:255 %start.mul.3 = mul nuw i8 %start, 3256 %c.1 = icmp ult i8 %start, %start.mul.3257 call void @llvm.assume(i1 %c.1)258 259 %start.mul.5 = mul nuw i8 %start, 5260 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5261 ret i1 %t.1262}263 264define i1 @test_mul_const_nuw_unsigned_13(i8 %start) {265; CHECK-LABEL: @test_mul_const_nuw_unsigned_13(266; CHECK-NEXT: entry:267; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START:%.*]], 3268; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_MUL_3]]269; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])270; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START]], 5271; CHECK-NEXT: ret i1 false272;273entry:274 %start.mul.3 = mul nuw i8 %start, 3275 %c.1 = icmp ult i8 %start, %start.mul.3276 call void @llvm.assume(i1 %c.1)277 278 %start.mul.5 = mul nuw i8 %start, 5279 %f.1 = icmp ule i8 %start.mul.5, %start.mul.3280 ret i1 %f.1281}282 283define i1 @test_mul_const_nuw_unsigned_14(i8 %start) {284; CHECK-LABEL: @test_mul_const_nuw_unsigned_14(285; CHECK-NEXT: entry:286; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START:%.*]], -5287; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]288; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])289; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], -3290; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]291; CHECK-NEXT: ret i1 [[T_1]]292;293entry:294 %start.mul.5 = mul nuw i8 %start, -5295 %c.0 = icmp ult i8 %start, %start.mul.5296 call void @llvm.assume(i1 %c.0)297 298 %start.mul.3 = mul nuw i8 %start, -3299 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5300 ret i1 %t.1301}302 303define i1 @test_mul_const_nuw_unsigned_15(i8 %start) {304; CHECK-LABEL: @test_mul_const_nuw_unsigned_15(305; CHECK-NEXT: entry:306; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START:%.*]], -5307; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]308; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])309; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], -3310; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]311; CHECK-NEXT: ret i1 [[C_1]]312;313entry:314 %start.mul.5 = mul nuw i8 %start, -5315 %c.0 = icmp ult i8 %start, %start.mul.5316 call void @llvm.assume(i1 %c.0)317 318 %start.mul.3 = mul nuw i8 %start, -3319 %c.1 = icmp ule i8 %start.mul.5, %start.mul.3320 ret i1 %c.1321}322 323define i1 @test_mul_const_nuw_nsw_unsigned_16(i8 %start) {324; CHECK-LABEL: @test_mul_const_nuw_nsw_unsigned_16(325; CHECK-NEXT: entry:326; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw nsw i8 [[START:%.*]], -5327; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]328; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])329; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw nsw i8 [[START]], -3330; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]331; CHECK-NEXT: ret i1 [[T_1]]332;333entry:334 %start.mul.5 = mul nuw nsw i8 %start, -5335 %c.0 = icmp ult i8 %start, %start.mul.5336 call void @llvm.assume(i1 %c.0)337 338 %start.mul.3 = mul nuw nsw i8 %start, -3339 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5340 ret i1 %t.1341}342 343define i1 @test_mul_const_nuw_nsw_unsigned_17(i8 %start) {344; CHECK-LABEL: @test_mul_const_nuw_nsw_unsigned_17(345; CHECK-NEXT: entry:346; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw nsw i8 [[START:%.*]], -5347; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]348; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])349; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw nsw i8 [[START]], -3350; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]351; CHECK-NEXT: ret i1 [[C_1]]352;353entry:354 %start.mul.5 = mul nuw nsw i8 %start, -5355 %c.0 = icmp ult i8 %start, %start.mul.5356 call void @llvm.assume(i1 %c.0)357 358 %start.mul.3 = mul nuw nsw i8 %start, -3359 %c.1 = icmp ule i8 %start.mul.5, %start.mul.3360 ret i1 %c.1361}362 363define i1 @test_mul_add_const_nuw_unsigned_1(i8 %start, i8 %high) {364; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_1(365; CHECK-NEXT: entry:366; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3367; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4368; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]369; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])370; CHECK-NEXT: ret i1 true371;372entry:373 %add = add nuw i8 %start, 3374 %start.mul.4 = mul nuw i8 %add, 4375 %c.1 = icmp ult i8 %start.mul.4, %high376 call void @llvm.assume(i1 %c.1)377 378 %t.1 = icmp ult i8 %start, %high379 ret i1 %t.1380}381 382define i1 @test_mul_add_const_nuw_unsigned_2(i8 %start, i8 %high) {383; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_2(384; CHECK-NEXT: entry:385; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3386; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4387; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]388; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])389; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2390; CHECK-NEXT: ret i1 true391;392entry:393 %add = add nuw i8 %start, 3394 %start.mul.4 = mul nuw i8 %add, 4395 %c.1 = icmp ult i8 %start.mul.4, %high396 call void @llvm.assume(i1 %c.1)397 398 %start.mul.2 = mul nuw i8 %start, 2399 %t.2 = icmp ult i8 %start.mul.2, %high400 ret i1 %t.2401}402 403define i1 @test_mul_add_const_nuw_unsigned_3(i8 %start, i8 %high) {404; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_3(405; CHECK-NEXT: entry:406; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3407; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4408; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]409; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])410; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]411; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]412; CHECK-NEXT: ret i1 true413;414entry:415 %add = add nuw i8 %start, 3416 %start.mul.4 = mul nuw i8 %add, 4417 %c.1 = icmp ult i8 %start.mul.4, %high418 call void @llvm.assume(i1 %c.1)419 420 %start.add.1 = add nuw i8 %start, %start421 %start.add.2 = add nuw i8 %start.add.1, %start.add.1422 %t.3 = icmp ule i8 %start.add.2, %start.mul.4423 ret i1 %t.3424}425 426define i1 @test_mul_add_const_nuw_unsigned_4(i8 %start, i8 %high) {427; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_4(428; CHECK-NEXT: entry:429; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3430; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4431; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]432; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])433; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2434; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]435; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]436; CHECK-NEXT: ret i1 true437;438entry:439 %add = add nuw i8 %start, 3440 %start.mul.4 = mul nuw i8 %add, 4441 %c.1 = icmp ult i8 %start.mul.4, %high442 call void @llvm.assume(i1 %c.1)443 444 %start.mul.2 = mul nuw i8 %start, 2445 %start.add.1 = add nuw i8 %start, %start446 %start.add.2 = add nuw i8 %start.add.1, %start.add.1447 %t.4 = icmp ult i8 %start.add.2, %start.mul.4448 ret i1 %t.4449}450 451define i1 @test_mul_add_const_nuw_unsigned_5(i8 %start, i8 %high) {452; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_5(453; CHECK-NEXT: entry:454; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3455; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4456; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]457; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])458; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]459; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]460; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nuw i8 [[START_ADD_2]], 12461; CHECK-NEXT: ret i1 true462;463entry:464 %add = add nuw i8 %start, 3465 %start.mul.4 = mul nuw i8 %add, 4466 %c.1 = icmp ult i8 %start.mul.4, %high467 call void @llvm.assume(i1 %c.1)468 469 %start.add.1 = add nuw i8 %start, %start470 %start.add.2 = add nuw i8 %start.add.1, %start.add.1471 %start.add.2.12 = add nuw i8 %start.add.2, 12472 %t.5 = icmp ule i8 %start.add.2.12, %start.mul.4473 ret i1 %t.5474}475 476define i1 @test_mul_add_const_nuw_unsigned_6(i8 %start, i8 %high) {477; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_6(478; CHECK-NEXT: entry:479; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3480; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nuw i8 [[ADD]], 4481; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]482; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])483; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]484; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]485; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nuw i8 [[START_ADD_2]], 13486; CHECK-NEXT: ret i1 false487;488entry:489 %add = add nuw i8 %start, 3490 %start.mul.4 = mul nuw i8 %add, 4491 %c.1 = icmp ult i8 %start.mul.4, %high492 call void @llvm.assume(i1 %c.1)493 494 %start.add.1 = add nuw i8 %start, %start495 %start.add.2 = add nuw i8 %start.add.1, %start.add.1496 %start.add.2.13 = add nuw i8 %start.add.2, 13497 %f.1 = icmp ule i8 %start.add.2.13, %start.mul.4498 ret i1 %f.1499}500 501define i1 @test_mul_const_nsw_unsigned_1(i8 %start, i8 %high) {502; CHECK-LABEL: @test_mul_const_nsw_unsigned_1(503; CHECK-NEXT: entry:504; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4505; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]506; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])507; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]508; CHECK-NEXT: ret i1 [[T_1]]509;510entry:511 %start.mul.4 = mul nsw i8 %start, 4512 %c.1 = icmp ult i8 %start.mul.4, %high513 call void @llvm.assume(i1 %c.1)514 515 %t.1 = icmp ult i8 %start, %high516 ret i1 %t.1517}518 519define i1 @test_mul_const_nsw_unsigned_2(i8 %start, i8 %high) {520; CHECK-LABEL: @test_mul_const_nsw_unsigned_2(521; CHECK-NEXT: entry:522; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4523; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]524; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])525; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2526; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_MUL_2]], [[HIGH]]527; CHECK-NEXT: ret i1 [[T]]528;529entry:530 %start.mul.4 = mul nsw i8 %start, 4531 %c.1 = icmp ult i8 %start.mul.4, %high532 call void @llvm.assume(i1 %c.1)533 534 %start.mul.2 = mul nsw i8 %start, 2535 %t = icmp ult i8 %start.mul.2, %high536 ret i1 %t537}538 539define i1 @test_mul_const_nsw_unsigned_3(i8 %start, i8 %high) {540; CHECK-LABEL: @test_mul_const_nsw_unsigned_3(541; CHECK-NEXT: entry:542; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4543; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]544; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])545; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2546; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]547; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_MUL_2]]548; CHECK-NEXT: ret i1 [[T]]549;550entry:551 %start.mul.4 = mul nsw i8 %start, 4552 %c.1 = icmp ult i8 %start.mul.4, %high553 call void @llvm.assume(i1 %c.1)554 555 %start.mul.2 = mul nsw i8 %start, 2556 %start.add.1 = add nsw i8 %start, %start557 %t = icmp ule i8 %start.add.1, %start.mul.2558 ret i1 %t559}560 561 562define i1 @test_mul_const_nsw_unsigned_4(i8 %start, i8 %high) {563; CHECK-LABEL: @test_mul_const_nsw_unsigned_4(564; CHECK-NEXT: entry:565; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4566; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]567; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])568; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2569; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]570; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_MUL_2]]571; CHECK-NEXT: ret i1 [[F]]572;573entry:574 %start.mul.4 = mul nsw i8 %start, 4575 %c.1 = icmp ult i8 %start.mul.4, %high576 call void @llvm.assume(i1 %c.1)577 578 %start.mul.2 = mul nsw i8 %start, 2579 %start.add.1 = add nsw i8 %start, %start580 %f = icmp ult i8 %start.add.1, %start.mul.2581 ret i1 %f582}583 584 585define i1 @test_mul_const_nsw_unsigned_5(i8 %start, i8 %high) {586; CHECK-LABEL: @test_mul_const_nsw_unsigned_5(587; CHECK-NEXT: entry:588; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4589; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]590; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])591; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]592; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]593; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]594; CHECK-NEXT: ret i1 [[T_4]]595;596entry:597 %start.mul.4 = mul nsw i8 %start, 4598 %c.1 = icmp ult i8 %start.mul.4, %high599 call void @llvm.assume(i1 %c.1)600 601 %start.add.1 = add nsw i8 %start, %start602 %start.add.2 = add nsw i8 %start.add.1, %start.add.1603 %t.4 = icmp ule i8 %start.add.2, %start.mul.4604 ret i1 %t.4605}606 607define i1 @test_mul_const_nsw_unsigned_6(i8 %start, i8 %high) {608; CHECK-LABEL: @test_mul_const_nsw_unsigned_6(609; CHECK-NEXT: entry:610; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4611; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]612; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])613; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]614; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]615; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]616; CHECK-NEXT: ret i1 [[F_2]]617;618entry:619 %start.mul.4 = mul nsw i8 %start, 4620 %c.1 = icmp ult i8 %start.mul.4, %high621 call void @llvm.assume(i1 %c.1)622 623 %start.add.1 = add nsw i8 %start, %start624 %start.add.2 = add nsw i8 %start.add.1, %start.add.1625 %f.2 = icmp ult i8 %start.add.2, %start.mul.4626 ret i1 %f.2627}628 629define i1 @test_mul_const_nsw_unsigned_7(i8 %start, i8 %high) {630; CHECK-LABEL: @test_mul_const_nsw_unsigned_7(631; CHECK-NEXT: entry:632; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4633; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]634; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])635; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2636; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]637; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]638; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1639; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_MUL_4]]640; CHECK-NEXT: ret i1 [[F_3]]641;642entry:643 %start.mul.4 = mul nsw i8 %start, 4644 %c.1 = icmp ult i8 %start.mul.4, %high645 call void @llvm.assume(i1 %c.1)646 647 %start.mul.2 = mul nsw i8 %start, 2648 %start.add.1 = add nsw i8 %start, %start649 %start.add.2 = add nsw i8 %start.add.1, %start.add.1650 %start.add.2.1 = add nsw i8 %start.add.2, 1651 %f.3 = icmp ule i8 %start.add.2.1, %start.mul.4652 ret i1 %f.3653}654 655define i1 @test_mul_const_nsw_unsigned_8(i8 %start, i8 %high) {656; CHECK-LABEL: @test_mul_const_nsw_unsigned_8(657; CHECK-NEXT: entry:658; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4659; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]660; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])661; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2662; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]663; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]664; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1665; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], 3666; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_MUL_3]]667; CHECK-NEXT: ret i1 [[T_5]]668;669entry:670 %start.mul.4 = mul nsw i8 %start, 4671 %c.1 = icmp ult i8 %start.mul.4, %high672 call void @llvm.assume(i1 %c.1)673 674 %start.mul.2 = mul nsw i8 %start, 2675 %start.add.1 = add nsw i8 %start, %start676 %start.add.2 = add nsw i8 %start.add.1, %start.add.1677 %start.add.2.1 = add nsw i8 %start.add.2, 1678 %start.mul.3 = mul nsw i8 %start, 3679 %t.5 = icmp ule i8 %start.add.1, %start.mul.3680 ret i1 %t.5681}682 683define i1 @test_mul_const_nsw_unsigned_9(i8 %start, i8 %high) {684; CHECK-LABEL: @test_mul_const_nsw_unsigned_9(685; CHECK-NEXT: entry:686; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[START:%.*]], 4687; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]688; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])689; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2690; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]691; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]692; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1693; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], 3694; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_3]]695; CHECK-NEXT: ret i1 [[F_5]]696;697entry:698 %start.mul.4 = mul nsw i8 %start, 4699 %c.1 = icmp ult i8 %start.mul.4, %high700 call void @llvm.assume(i1 %c.1)701 702 %start.mul.2 = mul nsw i8 %start, 2703 %start.add.1 = add nsw i8 %start, %start704 %start.add.2 = add nsw i8 %start.add.1, %start.add.1705 %start.add.2.1 = add nsw i8 %start.add.2, 1706 %start.mul.3 = mul nsw i8 %start, 3707 %f.5 = icmp ult i8 %start.add.2, %start.mul.3708 ret i1 %f.5709}710 711define i1 @test_mul_const_nsw_unsigned_10(i8 %start, i8 %high) {712; CHECK-LABEL: @test_mul_const_nsw_unsigned_10(713; CHECK-NEXT: entry:714; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nsw i8 [[START:%.*]], 5715; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]716; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])717; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], 3718; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]719; CHECK-NEXT: ret i1 [[T_1]]720;721entry:722 %start.mul.5 = mul nsw i8 %start, 5723 %c.0 = icmp ult i8 %start, %start.mul.5724 call void @llvm.assume(i1 %c.0)725 726 %start.mul.3 = mul nsw i8 %start, 3727 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5728 ret i1 %t.1729}730 731define i1 @test_mul_const_nsw_unsigned_11(i8 %start, i8 %high) {732; CHECK-LABEL: @test_mul_const_nsw_unsigned_11(733; CHECK-NEXT: entry:734; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nsw i8 [[START:%.*]], 5735; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]736; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])737; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], 3738; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]739; CHECK-NEXT: ret i1 [[C_1]]740;741entry:742 %start.mul.5 = mul nsw i8 %start, 5743 %c.0 = icmp ult i8 %start, %start.mul.5744 call void @llvm.assume(i1 %c.0)745 746 %start.mul.3 = mul nsw i8 %start, 3747 %c.1 = icmp ule i8 %start.mul.5, %start.mul.3748 ret i1 %c.1749}750 751define i1 @test_mul_const_nsw_unsigned_12(i8 %start) {752; CHECK-LABEL: @test_mul_const_nsw_unsigned_12(753; CHECK-NEXT: entry:754; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nsw i8 [[START:%.*]], -5755; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]756; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])757; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], -3758; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]759; CHECK-NEXT: ret i1 [[T_1]]760;761entry:762 %start.mul.5 = mul nsw i8 %start, -5763 %c.0 = icmp ult i8 %start, %start.mul.5764 call void @llvm.assume(i1 %c.0)765 766 %start.mul.3 = mul nsw i8 %start, -3767 %t.1 = icmp ule i8 %start.mul.3, %start.mul.5768 ret i1 %t.1769}770 771define i1 @test_mul_const_nsw_unsigned_13(i8 %start) {772; CHECK-LABEL: @test_mul_const_nsw_unsigned_13(773; CHECK-NEXT: entry:774; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nsw i8 [[START:%.*]], -5775; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]776; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])777; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nsw i8 [[START]], -3778; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]779; CHECK-NEXT: ret i1 [[C_1]]780;781entry:782 %start.mul.5 = mul nsw i8 %start, -5783 %c.0 = icmp ult i8 %start, %start.mul.5784 call void @llvm.assume(i1 %c.0)785 786 %start.mul.3 = mul nsw i8 %start, -3787 %c.1 = icmp ule i8 %start.mul.5, %start.mul.3788 ret i1 %c.1789}790 791define i1 @test_mul_add_const_nsw_unsigned_1(i8 %start, i8 %high) {792; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_1(793; CHECK-NEXT: entry:794; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3795; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4796; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]797; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])798; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]799; CHECK-NEXT: ret i1 [[T_1]]800;801entry:802 %add = add nsw i8 %start, 3803 %start.mul.4 = mul nsw i8 %add, 4804 %c.1 = icmp ult i8 %start.mul.4, %high805 call void @llvm.assume(i1 %c.1)806 807 %t.1 = icmp ult i8 %start, %high808 ret i1 %t.1809}810 811define i1 @test_mul_add_const_nsw_unsigned_2(i8 %start, i8 %high) {812; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_2(813; CHECK-NEXT: entry:814; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3815; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4816; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]817; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])818; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2819; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_MUL_2]], [[HIGH]]820; CHECK-NEXT: ret i1 [[T_2]]821;822entry:823 %add = add nsw i8 %start, 3824 %start.mul.4 = mul nsw i8 %add, 4825 %c.1 = icmp ult i8 %start.mul.4, %high826 call void @llvm.assume(i1 %c.1)827 828 %start.mul.2 = mul nsw i8 %start, 2829 %t.2 = icmp ult i8 %start.mul.2, %high830 ret i1 %t.2831}832 833define i1 @test_mul_add_const_nsw_unsigned_3(i8 %start, i8 %high) {834; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_3(835; CHECK-NEXT: entry:836; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3837; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4838; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]839; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])840; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]841; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]842; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]843; CHECK-NEXT: ret i1 [[T_3]]844;845entry:846 %add = add nsw i8 %start, 3847 %start.mul.4 = mul nsw i8 %add, 4848 %c.1 = icmp ult i8 %start.mul.4, %high849 call void @llvm.assume(i1 %c.1)850 851 %start.add.1 = add nsw i8 %start, %start852 %start.add.2 = add nsw i8 %start.add.1, %start.add.1853 %t.3 = icmp ule i8 %start.add.2, %start.mul.4854 ret i1 %t.3855}856 857define i1 @test_mul_add_const_nsw_unsigned_4(i8 %start, i8 %high) {858; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_4(859; CHECK-NEXT: entry:860; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3861; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4862; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]863; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])864; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nsw i8 [[START]], 2865; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]866; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]867; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]868; CHECK-NEXT: ret i1 [[T_4]]869;870entry:871 %add = add nsw i8 %start, 3872 %start.mul.4 = mul nsw i8 %add, 4873 %c.1 = icmp ult i8 %start.mul.4, %high874 call void @llvm.assume(i1 %c.1)875 876 %start.mul.2 = mul nsw i8 %start, 2877 %start.add.1 = add nsw i8 %start, %start878 %start.add.2 = add nsw i8 %start.add.1, %start.add.1879 %t.4 = icmp ult i8 %start.add.2, %start.mul.4880 ret i1 %t.4881}882 883define i1 @test_mul_add_const_nsw_unsigned_5(i8 %start, i8 %high) {884; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_5(885; CHECK-NEXT: entry:886; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3887; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4888; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]889; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])890; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]891; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]892; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nsw i8 [[START_ADD_2]], 12893; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_MUL_4]]894; CHECK-NEXT: ret i1 [[T_5]]895;896entry:897 %add = add nsw i8 %start, 3898 %start.mul.4 = mul nsw i8 %add, 4899 %c.1 = icmp ult i8 %start.mul.4, %high900 call void @llvm.assume(i1 %c.1)901 902 %start.add.1 = add nsw i8 %start, %start903 %start.add.2 = add nsw i8 %start.add.1, %start.add.1904 %start.add.2.12 = add nsw i8 %start.add.2, 12905 %t.5 = icmp ule i8 %start.add.2.12, %start.mul.4906 ret i1 %t.5907}908 909define i1 @test_mul_add_const_nsw_unsigned_6(i8 %start, i8 %high) {910; CHECK-LABEL: @test_mul_add_const_nsw_unsigned_6(911; CHECK-NEXT: entry:912; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3913; CHECK-NEXT: [[START_MUL_4:%.*]] = mul nsw i8 [[ADD]], 4914; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]915; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])916; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]]917; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]]918; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nsw i8 [[START_ADD_2]], 13919; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_MUL_4]]920; CHECK-NEXT: ret i1 [[F_1]]921;922entry:923 %add = add nsw i8 %start, 3924 %start.mul.4 = mul nsw i8 %add, 4925 %c.1 = icmp ult i8 %start.mul.4, %high926 call void @llvm.assume(i1 %c.1)927 928 %start.add.1 = add nsw i8 %start, %start929 %start.add.2 = add nsw i8 %start.add.1, %start.add.1930 %start.add.2.13 = add nsw i8 %start.add.2, 13931 %f.1 = icmp ule i8 %start.add.2.13, %start.mul.4932 ret i1 %f.1933}934 935define i1 @test_mul_const_no_nuw_unsigned_1(i8 %start, i8 %high) {936; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_1(937; CHECK-NEXT: entry:938; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 4939; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]940; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])941; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]942; CHECK-NEXT: ret i1 [[T_1]]943;944entry:945 %start.mul.4 = mul i8 %start, 4946 %c.1 = icmp ult i8 %start.mul.4, %high947 call void @llvm.assume(i1 %c.1)948 949 %t.1 = icmp ult i8 %start, %high950 ret i1 %t.1951}952 953define i1 @test_mul_const_no_nuw_unsigned_2(i8 %start, i8 %high) {954; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_2(955; CHECK-NEXT: entry:956; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 4957; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]958; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])959; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 2960; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_MUL_2]], [[HIGH]]961; CHECK-NEXT: ret i1 [[T]]962;963entry:964 %start.mul.4 = mul i8 %start, 4965 %c.1 = icmp ult i8 %start.mul.4, %high966 call void @llvm.assume(i1 %c.1)967 968 %start.mul.2 = mul i8 %start, 2969 %t = icmp ult i8 %start.mul.2, %high970 ret i1 %t971}972 973define i1 @test_mul_const_no_nuw_unsigned_3(i8 %start, i8 %high) {974; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_3(975; CHECK-NEXT: entry:976; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 4977; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]978; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])979; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 2980; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]981; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_MUL_2]]982; CHECK-NEXT: ret i1 [[T]]983;984entry:985 %start.mul.4 = mul i8 %start, 4986 %c.1 = icmp ult i8 %start.mul.4, %high987 call void @llvm.assume(i1 %c.1)988 989 %start.mul.2 = mul i8 %start, 2990 %start.add.1 = add i8 %start, %start991 %t = icmp ule i8 %start.add.1, %start.mul.2992 ret i1 %t993}994 995 996define i1 @test_mul_const_no_nuw_unsigned_4(i8 %start, i8 %high) {997; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_4(998; CHECK-NEXT: entry:999; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41000; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1001; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1002; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21003; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1004; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_MUL_2]]1005; CHECK-NEXT: ret i1 [[F]]1006;1007entry:1008 %start.mul.4 = mul i8 %start, 41009 %c.1 = icmp ult i8 %start.mul.4, %high1010 call void @llvm.assume(i1 %c.1)1011 1012 %start.mul.2 = mul i8 %start, 21013 %start.add.1 = add i8 %start, %start1014 %f = icmp ult i8 %start.add.1, %start.mul.21015 ret i1 %f1016}1017 1018 1019define i1 @test_mul_const_no_nuw_unsigned_5(i8 %start, i8 %high) {1020; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_5(1021; CHECK-NEXT: entry:1022; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41023; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1024; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1025; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1026; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1027; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]1028; CHECK-NEXT: ret i1 [[T_4]]1029;1030entry:1031 %start.mul.4 = mul i8 %start, 41032 %c.1 = icmp ult i8 %start.mul.4, %high1033 call void @llvm.assume(i1 %c.1)1034 1035 %start.add.1 = add i8 %start, %start1036 %start.add.2 = add i8 %start.add.1, %start.add.11037 %t.4 = icmp ule i8 %start.add.2, %start.mul.41038 ret i1 %t.41039}1040 1041define i1 @test_mul_const_no_nuw_unsigned_6(i8 %start, i8 %high) {1042; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_6(1043; CHECK-NEXT: entry:1044; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41045; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1046; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1047; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1048; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1049; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]1050; CHECK-NEXT: ret i1 [[F_2]]1051;1052entry:1053 %start.mul.4 = mul i8 %start, 41054 %c.1 = icmp ult i8 %start.mul.4, %high1055 call void @llvm.assume(i1 %c.1)1056 1057 %start.add.1 = add i8 %start, %start1058 %start.add.2 = add i8 %start.add.1, %start.add.11059 %f.2 = icmp ult i8 %start.add.2, %start.mul.41060 ret i1 %f.21061}1062 1063define i1 @test_mul_const_no_nuw_unsigned_7(i8 %start, i8 %high) {1064; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_7(1065; CHECK-NEXT: entry:1066; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41067; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1068; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1069; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21070; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1071; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1072; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 11073; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_MUL_4]]1074; CHECK-NEXT: ret i1 [[F_3]]1075;1076entry:1077 %start.mul.4 = mul i8 %start, 41078 %c.1 = icmp ult i8 %start.mul.4, %high1079 call void @llvm.assume(i1 %c.1)1080 1081 %start.mul.2 = mul i8 %start, 21082 %start.add.1 = add i8 %start, %start1083 %start.add.2 = add i8 %start.add.1, %start.add.11084 %start.add.2.1 = add i8 %start.add.2, 11085 %f.3 = icmp ule i8 %start.add.2.1, %start.mul.41086 ret i1 %f.31087}1088 1089define i1 @test_mul_const_no_nuw_unsigned_8(i8 %start, i8 %high) {1090; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_8(1091; CHECK-NEXT: entry:1092; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41093; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1094; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1095; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21096; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1097; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1098; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 11099; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START]], 31100; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_MUL_3]]1101; CHECK-NEXT: ret i1 [[T_5]]1102;1103entry:1104 %start.mul.4 = mul i8 %start, 41105 %c.1 = icmp ult i8 %start.mul.4, %high1106 call void @llvm.assume(i1 %c.1)1107 1108 %start.mul.2 = mul i8 %start, 21109 %start.add.1 = add i8 %start, %start1110 %start.add.2 = add i8 %start.add.1, %start.add.11111 %start.add.2.1 = add i8 %start.add.2, 11112 %start.mul.3 = mul i8 %start, 31113 %t.5 = icmp ule i8 %start.add.1, %start.mul.31114 ret i1 %t.51115}1116 1117define i1 @test_mul_const_no_nuw_unsigned_9(i8 %start, i8 %high) {1118; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_9(1119; CHECK-NEXT: entry:1120; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[START:%.*]], 41121; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1122; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1123; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21124; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1125; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1126; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 11127; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START]], 31128; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_3]]1129; CHECK-NEXT: ret i1 [[F_5]]1130;1131entry:1132 %start.mul.4 = mul i8 %start, 41133 %c.1 = icmp ult i8 %start.mul.4, %high1134 call void @llvm.assume(i1 %c.1)1135 1136 %start.mul.2 = mul i8 %start, 21137 %start.add.1 = add i8 %start, %start1138 %start.add.2 = add i8 %start.add.1, %start.add.11139 %start.add.2.1 = add i8 %start.add.2, 11140 %start.mul.3 = mul i8 %start, 31141 %f.5 = icmp ult i8 %start.add.2, %start.mul.31142 ret i1 %f.51143}1144 1145define i1 @test_mul_const_no_nuw_unsigned_10(i8 %start, i8 %high) {1146; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_10(1147; CHECK-NEXT: entry:1148; CHECK-NEXT: [[START_MUL_5:%.*]] = mul i8 [[START:%.*]], 51149; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]1150; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])1151; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START]], 31152; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]1153; CHECK-NEXT: ret i1 [[T_1]]1154;1155entry:1156 %start.mul.5 = mul i8 %start, 51157 %c.0 = icmp ult i8 %start, %start.mul.51158 call void @llvm.assume(i1 %c.0)1159 1160 %start.mul.3 = mul i8 %start, 31161 %t.1 = icmp ule i8 %start.mul.3, %start.mul.51162 ret i1 %t.11163}1164 1165define i1 @test_mul_const_no_nuw_unsigned_11(i8 %start, i8 %high) {1166; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_11(1167; CHECK-NEXT: entry:1168; CHECK-NEXT: [[START_MUL_5:%.*]] = mul i8 [[START:%.*]], 51169; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_MUL_5]]1170; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])1171; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START]], 31172; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]1173; CHECK-NEXT: ret i1 [[C_1]]1174;1175entry:1176 %start.mul.5 = mul i8 %start, 51177 %c.0 = icmp ult i8 %start, %start.mul.51178 call void @llvm.assume(i1 %c.0)1179 1180 %start.mul.3 = mul i8 %start, 31181 %c.1 = icmp ule i8 %start.mul.5, %start.mul.31182 ret i1 %c.11183}1184 1185define i1 @test_mul_const_no_nuw_unsigned_12(i8 %start) {1186; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_12(1187; CHECK-NEXT: entry:1188; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START:%.*]], 31189; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_MUL_3]]1190; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1191; CHECK-NEXT: [[START_MUL_5:%.*]] = mul i8 [[START]], 51192; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]1193; CHECK-NEXT: ret i1 [[T_1]]1194;1195entry:1196 %start.mul.3 = mul i8 %start, 31197 %c.1 = icmp ult i8 %start, %start.mul.31198 call void @llvm.assume(i1 %c.1)1199 1200 %start.mul.5 = mul i8 %start, 51201 %t.1 = icmp ule i8 %start.mul.3, %start.mul.51202 ret i1 %t.11203}1204 1205define i1 @test_mul_const_no_nuw_unsigned_13(i8 %start) {1206; CHECK-LABEL: @test_mul_const_no_nuw_unsigned_13(1207; CHECK-NEXT: entry:1208; CHECK-NEXT: [[START_MUL_3:%.*]] = mul i8 [[START:%.*]], 31209; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_MUL_3]]1210; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1211; CHECK-NEXT: [[START_MUL_5:%.*]] = mul i8 [[START]], 51212; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]1213; CHECK-NEXT: ret i1 [[F_1]]1214;1215entry:1216 %start.mul.3 = mul i8 %start, 31217 %c.1 = icmp ult i8 %start, %start.mul.31218 call void @llvm.assume(i1 %c.1)1219 1220 %start.mul.5 = mul i8 %start, 51221 %f.1 = icmp ule i8 %start.mul.5, %start.mul.31222 ret i1 %f.11223}1224 1225define i1 @test_mul_add_const_no_nuw_unsigned_1(i8 %start, i8 %high) {1226; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_1(1227; CHECK-NEXT: entry:1228; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31229; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41230; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1231; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1232; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]]1233; CHECK-NEXT: ret i1 [[T_1]]1234;1235entry:1236 %add = add i8 %start, 31237 %start.mul.4 = mul i8 %add, 41238 %c.1 = icmp ult i8 %start.mul.4, %high1239 call void @llvm.assume(i1 %c.1)1240 1241 %t.1 = icmp ult i8 %start, %high1242 ret i1 %t.11243}1244 1245define i1 @test_mul_add_const_no_nuw_unsigned_2(i8 %start, i8 %high) {1246; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_2(1247; CHECK-NEXT: entry:1248; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31249; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41250; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1251; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1252; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21253; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_MUL_2]], [[HIGH]]1254; CHECK-NEXT: ret i1 [[T_2]]1255;1256entry:1257 %add = add i8 %start, 31258 %start.mul.4 = mul i8 %add, 41259 %c.1 = icmp ult i8 %start.mul.4, %high1260 call void @llvm.assume(i1 %c.1)1261 1262 %start.mul.2 = mul i8 %start, 21263 %t.2 = icmp ult i8 %start.mul.2, %high1264 ret i1 %t.21265}1266 1267define i1 @test_mul_add_const_no_nuw_unsigned_3(i8 %start, i8 %high) {1268; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_3(1269; CHECK-NEXT: entry:1270; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31271; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41272; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1273; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1274; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1275; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1276; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]1277; CHECK-NEXT: ret i1 [[T_3]]1278;1279entry:1280 %add = add i8 %start, 31281 %start.mul.4 = mul i8 %add, 41282 %c.1 = icmp ult i8 %start.mul.4, %high1283 call void @llvm.assume(i1 %c.1)1284 1285 %start.add.1 = add i8 %start, %start1286 %start.add.2 = add i8 %start.add.1, %start.add.11287 %t.3 = icmp ule i8 %start.add.2, %start.mul.41288 ret i1 %t.31289}1290 1291define i1 @test_mul_add_const_no_nuw_unsigned_4(i8 %start, i8 %high) {1292; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_4(1293; CHECK-NEXT: entry:1294; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31295; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41296; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1297; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1298; CHECK-NEXT: [[START_MUL_2:%.*]] = mul i8 [[START]], 21299; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1300; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1301; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]1302; CHECK-NEXT: ret i1 [[T_4]]1303;1304entry:1305 %add = add i8 %start, 31306 %start.mul.4 = mul i8 %add, 41307 %c.1 = icmp ult i8 %start.mul.4, %high1308 call void @llvm.assume(i1 %c.1)1309 1310 %start.mul.2 = mul i8 %start, 21311 %start.add.1 = add i8 %start, %start1312 %start.add.2 = add i8 %start.add.1, %start.add.11313 %t.4 = icmp ult i8 %start.add.2, %start.mul.41314 ret i1 %t.41315}1316 1317define i1 @test_mul_add_const_no_nuw_unsigned_5(i8 %start, i8 %high) {1318; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_5(1319; CHECK-NEXT: entry:1320; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31321; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41322; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1323; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1324; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1325; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1326; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add i8 [[START_ADD_2]], 121327; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_MUL_4]]1328; CHECK-NEXT: ret i1 [[T_5]]1329;1330entry:1331 %add = add i8 %start, 31332 %start.mul.4 = mul i8 %add, 41333 %c.1 = icmp ult i8 %start.mul.4, %high1334 call void @llvm.assume(i1 %c.1)1335 1336 %start.add.1 = add i8 %start, %start1337 %start.add.2 = add i8 %start.add.1, %start.add.11338 %start.add.2.12 = add i8 %start.add.2, 121339 %t.5 = icmp ule i8 %start.add.2.12, %start.mul.41340 ret i1 %t.51341}1342 1343define i1 @test_mul_add_const_no_nuw_unsigned_6(i8 %start, i8 %high) {1344; CHECK-LABEL: @test_mul_add_const_no_nuw_unsigned_6(1345; CHECK-NEXT: entry:1346; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 31347; CHECK-NEXT: [[START_MUL_4:%.*]] = mul i8 [[ADD]], 41348; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_MUL_4]], [[HIGH:%.*]]1349; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])1350; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]]1351; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]]1352; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add i8 [[START_ADD_2]], 131353; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_MUL_4]]1354; CHECK-NEXT: ret i1 [[F_1]]1355;1356entry:1357 %add = add i8 %start, 31358 %start.mul.4 = mul i8 %add, 41359 %c.1 = icmp ult i8 %start.mul.4, %high1360 call void @llvm.assume(i1 %c.1)1361 1362 %start.add.1 = add i8 %start, %start1363 %start.add.2 = add i8 %start.add.1, %start.add.11364 %start.add.2.13 = add i8 %start.add.2, 131365 %f.1 = icmp ule i8 %start.add.2.13, %start.mul.41366 ret i1 %f.11367}1368 1369