271 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s3 4define i1 @cmp_sext(i32 %a, i32 %b){5; CHECK-LABEL: define i1 @cmp_sext(6; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {7; CHECK-NEXT: entry:8; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]9; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]10; CHECK: then:11; CHECK-NEXT: [[SA:%.*]] = sext i32 [[A]] to i6412; CHECK-NEXT: [[SB:%.*]] = sext i32 [[B]] to i6413; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], 114; CHECK-NEXT: ret i1 true15; CHECK: else:16; CHECK-NEXT: ret i1 false17;18entry:19 %cmp = icmp slt i32 %a, %b20 br i1 %cmp, label %then, label %else21 22then:23 %sa = sext i32 %a to i6424 %sb = sext i32 %b to i6425 %add = add nsw i64 %sa, 126 %cmp2 = icmp sge i64 %sb, %add27 ret i1 %cmp228 29else:30 ret i1 false31}32 33define i1 @cmp_sext_add(i32 %a, i32 %b){34; CHECK-LABEL: define i1 @cmp_sext_add(35; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {36; CHECK-NEXT: entry:37; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]38; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]39; CHECK: then:40; CHECK-NEXT: [[A1:%.*]] = add nsw i32 [[A]], 141; CHECK-NEXT: [[B1:%.*]] = add nsw i32 [[B]], 142; CHECK-NEXT: [[SA:%.*]] = sext i32 [[A1]] to i6443; CHECK-NEXT: [[SB:%.*]] = sext i32 [[B1]] to i6444; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], 145; CHECK-NEXT: ret i1 true46; CHECK: else:47; CHECK-NEXT: ret i1 false48;49entry:50 %cmp = icmp slt i32 %a, %b51 br i1 %cmp, label %then, label %else52 53then:54 %a1 = add nsw i32 %a, 155 %b1 = add nsw i32 %b, 156 %sa = sext i32 %a1 to i6457 %sb = sext i32 %b1 to i6458 %add = add nsw i64 %sa, 159 %cmp2 = icmp sge i64 %sb, %add60 ret i1 %cmp261 62else:63 ret i1 false64}65 66define i1 @cmp_sext_dynamic_increment(i32 %a, i32 %b, i64 %c){67; CHECK-LABEL: define i1 @cmp_sext_dynamic_increment(68; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i64 [[C:%.*]]) {69; CHECK-NEXT: entry:70; CHECK-NEXT: [[POS:%.*]] = icmp slt i64 [[C]], 271; CHECK-NEXT: call void @llvm.assume(i1 [[POS]])72; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]73; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]74; CHECK: then:75; CHECK-NEXT: [[SA:%.*]] = sext i32 [[A]] to i6476; CHECK-NEXT: [[SB:%.*]] = sext i32 [[B]] to i6477; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], [[C]]78; CHECK-NEXT: ret i1 true79; CHECK: else:80; CHECK-NEXT: ret i1 false81;82entry:83 %pos = icmp slt i64 %c, 284 call void @llvm.assume(i1 %pos)85 %cmp = icmp slt i32 %a, %b86 br i1 %cmp, label %then, label %else87 88then:89 %sa = sext i32 %a to i6490 %sb = sext i32 %b to i6491 %add = add nsw i64 %sa, %c92 %cmp2 = icmp sge i64 %sb, %add93 ret i1 %cmp294 95else:96 ret i1 false97}98 99define i1 @cmp_zext_nneg(i32 %a, i32 %b){100; CHECK-LABEL: define i1 @cmp_zext_nneg(101; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {102; CHECK-NEXT: entry:103; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]104; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]105; CHECK: then:106; CHECK-NEXT: [[SA:%.*]] = zext nneg i32 [[A]] to i64107; CHECK-NEXT: [[SB:%.*]] = zext nneg i32 [[B]] to i64108; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], 1109; CHECK-NEXT: ret i1 true110; CHECK: else:111; CHECK-NEXT: ret i1 false112;113entry:114 %cmp = icmp slt i32 %a, %b115 br i1 %cmp, label %then, label %else116 117then:118 %sa = zext nneg i32 %a to i64119 %sb = zext nneg i32 %b to i64120 %add = add nsw i64 %sa, 1121 %cmp2 = icmp sge i64 %sb, %add122 ret i1 %cmp2123 124else:125 ret i1 false126}127 128; Negative tests129 130define i1 @cmp_zext(i32 %a, i32 %b){131; CHECK-LABEL: define i1 @cmp_zext(132; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {133; CHECK-NEXT: entry:134; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]135; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]136; CHECK: then:137; CHECK-NEXT: [[SA:%.*]] = zext i32 [[A]] to i64138; CHECK-NEXT: [[SB:%.*]] = zext i32 [[B]] to i64139; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], 1140; CHECK-NEXT: [[CMP2:%.*]] = icmp sge i64 [[SB]], [[ADD]]141; CHECK-NEXT: ret i1 [[CMP2]]142; CHECK: else:143; CHECK-NEXT: ret i1 false144;145entry:146 %cmp = icmp slt i32 %a, %b147 br i1 %cmp, label %then, label %else148 149then:150 %sa = zext i32 %a to i64151 %sb = zext i32 %b to i64152 %add = add nsw i64 %sa, 1153 %cmp2 = icmp sge i64 %sb, %add154 ret i1 %cmp2155 156else:157 ret i1 false158}159 160define i1 @cmp_sext_unknown_increment(i32 %a, i32 %b, i64 %c){161; CHECK-LABEL: define i1 @cmp_sext_unknown_increment(162; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i64 [[C:%.*]]) {163; CHECK-NEXT: entry:164; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]165; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]166; CHECK: then:167; CHECK-NEXT: [[SA:%.*]] = sext i32 [[A]] to i64168; CHECK-NEXT: [[SB:%.*]] = sext i32 [[B]] to i64169; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], [[C]]170; CHECK-NEXT: [[CMP2:%.*]] = icmp sge i64 [[SB]], [[ADD]]171; CHECK-NEXT: ret i1 [[CMP2]]172; CHECK: else:173; CHECK-NEXT: ret i1 false174;175entry:176 %cmp = icmp slt i32 %a, %b177 br i1 %cmp, label %then, label %else178 179then:180 %sa = sext i32 %a to i64181 %sb = sext i32 %b to i64182 %add = add nsw i64 %sa, %c183 %cmp2 = icmp sge i64 %sb, %add184 ret i1 %cmp2185 186else:187 ret i1 false188}189 190define i1 @cmp_sext_sgt(i32 %a, i32 %b){191; CHECK-LABEL: define i1 @cmp_sext_sgt(192; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {193; CHECK-NEXT: entry:194; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], [[B]]195; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]196; CHECK: then:197; CHECK-NEXT: [[SA:%.*]] = sext i32 [[A]] to i64198; CHECK-NEXT: [[SB:%.*]] = sext i32 [[B]] to i64199; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[SA]], 1200; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[SB]], [[ADD]]201; CHECK-NEXT: ret i1 [[CMP2]]202; CHECK: else:203; CHECK-NEXT: ret i1 false204;205entry:206 %cmp = icmp slt i32 %a, %b207 br i1 %cmp, label %then, label %else208 209then:210 %sa = sext i32 %a to i64211 %sb = sext i32 %b to i64212 %add = add nsw i64 %sa, 1213 %cmp2 = icmp sgt i64 %sb, %add214 ret i1 %cmp2215 216else:217 ret i1 false218}219 220declare void @use(i1)221 222define void @sge_sext(i16 %x, i32 %y) {223; CHECK-LABEL: define void @sge_sext(224; CHECK-SAME: i16 [[X:%.*]], i32 [[Y:%.*]]) {225; CHECK-NEXT: entry:226; CHECK-NEXT: [[X_EXT:%.*]] = sext i16 [[X]] to i32227; CHECK-NEXT: [[C_1:%.*]] = icmp sge i32 [[X_EXT]], [[Y]]228; CHECK-NEXT: [[C_2:%.*]] = icmp sge i32 [[Y]], -10229; CHECK-NEXT: [[AND:%.*]] = and i1 [[C_1]], [[C_2]]230; CHECK-NEXT: br i1 [[AND]], label [[BB1:%.*]], label [[BB2:%.*]]231; CHECK: bb1:232; CHECK-NEXT: call void @use(i1 true)233; CHECK-NEXT: call void @use(i1 true)234; CHECK-NEXT: [[T_3:%.*]] = icmp sge i32 [[X_EXT]], -9235; CHECK-NEXT: call void @use(i1 [[T_3]])236; CHECK-NEXT: [[C_3:%.*]] = icmp sge i32 [[X_EXT]], -9237; CHECK-NEXT: call void @use(i1 [[C_3]])238; CHECK-NEXT: [[C_4:%.*]] = icmp sge i32 [[Y]], [[X_EXT]]239; CHECK-NEXT: call void @use(i1 [[C_4]])240; CHECK-NEXT: [[C_5:%.*]] = icmp sge i16 [[X]], -9241; CHECK-NEXT: call void @use(i1 [[C_5]])242; CHECK-NEXT: ret void243; CHECK: bb2:244; CHECK-NEXT: ret void245;246entry:247 %x.ext = sext i16 %x to i32248 %c.1 = icmp sge i32 %x.ext, %y249 %c.2 = icmp sge i32 %y, -10250 %and = and i1 %c.1, %c.2251 br i1 %and, label %bb1, label %bb2252 253bb1:254 %t.1 = icmp sge i32 %x.ext, %y255 call void @use(i1 %t.1)256 %t.2 = icmp sge i16 %x, -10257 call void @use(i1 %t.2)258 %t.3 = icmp sge i32 %x.ext, -9259 call void @use(i1 %t.3)260 %c.3 = icmp sge i32 %x.ext, -9261 call void @use(i1 %c.3)262 %c.4 = icmp sge i32 %y, %x.ext263 call void @use(i1 %c.4)264 %c.5 = icmp sge i16 %x, -9265 call void @use(i1 %c.5)266 ret void267 268bb2:269 ret void270}271