294 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s3 4define i1 @uge_zext(i8 %x, i16 %y) {5; CHECK-LABEL: @uge_zext(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[X_EXT:%.*]] = zext i8 [[X:%.*]] to i168; CHECK-NEXT: [[C_1:%.*]] = icmp uge i16 [[X_EXT]], [[Y:%.*]]9; CHECK-NEXT: br i1 [[C_1]], label [[BB1:%.*]], label [[BB2:%.*]]10; CHECK: bb1:11; CHECK-NEXT: [[C_2:%.*]] = icmp uge i16 [[X_EXT]], 1012; CHECK-NEXT: [[R_1:%.*]] = xor i1 true, [[C_2]]13; CHECK-NEXT: [[C_3:%.*]] = icmp uge i16 [[Y]], [[X_EXT]]14; CHECK-NEXT: [[R_2:%.*]] = xor i1 [[R_1]], [[C_3]]15; CHECK-NEXT: [[C_4:%.*]] = icmp uge i16 10, [[X_EXT]]16; CHECK-NEXT: [[R_3:%.*]] = xor i1 [[R_2]], [[C_4]]17; CHECK-NEXT: ret i1 [[R_3]]18; CHECK: bb2:19; CHECK-NEXT: [[R_4:%.*]] = xor i1 true, false20; CHECK-NEXT: [[C_5:%.*]] = icmp uge i16 [[X_EXT]], 1021; CHECK-NEXT: [[R_5:%.*]] = xor i1 [[R_4]], [[C_5]]22; CHECK-NEXT: [[C_6:%.*]] = icmp uge i16 10, [[X_EXT]]23; CHECK-NEXT: [[R_6:%.*]] = xor i1 [[R_5]], [[C_6]]24; CHECK-NEXT: ret i1 [[R_6]]25;26entry:27 %x.ext = zext i8 %x to i1628 %c.1 = icmp uge i16 %x.ext, %y29 br i1 %c.1, label %bb1, label %bb230 31bb1:32 %t.1 = icmp uge i16 %x.ext, %y33 %c.2 = icmp uge i16 %x.ext, 1034 %r.1 = xor i1 %t.1, %c.235 %c.3 = icmp uge i16 %y, %x.ext36 %r.2 = xor i1 %r.1, %c.337 %c.4 = icmp uge i16 10, %x.ext38 %r.3 = xor i1 %r.2, %c.439 ret i1 %r.340 41bb2:42 %t.2 = icmp uge i16 %y, %x.ext43 %f.1 = icmp uge i16 %x.ext, %y44 %r.4 = xor i1 %t.2, %f.145 %c.5 = icmp uge i16 %x.ext, 1046 %r.5 = xor i1 %r.4, %c.547 %c.6 = icmp uge i16 10, %x.ext48 %r.6 = xor i1 %r.5, %c.649 ret i1 %r.650}51 52define i1 @uge_compare_short_and_extended(i8 %x, i8 %y) {53; CHECK-LABEL: @uge_compare_short_and_extended(54; CHECK-NEXT: entry:55; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[X:%.*]], [[Y:%.*]]56; CHECK-NEXT: [[X_EXT:%.*]] = zext i8 [[X]] to i1657; CHECK-NEXT: [[Y_EXT:%.*]] = zext i8 [[Y]] to i1658; CHECK-NEXT: br i1 [[C_1]], label [[BB1:%.*]], label [[BB2:%.*]]59; CHECK: bb1:60; CHECK-NEXT: [[C_2:%.*]] = icmp uge i16 [[X_EXT]], 1061; CHECK-NEXT: [[R_1:%.*]] = xor i1 true, [[C_2]]62; CHECK-NEXT: [[C_3:%.*]] = icmp sge i16 [[Y_EXT]], [[X_EXT]]63; CHECK-NEXT: [[R_2:%.*]] = xor i1 [[R_1]], [[C_3]]64; CHECK-NEXT: [[C_4:%.*]] = icmp uge i16 10, [[X_EXT]]65; CHECK-NEXT: [[R_3:%.*]] = xor i1 [[R_2]], [[C_4]]66; CHECK-NEXT: ret i1 [[R_3]]67; CHECK: bb2:68; CHECK-NEXT: [[R_4:%.*]] = xor i1 true, false69; CHECK-NEXT: [[C_5:%.*]] = icmp uge i16 [[X_EXT]], 1070; CHECK-NEXT: [[R_5:%.*]] = xor i1 [[R_4]], [[C_5]]71; CHECK-NEXT: [[C_6:%.*]] = icmp uge i16 10, [[X_EXT]]72; CHECK-NEXT: [[R_6:%.*]] = xor i1 [[R_5]], [[C_6]]73; CHECK-NEXT: ret i1 [[R_6]]74;75entry:76 %c.1 = icmp uge i8 %x, %y77 %x.ext = zext i8 %x to i1678 %y.ext = zext i8 %y to i1679 br i1 %c.1, label %bb1, label %bb280 81bb1:82 %t.1 = icmp uge i16 %x.ext, %y.ext83 %c.2 = icmp uge i16 %x.ext, 1084 %r.1 = xor i1 %t.1, %c.285 %c.3 = icmp sge i16 %y.ext, %x.ext86 %r.2 = xor i1 %r.1, %c.387 %c.4 = icmp uge i16 10, %x.ext88 %r.3 = xor i1 %r.2, %c.489 ret i1 %r.390 91bb2:92 %t.2 = icmp uge i16 %y.ext, %x.ext93 %f.1 = icmp uge i16 %x.ext, %y.ext94 %r.4 = xor i1 %t.2, %f.195 %c.5 = icmp uge i16 %x.ext, 1096 %r.5 = xor i1 %r.4, %c.597 %c.6 = icmp uge i16 10, %x.ext98 %r.6 = xor i1 %r.5, %c.699 ret i1 %r.6100}101 102define i1 @uge_zext_add(i8 %x, i16 %y) {103; CHECK-LABEL: @uge_zext_add(104; CHECK-NEXT: entry:105; CHECK-NEXT: [[X_ADD_1:%.*]] = add nuw nsw i8 [[X:%.*]], 1106; CHECK-NEXT: [[X_ADD_1_EXT:%.*]] = zext i8 [[X_ADD_1]] to i16107; CHECK-NEXT: [[X_EXT:%.*]] = zext i8 [[X]] to i16108; CHECK-NEXT: [[C_1:%.*]] = icmp uge i16 [[X_ADD_1_EXT]], [[Y:%.*]]109; CHECK-NEXT: br i1 [[C_1]], label [[BB1:%.*]], label [[BB2:%.*]]110; CHECK: bb1:111; CHECK-NEXT: [[T_1:%.*]] = icmp uge i16 [[X_EXT]], [[Y]]112; CHECK-NEXT: [[C_2:%.*]] = icmp uge i16 [[X_EXT]], 10113; CHECK-NEXT: [[R_1:%.*]] = xor i1 [[T_1]], [[C_2]]114; CHECK-NEXT: [[C_3:%.*]] = icmp uge i16 [[Y]], [[X_EXT]]115; CHECK-NEXT: [[R_2:%.*]] = xor i1 [[R_1]], [[C_3]]116; CHECK-NEXT: [[C_4:%.*]] = icmp uge i16 10, [[X_EXT]]117; CHECK-NEXT: [[R_3:%.*]] = xor i1 [[R_2]], [[C_4]]118; CHECK-NEXT: ret i1 [[R_3]]119; CHECK: bb2:120; CHECK-NEXT: [[R_4:%.*]] = xor i1 true, false121; CHECK-NEXT: [[C_5:%.*]] = icmp uge i16 [[X_EXT]], 10122; CHECK-NEXT: [[R_5:%.*]] = xor i1 [[R_4]], [[C_5]]123; CHECK-NEXT: [[C_6:%.*]] = icmp uge i16 10, [[X_EXT]]124; CHECK-NEXT: [[R_6:%.*]] = xor i1 [[R_5]], [[C_6]]125; CHECK-NEXT: ret i1 [[R_6]]126;127entry:128 %x.add.1 = add nuw nsw i8 %x, 1129 %x.add.1.ext = zext i8 %x.add.1 to i16130 %x.ext = zext i8 %x to i16131 %c.1 = icmp uge i16 %x.add.1.ext, %y132 br i1 %c.1, label %bb1, label %bb2133 134bb1:135 %t.1 = icmp uge i16 %x.ext, %y136 %c.2 = icmp uge i16 %x.ext, 10137 %r.1 = xor i1 %t.1, %c.2138 %c.3 = icmp uge i16 %y, %x.ext139 %r.2 = xor i1 %r.1, %c.3140 %c.4 = icmp uge i16 10, %x.ext141 %r.3 = xor i1 %r.2, %c.4142 ret i1 %r.3143 144bb2:145 %t.2 = icmp uge i16 %y, %x.ext146 %f.1 = icmp uge i16 %x.ext, %y147 %r.4 = xor i1 %t.2, %f.1148 %c.5 = icmp uge i16 %x.ext, 10149 %r.5 = xor i1 %r.4, %c.5150 %c.6 = icmp uge i16 10, %x.ext151 %r.6 = xor i1 %r.5, %c.6152 ret i1 %r.6153}154 155define i1 @sge_zext(i8 %x, i16 %y) {156; CHECK-LABEL: @sge_zext(157; CHECK-NEXT: entry:158; CHECK-NEXT: [[X_EXT:%.*]] = zext i8 [[X:%.*]] to i16159; CHECK-NEXT: [[C_1:%.*]] = icmp sge i16 [[X_EXT]], [[Y:%.*]]160; CHECK-NEXT: br i1 [[C_1]], label [[BB1:%.*]], label [[BB2:%.*]]161; CHECK: bb1:162; CHECK-NEXT: [[C_2:%.*]] = icmp sge i16 [[X_EXT]], 10163; CHECK-NEXT: [[R_1:%.*]] = xor i1 true, [[C_2]]164; CHECK-NEXT: [[C_3:%.*]] = icmp sge i16 [[Y]], [[X_EXT]]165; CHECK-NEXT: [[R_2:%.*]] = xor i1 [[R_1]], [[C_3]]166; CHECK-NEXT: [[C_4:%.*]] = icmp sge i16 10, [[X_EXT]]167; CHECK-NEXT: [[R_3:%.*]] = xor i1 [[R_2]], [[C_4]]168; CHECK-NEXT: ret i1 [[R_3]]169; CHECK: bb2:170; CHECK-NEXT: [[R_4:%.*]] = xor i1 true, false171; CHECK-NEXT: [[C_5:%.*]] = icmp sge i16 [[X_EXT]], 10172; CHECK-NEXT: [[R_5:%.*]] = xor i1 [[R_4]], [[C_5]]173; CHECK-NEXT: [[C_6:%.*]] = icmp sge i16 10, [[X_EXT]]174; CHECK-NEXT: [[R_6:%.*]] = xor i1 [[R_5]], [[C_6]]175; CHECK-NEXT: ret i1 [[R_6]]176;177entry:178 %x.ext = zext i8 %x to i16179 %c.1 = icmp sge i16 %x.ext, %y180 br i1 %c.1, label %bb1, label %bb2181 182bb1:183 %t.1 = icmp sge i16 %x.ext, %y184 %c.2 = icmp sge i16 %x.ext, 10185 %r.1 = xor i1 %t.1, %c.2186 %c.3 = icmp sge i16 %y, %x.ext187 %r.2 = xor i1 %r.1, %c.3188 %c.4 = icmp sge i16 10, %x.ext189 %r.3 = xor i1 %r.2, %c.4190 ret i1 %r.3191 192bb2:193 %t.2 = icmp sge i16 %y, %x.ext194 %f.1 = icmp sge i16 %x.ext, %y195 %r.4 = xor i1 %t.2, %f.1196 %c.5 = icmp sge i16 %x.ext, 10197 %r.5 = xor i1 %r.4, %c.5198 %c.6 = icmp sge i16 10, %x.ext199 %r.6 = xor i1 %r.5, %c.6200 ret i1 %r.6201}202 203 204define i1 @sge_compare_short_and_extended(i8 %x, i8 %y) {205; CHECK-LABEL: @sge_compare_short_and_extended(206; CHECK-NEXT: entry:207; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[X:%.*]], [[Y:%.*]]208; CHECK-NEXT: [[X_EXT:%.*]] = zext i8 [[X]] to i16209; CHECK-NEXT: [[Y_EXT:%.*]] = zext i8 [[Y]] to i16210; CHECK-NEXT: br i1 [[C_1]], label [[BB1:%.*]], label [[BB2:%.*]]211; CHECK: bb1:212; CHECK-NEXT: [[T_1:%.*]] = icmp sge i16 [[X_EXT]], [[Y_EXT]]213; CHECK-NEXT: [[C_2:%.*]] = icmp sge i16 [[X_EXT]], 10214; CHECK-NEXT: [[R_1:%.*]] = xor i1 [[T_1]], [[C_2]]215; CHECK-NEXT: [[C_3:%.*]] = icmp sge i16 [[Y_EXT]], [[X_EXT]]216; CHECK-NEXT: [[R_2:%.*]] = xor i1 [[R_1]], [[C_3]]217; CHECK-NEXT: [[C_4:%.*]] = icmp sge i16 10, [[X_EXT]]218; CHECK-NEXT: [[R_3:%.*]] = xor i1 [[R_2]], [[C_4]]219; CHECK-NEXT: ret i1 [[R_3]]220; CHECK: bb2:221; CHECK-NEXT: [[T_2:%.*]] = icmp sge i16 [[Y_EXT]], [[X_EXT]]222; CHECK-NEXT: [[F_1:%.*]] = icmp sge i16 [[X_EXT]], [[Y_EXT]]223; CHECK-NEXT: [[R_4:%.*]] = xor i1 [[T_2]], [[F_1]]224; CHECK-NEXT: [[C_5:%.*]] = icmp sge i16 [[X_EXT]], 10225; CHECK-NEXT: [[R_5:%.*]] = xor i1 [[R_4]], [[C_5]]226; CHECK-NEXT: [[C_6:%.*]] = icmp sge i16 10, [[X_EXT]]227; CHECK-NEXT: [[R_6:%.*]] = xor i1 [[R_5]], [[C_6]]228; CHECK-NEXT: ret i1 [[R_6]]229;230entry:231 %c.1 = icmp sge i8 %x, %y232 %x.ext = zext i8 %x to i16233 %y.ext = zext i8 %y to i16234 br i1 %c.1, label %bb1, label %bb2235 236bb1:237 %t.1 = icmp sge i16 %x.ext, %y.ext238 %c.2 = icmp sge i16 %x.ext, 10239 %r.1 = xor i1 %t.1, %c.2240 %c.3 = icmp sge i16 %y.ext, %x.ext241 %r.2 = xor i1 %r.1, %c.3242 %c.4 = icmp sge i16 10, %x.ext243 %r.3 = xor i1 %r.2, %c.4244 ret i1 %r.3245 246bb2:247 %t.2 = icmp sge i16 %y.ext, %x.ext248 %f.1 = icmp sge i16 %x.ext, %y.ext249 %r.4 = xor i1 %t.2, %f.1250 %c.5 = icmp sge i16 %x.ext, 10251 %r.5 = xor i1 %r.4, %c.5252 %c.6 = icmp sge i16 10, %x.ext253 %r.6 = xor i1 %r.5, %c.6254 ret i1 %r.6255}256 257define i1 @test_pr58009_const_zext() {258; CHECK-LABEL: @test_pr58009_const_zext(259; CHECK-NEXT: entry:260; CHECK-NEXT: [[EXT_T_1:%.*]] = zext i1 true to i16261; CHECK-NEXT: [[EXT_T_2:%.*]] = zext i1 true to i16262; CHECK-NEXT: [[RES_1:%.*]] = xor i1 true, false263; CHECK-NEXT: [[EXT_F_1:%.*]] = zext i1 false to i16264; CHECK-NEXT: [[EXT_F_2:%.*]] = zext i1 false to i16265; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], true266; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[RES_2]], false267; CHECK-NEXT: [[T_3:%.*]] = icmp ult i16 [[EXT_F_1]], [[EXT_T_2]]268; CHECK-NEXT: [[F_3:%.*]] = icmp ugt i16 [[EXT_F_1]], [[EXT_T_2]]269; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_3]], [[T_3]]270; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[F_3]]271; CHECK-NEXT: ret i1 [[RES_5]]272;273entry:274 %ext.t.1 = zext i1 true to i16275 %ext.t.2 = zext i1 true to i16276 %t.1 = icmp uge i16 %ext.t.1, %ext.t.2277 %f.1 = icmp ugt i16 %ext.t.1, %ext.t.2278 %res.1 = xor i1 %t.1, %f.1279 280 %ext.f.1 = zext i1 false to i16281 %ext.f.2 = zext i1 false to i16282 %t.2 = icmp uge i16 %ext.f.1, %ext.f.2283 %f.2 = icmp ugt i16 %ext.f.1, %ext.f.2284 %res.2 = xor i1 %res.1, %t.2285 %res.3 = xor i1 %res.2, %f.2286 287 %t.3 = icmp ult i16 %ext.f.1, %ext.t.2288 %f.3 = icmp ugt i16 %ext.f.1, %ext.t.2289 %res.4 = xor i1 %res.3, %t.3290 %res.5 = xor i1 %res.4, %f.3291 292 ret i1 %res.5293}294