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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=correlated-propagation -S %s | FileCheck %s3 4target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-apple-macosx10.10.0"6 7declare void @check1(i1) #18declare void @check2(i1) #19declare void @llvm.assume(i1)10 11; Make sure we propagate the value of %tmp35 to the true/false cases12 13define void @test1(i64 %tmp35) {14; CHECK-LABEL: @test1(15; CHECK-NEXT:  bb:16; CHECK-NEXT:    [[TMP36:%.*]] = icmp sgt i64 [[TMP35:%.*]], 017; CHECK-NEXT:    br i1 [[TMP36]], label [[BB_TRUE:%.*]], label [[BB_FALSE:%.*]]18; CHECK:       bb_true:19; CHECK-NEXT:    tail call void @check1(i1 false) #[[ATTR2:[0-9]+]]20; CHECK-NEXT:    unreachable21; CHECK:       bb_false:22; CHECK-NEXT:    tail call void @check2(i1 true) #[[ATTR2]]23; CHECK-NEXT:    unreachable24;25bb:26  %tmp36 = icmp sgt i64 %tmp35, 027  br i1 %tmp36, label %bb_true, label %bb_false28 29bb_true:30  %tmp47 = icmp slt i64 %tmp35, 031  tail call void @check1(i1 %tmp47) #432  unreachable33 34bb_false:35  %tmp48 = icmp sle i64 %tmp35, 036  tail call void @check2(i1 %tmp48) #437  unreachable38}39 40; This is the same as test1 but with a diamond to ensure we41; get %tmp36 from both true and false BBs.42 43define void @test2(i64 %tmp35, i1 %inner_cmp) {44; CHECK-LABEL: @test2(45; CHECK-NEXT:  bb:46; CHECK-NEXT:    [[TMP36:%.*]] = icmp sgt i64 [[TMP35:%.*]], 047; CHECK-NEXT:    br i1 [[TMP36]], label [[BB_TRUE:%.*]], label [[BB_FALSE:%.*]]48; CHECK:       bb_true:49; CHECK-NEXT:    br i1 [[INNER_CMP:%.*]], label [[INNER_TRUE:%.*]], label [[INNER_FALSE:%.*]]50; CHECK:       inner_true:51; CHECK-NEXT:    br label [[MERGE:%.*]]52; CHECK:       inner_false:53; CHECK-NEXT:    br label [[MERGE]]54; CHECK:       merge:55; CHECK-NEXT:    tail call void @check1(i1 false)56; CHECK-NEXT:    unreachable57; CHECK:       bb_false:58; CHECK-NEXT:    tail call void @check2(i1 true) #[[ATTR2]]59; CHECK-NEXT:    unreachable60;61bb:62  %tmp36 = icmp sgt i64 %tmp35, 063  br i1 %tmp36, label %bb_true, label %bb_false64 65bb_true:66  br i1 %inner_cmp, label %inner_true, label %inner_false67 68inner_true:69  br label %merge70 71inner_false:72  br label %merge73 74merge:75  %tmp47 = icmp slt i64 %tmp35, 076  tail call void @check1(i1 %tmp47) #077  unreachable78 79bb_false:80  %tmp48 = icmp sle i64 %tmp35, 081  tail call void @check2(i1 %tmp48) #482  unreachable83}84 85; Make sure binary operator transfer functions are run when RHS is non-constant86 87define i1 @test3(i32 %x, i32 %y) #0 {88; CHECK-LABEL: @test3(89; CHECK-NEXT:  entry:90; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 1091; CHECK-NEXT:    br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]92; CHECK:       cont1:93; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 1094; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]95; CHECK:       cont2:96; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[X]], [[Y]]97; CHECK-NEXT:    br label [[OUT]]98; CHECK:       out:99; CHECK-NEXT:    ret i1 true100;101entry:102  %cmp1 = icmp ult i32 %x, 10103  br i1 %cmp1, label %cont1, label %out104 105cont1:106  %cmp2 = icmp ult i32 %y, 10107  br i1 %cmp2, label %cont2, label %out108 109cont2:110  %add = add i32 %x, %y111  %cmp3 = icmp ult i32 %add, 25112  br label %out113 114out:115  %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]116  ret i1 %ret117}118 119; Same as previous but make sure nobody gets over-zealous120 121define i1 @test4(i32 %x, i32 %y) #0 {122; CHECK-LABEL: @test4(123; CHECK-NEXT:  entry:124; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 10125; CHECK-NEXT:    br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]126; CHECK:       cont1:127; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 10128; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]129; CHECK:       cont2:130; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[X]], [[Y]]131; CHECK-NEXT:    [[CMP3:%.*]] = icmp samesign ult i32 [[ADD]], 15132; CHECK-NEXT:    br label [[OUT]]133; CHECK:       out:134; CHECK-NEXT:    [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]135; CHECK-NEXT:    ret i1 [[RET]]136;137entry:138  %cmp1 = icmp ult i32 %x, 10139  br i1 %cmp1, label %cont1, label %out140 141cont1:142  %cmp2 = icmp ult i32 %y, 10143  br i1 %cmp2, label %cont2, label %out144 145cont2:146  %add = add i32 %x, %y147  %cmp3 = icmp ult i32 %add, 15148  br label %out149 150out:151  %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]152  ret i1 %ret153}154 155; Make sure binary operator transfer functions are run when RHS is non-constant156 157define i1 @test5(i32 %x, i32 %y) #0 {158; CHECK-LABEL: @test5(159; CHECK-NEXT:  entry:160; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 5161; CHECK-NEXT:    br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]162; CHECK:       cont1:163; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 5164; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]165; CHECK:       cont2:166; CHECK-NEXT:    [[SHIFTED:%.*]] = shl nuw nsw i32 [[X]], [[Y]]167; CHECK-NEXT:    br label [[OUT]]168; CHECK:       out:169; CHECK-NEXT:    ret i1 true170;171entry:172  %cmp1 = icmp ult i32 %x, 5173  br i1 %cmp1, label %cont1, label %out174 175cont1:176  %cmp2 = icmp ult i32 %y, 5177  br i1 %cmp2, label %cont2, label %out178 179cont2:180  %shifted = shl i32 %x, %y181  %cmp3 = icmp ult i32 %shifted, 65536182  br label %out183 184out:185  %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]186  ret i1 %ret187}188 189; Same as previous but make sure nobody gets over-zealous190 191define i1 @test6(i32 %x, i32 %y) #0 {192; CHECK-LABEL: @test6(193; CHECK-NEXT:  entry:194; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 5195; CHECK-NEXT:    br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]196; CHECK:       cont1:197; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 15198; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]199; CHECK:       cont2:200; CHECK-NEXT:    [[SHIFTED:%.*]] = shl nuw nsw i32 [[X]], [[Y]]201; CHECK-NEXT:    [[CMP3:%.*]] = icmp samesign ult i32 [[SHIFTED]], 65536202; CHECK-NEXT:    br label [[OUT]]203; CHECK:       out:204; CHECK-NEXT:    [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]205; CHECK-NEXT:    ret i1 [[RET]]206;207entry:208  %cmp1 = icmp ult i32 %x, 5209  br i1 %cmp1, label %cont1, label %out210 211cont1:212  %cmp2 = icmp ult i32 %y, 15213  br i1 %cmp2, label %cont2, label %out214 215cont2:216  %shifted = shl i32 %x, %y217  %cmp3 = icmp ult i32 %shifted, 65536218  br label %out219 220out:221  %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]222  ret i1 %ret223}224 225define i1 @test7(i32 %a, i32 %b) {226; CHECK-LABEL: @test7(227; CHECK-NEXT:  begin:228; CHECK-NEXT:    [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0229; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0230; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]231; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]232; CHECK:       bb:233; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 [[A]], [[B]]234; CHECK-NEXT:    [[RES:%.*]] = icmp sge i32 [[ADD]], 0235; CHECK-NEXT:    br label [[EXIT]]236; CHECK:       exit:237; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]238; CHECK-NEXT:    ret i1 [[IV]]239;240begin:241  %cmp0 = icmp sge i32 %a, 0242  %cmp1 = icmp sge i32 %b, 0243  %br = and i1 %cmp0, %cmp1244  br i1 %br, label %bb, label %exit245 246bb:247  %add = add i32 %a, %b248  %res = icmp sge i32 %add, 0249  br label %exit250 251exit:252  %iv = phi i1 [ true, %begin ], [ %res, %bb ]253  ret i1 %iv254}255 256define i1 @test8(i32 %a, i32 %b) {257; CHECK-LABEL: @test8(258; CHECK-NEXT:  begin:259; CHECK-NEXT:    [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0260; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0261; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]262; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]263; CHECK:       bb:264; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[A]], [[B]]265; CHECK-NEXT:    br label [[EXIT]]266; CHECK:       exit:267; CHECK-NEXT:    ret i1 true268;269begin:270  %cmp0 = icmp sge i32 %a, 0271  %cmp1 = icmp sge i32 %b, 0272  %br = and i1 %cmp0, %cmp1273  br i1 %br, label %bb, label %exit274 275bb:276  %add = add nsw i32 %a, %b277  %res = icmp sge i32 %add, 0278  br label %exit279 280exit:281  %iv = phi i1 [ true, %begin ], [ %res, %bb ]282  ret i1 %iv283}284 285define i1 @test10(i32 %a, i32 %b) {286; CHECK-LABEL: @test10(287; CHECK-NEXT:  begin:288; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i32 [[A:%.*]], -256289; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]290; CHECK:       bb:291; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[A]], [[B:%.*]]292; CHECK-NEXT:    [[RES:%.*]] = icmp uge i32 [[ADD]], -256293; CHECK-NEXT:    br label [[EXIT]]294; CHECK:       exit:295; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]296; CHECK-NEXT:    ret i1 [[IV]]297;298begin:299  %cmp = icmp uge i32 %a, 4294967040300  br i1 %cmp, label %bb, label %exit301 302bb:303  %add = add i32 %a, %b304  %res = icmp uge i32 %add, 4294967040305  br label %exit306 307exit:308  %iv = phi i1 [ true, %begin ], [ %res, %bb ]309  ret i1 %iv310}311 312define i1 @test11(i32 %a, i32 %b) {313; CHECK-LABEL: @test11(314; CHECK-NEXT:  begin:315; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i32 [[A:%.*]], -256316; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]317; CHECK:       bb:318; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 [[A]], [[B:%.*]]319; CHECK-NEXT:    br label [[EXIT]]320; CHECK:       exit:321; CHECK-NEXT:    ret i1 true322;323begin:324  %cmp = icmp uge i32 %a, 4294967040325  br i1 %cmp, label %bb, label %exit326 327bb:328  %add = add nuw i32 %a, %b329  %res = icmp uge i32 %add, 4294967040330  br label %exit331 332exit:333  %iv = phi i1 [ true, %begin ], [ %res, %bb ]334  ret i1 %iv335}336 337define i1 @test12(i32 %x) {338; CHECK-LABEL: @test12(339; CHECK-NEXT:    [[ZEXT:%.*]] = zext i32 [[X:%.*]] to i64340; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i64 [[ZEXT]], 7341; CHECK-NEXT:    [[SHR:%.*]] = lshr i64 [[MUL]], 32342; CHECK-NEXT:    [[TRUNC:%.*]] = trunc nuw nsw i64 [[SHR]] to i32343; CHECK-NEXT:    ret i1 true344;345  %zext = zext i32 %x to i64346  %mul = mul nuw i64 %zext, 7347  %shr = lshr i64 %mul, 32348  %trunc = trunc i64 %shr to i32349  %cmp = icmp ult i32 %trunc, 7350  ret i1 %cmp351}352 353define i1 @test13(i8 %x, ptr %p) {354; CHECK-LABEL: @test13(355; CHECK-NEXT:    [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i64356; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i64 [[ZEXT]], 128357; CHECK-NEXT:    store i64 [[ADD]], ptr [[P:%.*]], align 8358; CHECK-NEXT:    ret i1 true359;360  %zext = zext i8 %x to i64361  %add = add nuw nsw i64 %zext, 128362  %cmp = icmp ult i64 %add, 384363  ; Without this extra use, InstSimplify could handle this364  store i64 %add, ptr %p365  ret i1 %cmp366}367 368define i1 @test14(i32 %a, i32 %b) {369; CHECK-LABEL: @test14(370; CHECK-NEXT:  begin:371; CHECK-NEXT:    [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0372; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0373; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]374; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]375; CHECK:       bb:376; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]377; CHECK-NEXT:    [[RES:%.*]] = icmp sge i32 [[SUB]], 0378; CHECK-NEXT:    br label [[EXIT]]379; CHECK:       exit:380; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]381; CHECK-NEXT:    ret i1 [[IV]]382;383begin:384  %cmp0 = icmp sge i32 %a, 0385  %cmp1 = icmp sge i32 %b, 0386  %br = and i1 %cmp0, %cmp1387  br i1 %br, label %bb, label %exit388 389bb:390  %sub = sub i32 %a, %b391  %res = icmp sge i32 %sub, 0392  br label %exit393 394exit:395  %iv = phi i1 [ true, %begin ], [ %res, %bb ]396  ret i1 %iv397}398 399define i1 @test15(i32 %a, i32 %b) {400; CHECK-LABEL: @test15(401; CHECK-NEXT:  begin:402; CHECK-NEXT:    [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0403; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0404; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]405; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]406; CHECK:       bb:407; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]408; CHECK-NEXT:    [[RES:%.*]] = icmp sge i32 [[SUB]], 0409; CHECK-NEXT:    br label [[EXIT]]410; CHECK:       exit:411; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]412; CHECK-NEXT:    ret i1 [[IV]]413;414begin:415  %cmp0 = icmp sge i32 %a, 0416  %cmp1 = icmp sge i32 %b, 0417  %br = and i1 %cmp0, %cmp1418  br i1 %br, label %bb, label %exit419 420bb:421  %sub = sub nsw i32 %a, %b422  %res = icmp sge i32 %sub, 0423  br label %exit424 425exit:426  %iv = phi i1 [ true, %begin ], [ %res, %bb ]427  ret i1 %iv428}429 430define i1 @test16(i32 %a, i32 %b) {431; CHECK-LABEL: @test16(432; CHECK-NEXT:  begin:433; CHECK-NEXT:    [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0434; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0435; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]436; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]437; CHECK:       bb:438; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], [[B]]439; CHECK-NEXT:    br label [[EXIT]]440; CHECK:       exit:441; CHECK-NEXT:    ret i1 true442;443begin:444  %cmp0 = icmp sge i32 %a, 0445  %cmp1 = icmp sge i32 %b, 0446  %br = and i1 %cmp0, %cmp1447  br i1 %br, label %bb, label %exit448 449bb:450  %sub = sub nuw i32 %a, %b451  %res = icmp sge i32 %sub, 0452  br label %exit453 454exit:455  %iv = phi i1 [ true, %begin ], [ %res, %bb ]456  ret i1 %iv457}458 459define i1 @test17(i32 %a, i32 %b) {460; CHECK-LABEL: @test17(461; CHECK-NEXT:  begin:462; CHECK-NEXT:    [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0463; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0464; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]465; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]466; CHECK:       bb:467; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], [[B]]468; CHECK-NEXT:    [[RES:%.*]] = icmp sle i32 [[SUB]], 0469; CHECK-NEXT:    br label [[EXIT]]470; CHECK:       exit:471; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]472; CHECK-NEXT:    ret i1 [[IV]]473;474begin:475  %cmp0 = icmp sle i32 %a, 0476  %cmp1 = icmp sge i32 %b, 0477  %br = and i1 %cmp0, %cmp1478  br i1 %br, label %bb, label %exit479 480bb:481  %sub = sub i32 %a, %b482  %res = icmp sle i32 %sub, 0483  br label %exit484 485exit:486  %iv = phi i1 [ true, %begin ], [ %res, %bb ]487  ret i1 %iv488}489 490define i1 @test18(i32 %a, i32 %b) {491; CHECK-LABEL: @test18(492; CHECK-NEXT:  begin:493; CHECK-NEXT:    [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0494; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0495; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]496; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]497; CHECK:       bb:498; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], [[B]]499; CHECK-NEXT:    [[RES:%.*]] = icmp sle i32 [[SUB]], 0500; CHECK-NEXT:    br label [[EXIT]]501; CHECK:       exit:502; CHECK-NEXT:    [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]503; CHECK-NEXT:    ret i1 [[IV]]504;505begin:506  %cmp0 = icmp sle i32 %a, 0507  %cmp1 = icmp sge i32 %b, 0508  %br = and i1 %cmp0, %cmp1509  br i1 %br, label %bb, label %exit510 511bb:512  %sub = sub nuw i32 %a, %b513  %res = icmp sle i32 %sub, 0514  br label %exit515 516exit:517  %iv = phi i1 [ true, %begin ], [ %res, %bb ]518  ret i1 %iv519}520 521define i1 @test19(i32 %a, i32 %b) {522; CHECK-LABEL: @test19(523; CHECK-NEXT:  begin:524; CHECK-NEXT:    [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0525; CHECK-NEXT:    [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0526; CHECK-NEXT:    [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]527; CHECK-NEXT:    br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]528; CHECK:       bb:529; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]530; CHECK-NEXT:    br label [[EXIT]]531; CHECK:       exit:532; CHECK-NEXT:    ret i1 true533;534begin:535  %cmp0 = icmp sle i32 %a, 0536  %cmp1 = icmp sge i32 %b, 0537  %br = and i1 %cmp0, %cmp1538  br i1 %br, label %bb, label %exit539 540bb:541  %sub = sub nsw i32 %a, %b542  %res = icmp sle i32 %sub, 0543  br label %exit544 545exit:546  %iv = phi i1 [ true, %begin ], [ %res, %bb ]547  ret i1 %iv548}549 550define i1 @test_br_cmp_with_offset(i64 %idx) {551; CHECK-LABEL: @test_br_cmp_with_offset(552; CHECK-NEXT:    [[IDX_OFF1:%.*]] = add i64 [[IDX:%.*]], -5553; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[IDX_OFF1]], 3554; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]555; CHECK:       if.true:556; CHECK-NEXT:    [[IDX_OFF2:%.*]] = add nsw i64 [[IDX]], -1557; CHECK-NEXT:    ret i1 true558; CHECK:       if.false:559; CHECK-NEXT:    ret i1 undef560;561  %idx.off1 = add i64 %idx, -5562  %cmp1 = icmp ult i64 %idx.off1, 3563  br i1 %cmp1, label %if.true, label %if.false564 565if.true:566  %idx.off2 = add i64 %idx, -1567  %cmp2 = icmp ult i64 %idx.off2, 10568  ret i1 %cmp2569 570if.false:571  ret i1 undef572}573 574define i1 @test_assume_cmp_with_offset(i64 %idx) {575; CHECK-LABEL: @test_assume_cmp_with_offset(576; CHECK-NEXT:    [[IDX_OFF1:%.*]] = add i64 [[IDX:%.*]], -5577; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[IDX_OFF1]], 3578; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP1]])579; CHECK-NEXT:    [[IDX_OFF2:%.*]] = add nsw i64 [[IDX]], -1580; CHECK-NEXT:    ret i1 true581;582  %idx.off1 = add i64 %idx, -5583  %cmp1 = icmp ult i64 %idx.off1, 3584  tail call void @llvm.assume(i1 %cmp1)585  %idx.off2 = add i64 %idx, -1586  %cmp2 = icmp ult i64 %idx.off2, 10587  ret i1 %cmp2588}589 590define i1 @test_assume_cmp_with_offset_or(i64 %idx, i1 %other) {591; CHECK-LABEL: @test_assume_cmp_with_offset_or(592; CHECK-NEXT:    [[IDX_OFF1:%.*]] = or disjoint i64 [[IDX:%.*]], 5593; CHECK-NEXT:    [[CMP1:%.*]] = icmp ugt i64 [[IDX_OFF1]], 10594; CHECK-NEXT:    br i1 [[CMP1]], label [[T:%.*]], label [[F:%.*]]595; CHECK:       T:596; CHECK-NEXT:    ret i1 true597; CHECK:       F:598; CHECK-NEXT:    ret i1 [[OTHER:%.*]]599;600  %idx.off1 = or disjoint i64 %idx, 5601  %cmp1 = icmp ugt i64 %idx.off1, 10602  br i1 %cmp1, label %T, label %F603T:604  %cmp2 = icmp ugt i64 %idx, 2605  ret i1 %cmp2606F:607  ret i1 %other608}609 610define void @test_cmp_phi(i8 %a) {611; CHECK-LABEL: @test_cmp_phi(612; CHECK-NEXT:  entry:613; CHECK-NEXT:    [[C0:%.*]] = icmp ult i8 [[A:%.*]], 2614; CHECK-NEXT:    br i1 [[C0]], label [[LOOP:%.*]], label [[EXIT:%.*]]615; CHECK:       loop:616; CHECK-NEXT:    [[P:%.*]] = phi i8 [ [[A]], [[ENTRY:%.*]] ], [ [[B:%.*]], [[LOOP]] ]617; CHECK-NEXT:    [[C1:%.*]] = icmp ne i8 [[P]], 0618; CHECK-NEXT:    [[C4:%.*]] = call i1 @get_bool()619; CHECK-NEXT:    [[B]] = zext i1 [[C4]] to i8620; CHECK-NEXT:    br i1 [[C1]], label [[LOOP]], label [[EXIT]]621; CHECK:       exit:622; CHECK-NEXT:    ret void623;624entry:625  %c0 = icmp ult i8 %a, 2626  br i1 %c0, label %loop, label %exit627 628loop:629  %p = phi i8 [ %a, %entry ], [ %b, %loop ]630  %c1 = icmp ne i8 %p, 0631  %c2 = icmp ne i8 %p, 2632  %c3 = and i1 %c1, %c2633  %c4 = call i1 @get_bool()634  %b = zext i1 %c4 to i8635  br i1 %c3, label %loop, label %exit636 637exit:638  ret void639}640 641declare i1 @get_bool()642 643define void @test_icmp_or_ult(i32 %a, i32 %b) {644; CHECK-LABEL: @test_icmp_or_ult(645; CHECK-NEXT:  entry:646; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A:%.*]], [[B:%.*]]647; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[OR]], 42648; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]649; CHECK:       if.true:650; CHECK-NEXT:    call void @check1(i1 true)651; CHECK-NEXT:    call void @check1(i1 true)652; CHECK-NEXT:    ret void653; CHECK:       if.false:654; CHECK-NEXT:    [[CMP4:%.*]] = icmp uge i32 [[A]], 42655; CHECK-NEXT:    call void @check1(i1 [[CMP4]])656; CHECK-NEXT:    [[CMP5:%.*]] = icmp uge i32 [[B]], 42657; CHECK-NEXT:    call void @check1(i1 [[CMP5]])658; CHECK-NEXT:    ret void659;660entry:661  %or = or i32 %a, %b662  %cmp = icmp ult i32 %or, 42663  br i1 %cmp, label %if.true, label %if.false664 665if.true:666  %cmp2 = icmp ult i32 %a, 42667  call void @check1(i1 %cmp2)668  %cmp3 = icmp ult i32 %b, 42669  call void @check1(i1 %cmp3)670  ret void671 672if.false:673  %cmp4 = icmp uge i32 %a, 42674  call void @check1(i1 %cmp4)675  %cmp5 = icmp uge i32 %b, 42676  call void @check1(i1 %cmp5)677  ret void678}679 680define void @test_icmp_or_ule(i32 %a, i32 %b) {681; CHECK-LABEL: @test_icmp_or_ule(682; CHECK-NEXT:  entry:683; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A:%.*]], [[B:%.*]]684; CHECK-NEXT:    [[CMP:%.*]] = icmp ule i32 [[OR]], 42685; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]686; CHECK:       if.true:687; CHECK-NEXT:    call void @check1(i1 true)688; CHECK-NEXT:    call void @check1(i1 true)689; CHECK-NEXT:    ret void690; CHECK:       if.false:691; CHECK-NEXT:    [[CMP4:%.*]] = icmp ugt i32 [[A]], 42692; CHECK-NEXT:    call void @check1(i1 [[CMP4]])693; CHECK-NEXT:    [[CMP5:%.*]] = icmp ugt i32 [[B]], 42694; CHECK-NEXT:    call void @check1(i1 [[CMP5]])695; CHECK-NEXT:    ret void696;697entry:698  %or = or i32 %a, %b699  %cmp = icmp ule i32 %or, 42700  br i1 %cmp, label %if.true, label %if.false701 702if.true:703  %cmp2 = icmp ule i32 %a, 42704  call void @check1(i1 %cmp2)705  %cmp3 = icmp ule i32 %b, 42706  call void @check1(i1 %cmp3)707  ret void708 709if.false:710  %cmp4 = icmp ugt i32 %a, 42711  call void @check1(i1 %cmp4)712  %cmp5 = icmp ugt i32 %b, 42713  call void @check1(i1 %cmp5)714  ret void715}716 717define void @test_icmp_or_ugt(i32 %a, i32 %b) {718; CHECK-LABEL: @test_icmp_or_ugt(719; CHECK-NEXT:  entry:720; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A:%.*]], [[B:%.*]]721; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[OR]], 42722; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]723; CHECK:       if.true:724; CHECK-NEXT:    [[CMP2:%.*]] = icmp ugt i32 [[A]], 42725; CHECK-NEXT:    call void @check1(i1 [[CMP2]])726; CHECK-NEXT:    [[CMP3:%.*]] = icmp ugt i32 [[B]], 42727; CHECK-NEXT:    call void @check1(i1 [[CMP3]])728; CHECK-NEXT:    ret void729; CHECK:       if.false:730; CHECK-NEXT:    call void @check1(i1 true)731; CHECK-NEXT:    call void @check1(i1 true)732; CHECK-NEXT:    ret void733;734entry:735  %or = or i32 %a, %b736  %cmp = icmp ugt i32 %or, 42737  br i1 %cmp, label %if.true, label %if.false738 739if.true:740  %cmp2 = icmp ugt i32 %a, 42741  call void @check1(i1 %cmp2)742  %cmp3 = icmp ugt i32 %b, 42743  call void @check1(i1 %cmp3)744  ret void745 746if.false:747  %cmp4 = icmp ule i32 %a, 42748  call void @check1(i1 %cmp4)749  %cmp5 = icmp ule i32 %b, 42750  call void @check1(i1 %cmp5)751  ret void752}753 754define void @test_icmp_or_uge(i32 %a, i32 %b) {755; CHECK-LABEL: @test_icmp_or_uge(756; CHECK-NEXT:  entry:757; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A:%.*]], [[B:%.*]]758; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i32 [[OR]], 42759; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]760; CHECK:       if.true:761; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i32 [[A]], 42762; CHECK-NEXT:    call void @check1(i1 [[CMP2]])763; CHECK-NEXT:    [[CMP3:%.*]] = icmp uge i32 [[B]], 42764; CHECK-NEXT:    call void @check1(i1 [[CMP3]])765; CHECK-NEXT:    ret void766; CHECK:       if.false:767; CHECK-NEXT:    call void @check1(i1 true)768; CHECK-NEXT:    call void @check1(i1 true)769; CHECK-NEXT:    ret void770;771entry:772  %or = or i32 %a, %b773  %cmp = icmp uge i32 %or, 42774  br i1 %cmp, label %if.true, label %if.false775 776if.true:777  %cmp2 = icmp uge i32 %a, 42778  call void @check1(i1 %cmp2)779  %cmp3 = icmp uge i32 %b, 42780  call void @check1(i1 %cmp3)781  ret void782 783if.false:784  %cmp4 = icmp ult i32 %a, 42785  call void @check1(i1 %cmp4)786  %cmp5 = icmp ult i32 %b, 42787  call void @check1(i1 %cmp5)788  ret void789}790 791define void @test_icmp_or_slt(i32 %a, i32 %b) {792; CHECK-LABEL: @test_icmp_or_slt(793; CHECK-NEXT:  entry:794; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A:%.*]], [[B:%.*]]795; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[OR]], 42796; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]797; CHECK:       if.true:798; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i32 [[A]], 42799; CHECK-NEXT:    call void @check1(i1 [[CMP2]])800; CHECK-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[B]], 42801; CHECK-NEXT:    call void @check1(i1 [[CMP3]])802; CHECK-NEXT:    ret void803; CHECK:       if.false:804; CHECK-NEXT:    [[CMP4:%.*]] = icmp sge i32 [[A]], 42805; CHECK-NEXT:    call void @check1(i1 [[CMP4]])806; CHECK-NEXT:    [[CMP5:%.*]] = icmp sge i32 [[B]], 42807; CHECK-NEXT:    call void @check1(i1 [[CMP5]])808; CHECK-NEXT:    ret void809;810entry:811  %or = or i32 %a, %b812  %cmp = icmp slt i32 %or, 42813  br i1 %cmp, label %if.true, label %if.false814 815if.true:816  %cmp2 = icmp slt i32 %a, 42817  call void @check1(i1 %cmp2)818  %cmp3 = icmp slt i32 %b, 42819  call void @check1(i1 %cmp3)820  ret void821 822if.false:823  %cmp4 = icmp sge i32 %a, 42824  call void @check1(i1 %cmp4)825  %cmp5 = icmp sge i32 %b, 42826  call void @check1(i1 %cmp5)827  ret void828}829 830define void @test_icmp_and_ugt(i32 %a, i32 %b) {831; CHECK-LABEL: @test_icmp_and_ugt(832; CHECK-NEXT:  entry:833; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]834; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[AND]], 42835; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]836; CHECK:       if.true:837; CHECK-NEXT:    call void @check1(i1 true)838; CHECK-NEXT:    call void @check1(i1 true)839; CHECK-NEXT:    ret void840; CHECK:       if.false:841; CHECK-NEXT:    [[CMP4:%.*]] = icmp ule i32 [[A]], 42842; CHECK-NEXT:    call void @check1(i1 [[CMP4]])843; CHECK-NEXT:    [[CMP5:%.*]] = icmp ule i32 [[B]], 42844; CHECK-NEXT:    call void @check1(i1 [[CMP5]])845; CHECK-NEXT:    ret void846;847entry:848  %and = and i32 %a, %b849  %cmp = icmp ugt i32 %and, 42850  br i1 %cmp, label %if.true, label %if.false851 852if.true:853  %cmp2 = icmp ugt i32 %a, 42854  call void @check1(i1 %cmp2)855  %cmp3 = icmp ugt i32 %b, 42856  call void @check1(i1 %cmp3)857  ret void858 859if.false:860  %cmp4 = icmp ule i32 %a, 42861  call void @check1(i1 %cmp4)862  %cmp5 = icmp ule i32 %b, 42863  call void @check1(i1 %cmp5)864  ret void865}866 867define void @test_icmp_and_uge(i32 %a, i32 %b) {868; CHECK-LABEL: @test_icmp_and_uge(869; CHECK-NEXT:  entry:870; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]871; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i32 [[AND]], 42872; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]873; CHECK:       if.true:874; CHECK-NEXT:    call void @check1(i1 true)875; CHECK-NEXT:    call void @check1(i1 true)876; CHECK-NEXT:    ret void877; CHECK:       if.false:878; CHECK-NEXT:    [[CMP4:%.*]] = icmp ult i32 [[A]], 42879; CHECK-NEXT:    call void @check1(i1 [[CMP4]])880; CHECK-NEXT:    [[CMP5:%.*]] = icmp ult i32 [[B]], 42881; CHECK-NEXT:    call void @check1(i1 [[CMP5]])882; CHECK-NEXT:    ret void883;884entry:885  %and = and i32 %a, %b886  %cmp = icmp uge i32 %and, 42887  br i1 %cmp, label %if.true, label %if.false888 889if.true:890  %cmp2 = icmp uge i32 %a, 42891  call void @check1(i1 %cmp2)892  %cmp3 = icmp uge i32 %b, 42893  call void @check1(i1 %cmp3)894  ret void895 896if.false:897  %cmp4 = icmp ult i32 %a, 42898  call void @check1(i1 %cmp4)899  %cmp5 = icmp ult i32 %b, 42900  call void @check1(i1 %cmp5)901  ret void902}903 904define void @test_icmp_and_ult(i32 %a, i32 %b) {905; CHECK-LABEL: @test_icmp_and_ult(906; CHECK-NEXT:  entry:907; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]908; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[AND]], 42909; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]910; CHECK:       if.true:911; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[A]], 42912; CHECK-NEXT:    call void @check1(i1 [[CMP2]])913; CHECK-NEXT:    [[CMP3:%.*]] = icmp ult i32 [[B]], 42914; CHECK-NEXT:    call void @check1(i1 [[CMP3]])915; CHECK-NEXT:    ret void916; CHECK:       if.false:917; CHECK-NEXT:    call void @check1(i1 true)918; CHECK-NEXT:    call void @check1(i1 true)919; CHECK-NEXT:    ret void920;921entry:922  %and = and i32 %a, %b923  %cmp = icmp ult i32 %and, 42924  br i1 %cmp, label %if.true, label %if.false925 926if.true:927  %cmp2 = icmp ult i32 %a, 42928  call void @check1(i1 %cmp2)929  %cmp3 = icmp ult i32 %b, 42930  call void @check1(i1 %cmp3)931  ret void932 933if.false:934  %cmp4 = icmp uge i32 %a, 42935  call void @check1(i1 %cmp4)936  %cmp5 = icmp uge i32 %b, 42937  call void @check1(i1 %cmp5)938  ret void939}940 941define void @test_icmp_and_sgt(i32 %a, i32 %b) {942; CHECK-LABEL: @test_icmp_and_sgt(943; CHECK-NEXT:  entry:944; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]945; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[AND]], 42946; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]947; CHECK:       if.true:948; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[A]], 42949; CHECK-NEXT:    call void @check1(i1 [[CMP2]])950; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[B]], 42951; CHECK-NEXT:    call void @check1(i1 [[CMP3]])952; CHECK-NEXT:    ret void953; CHECK:       if.false:954; CHECK-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[A]], 42955; CHECK-NEXT:    call void @check1(i1 [[CMP4]])956; CHECK-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[B]], 42957; CHECK-NEXT:    call void @check1(i1 [[CMP5]])958; CHECK-NEXT:    ret void959;960entry:961  %and = and i32 %a, %b962  %cmp = icmp sgt i32 %and, 42963  br i1 %cmp, label %if.true, label %if.false964 965if.true:966  %cmp2 = icmp sgt i32 %a, 42967  call void @check1(i1 %cmp2)968  %cmp3 = icmp sgt i32 %b, 42969  call void @check1(i1 %cmp3)970  ret void971 972if.false:973  %cmp4 = icmp sle i32 %a, 42974  call void @check1(i1 %cmp4)975  %cmp5 = icmp sle i32 %b, 42976  call void @check1(i1 %cmp5)977  ret void978}979 980define void @test_icmp_mask_eq_two_values(i32 %a) {981; CHECK-LABEL: @test_icmp_mask_eq_two_values(982; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], -2983; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], 10984; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]985; CHECK:       if.true:986; CHECK-NEXT:    call void @check1(i1 true)987; CHECK-NEXT:    call void @check1(i1 true)988; CHECK-NEXT:    call void @check1(i1 false)989; CHECK-NEXT:    call void @check1(i1 false)990; CHECK-NEXT:    ret void991; CHECK:       if.false:992; CHECK-NEXT:    ret void993;994  %and = and i32 %a, -2995  %cmp = icmp eq i32 %and, 10996  br i1 %cmp, label %if.true, label %if.false997 998if.true:999  %cmp2 = icmp uge i32 %a, 101000  call void @check1(i1 %cmp2)1001  %cmp3 = icmp ule i32 %a, 111002  call void @check1(i1 %cmp3)1003  %cmp4 = icmp ult i32 %a, 101004  call void @check1(i1 %cmp4)1005  %cmp5 = icmp ugt i32 %a, 111006  call void @check1(i1 %cmp5)1007  ret void1008 1009if.false:1010  ret void1011}1012 1013define void @test_icmp_mask_eq_bit_set(i32 %a) {1014; CHECK-LABEL: @test_icmp_mask_eq_bit_set(1015; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 321016; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], 321017; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1018; CHECK:       if.true:1019; CHECK-NEXT:    call void @check1(i1 true)1020; CHECK-NEXT:    [[CMP3:%.*]] = icmp uge i32 [[A]], 331021; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1022; CHECK-NEXT:    ret void1023; CHECK:       if.false:1024; CHECK-NEXT:    ret void1025;1026  %and = and i32 %a, 321027  %cmp = icmp eq i32 %and, 321028  br i1 %cmp, label %if.true, label %if.false1029 1030if.true:1031  %cmp2 = icmp uge i32 %a, 321032  call void @check1(i1 %cmp2)1033  %cmp3 = icmp uge i32 %a, 331034  call void @check1(i1 %cmp3)1035  ret void1036 1037if.false:1038  ret void1039}1040 1041define void @test_icmp_mask_eq_bit_unset(i32 %a) {1042; CHECK-LABEL: @test_icmp_mask_eq_bit_unset(1043; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 321044; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], 01045; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1046; CHECK:       if.true:1047; CHECK-NEXT:    call void @check1(i1 true)1048; CHECK-NEXT:    [[CMP3:%.*]] = icmp ule i32 [[A]], -341049; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1050; CHECK-NEXT:    ret void1051; CHECK:       if.false:1052; CHECK-NEXT:    ret void1053;1054  %and = and i32 %a, 321055  %cmp = icmp eq i32 %and, 01056  br i1 %cmp, label %if.true, label %if.false1057 1058if.true:1059  %cmp2 = icmp ule i32 %a, -331060  call void @check1(i1 %cmp2)1061  %cmp3 = icmp ule i32 %a, -341062  call void @check1(i1 %cmp3)1063  ret void1064 1065if.false:1066  ret void1067}1068 1069define void @test_icmp_mask_eq_wrong_predicate(i32 %a) {1070; CHECK-LABEL: @test_icmp_mask_eq_wrong_predicate(1071; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], -21072; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[AND]], 101073; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1074; CHECK:       if.true:1075; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i32 [[A]], 101076; CHECK-NEXT:    call void @check1(i1 [[CMP2]])1077; CHECK-NEXT:    [[CMP3:%.*]] = icmp ule i32 [[A]], 111078; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1079; CHECK-NEXT:    [[CMP4:%.*]] = icmp ult i32 [[A]], 101080; CHECK-NEXT:    call void @check1(i1 [[CMP4]])1081; CHECK-NEXT:    [[CMP5:%.*]] = icmp ugt i32 [[A]], 111082; CHECK-NEXT:    call void @check1(i1 [[CMP5]])1083; CHECK-NEXT:    ret void1084; CHECK:       if.false:1085; CHECK-NEXT:    ret void1086;1087  %and = and i32 %a, -21088  %cmp = icmp ne i32 %and, 101089  br i1 %cmp, label %if.true, label %if.false1090 1091if.true:1092  %cmp2 = icmp uge i32 %a, 101093  call void @check1(i1 %cmp2)1094  %cmp3 = icmp ule i32 %a, 111095  call void @check1(i1 %cmp3)1096  %cmp4 = icmp ult i32 %a, 101097  call void @check1(i1 %cmp4)1098  %cmp5 = icmp ugt i32 %a, 111099  call void @check1(i1 %cmp5)1100  ret void1101 1102if.false:1103  ret void1104}1105 1106define void @test_icmp_mask_ne(i32 %a) {1107; CHECK-LABEL: @test_icmp_mask_ne(1108; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 61109; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[AND]], 01110; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1111; CHECK:       if.true:1112; CHECK-NEXT:    call void @check1(i1 true)1113; CHECK-NEXT:    [[CMP3:%.*]] = icmp ugt i32 [[A]], 21114; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1115; CHECK-NEXT:    [[CMP4:%.*]] = icmp ult i32 [[A]], -11116; CHECK-NEXT:    call void @check1(i1 [[CMP4]])1117; CHECK-NEXT:    ret void1118; CHECK:       if.false:1119; CHECK-NEXT:    ret void1120;1121  %and = and i32 %a, 61122  %cmp = icmp ne i32 %and, 01123  br i1 %cmp, label %if.true, label %if.false1124 1125if.true:1126  %cmp2 = icmp uge i32 %a, 21127  call void @check1(i1 %cmp2)1128  %cmp3 = icmp ugt i32 %a, 21129  call void @check1(i1 %cmp3)1130  %cmp4 = icmp ult i32 %a, -11131  call void @check1(i1 %cmp4)1132  ret void1133 1134if.false:1135  ret void1136}1137 1138define void @test_icmp_mask_ne_nonzero_cmp(i32 %a) {1139; CHECK-LABEL: @test_icmp_mask_ne_nonzero_cmp(1140; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 61141; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[AND]], 61142; CHECK-NEXT:    br i1 [[CMP]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1143; CHECK:       if.true:1144; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i32 [[A]], 21145; CHECK-NEXT:    call void @check1(i1 [[CMP2]])1146; CHECK-NEXT:    [[CMP3:%.*]] = icmp ugt i32 [[A]], 21147; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1148; CHECK-NEXT:    [[CMP4:%.*]] = icmp ult i32 [[A]], -11149; CHECK-NEXT:    call void @check1(i1 [[CMP4]])1150; CHECK-NEXT:    ret void1151; CHECK:       if.false:1152; CHECK-NEXT:    ret void1153;1154  %and = and i32 %a, 61155  %cmp = icmp ne i32 %and, 61156  br i1 %cmp, label %if.true, label %if.false1157 1158if.true:1159  %cmp2 = icmp uge i32 %a, 21160  call void @check1(i1 %cmp2)1161  %cmp3 = icmp ugt i32 %a, 21162  call void @check1(i1 %cmp3)1163  %cmp4 = icmp ult i32 %a, -11164  call void @check1(i1 %cmp4)1165  ret void1166 1167if.false:1168  ret void1169}1170 1171define void @test_icmp_mask_ne_zero_mask(i32 %a) {1172; CHECK-LABEL: @test_icmp_mask_ne_zero_mask(1173; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], 01174; CHECK-NEXT:    br i1 false, label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1175; CHECK:       if.true:1176; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[A]], 01177; CHECK-NEXT:    call void @check1(i1 [[CMP2]])1178; CHECK-NEXT:    ret void1179; CHECK:       if.false:1180; CHECK-NEXT:    ret void1181;1182  %and = and i32 %a, 01183  %cmp = icmp ne i32 %and, 01184  br i1 %cmp, label %if.true, label %if.false1185 1186if.true:1187  %cmp2 = icmp ne i32 %a, 01188  call void @check1(i1 %cmp2)1189  ret void1190 1191if.false:1192  ret void1193}1194 1195define void @non_const_range(i32 %a, i32 %b) {1196; CHECK-LABEL: @non_const_range(1197; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], 111198; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 211199; CHECK-NEXT:    [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1200; CHECK-NEXT:    br i1 [[AND]], label [[IF:%.*]], label [[ELSE:%.*]]1201; CHECK:       if:1202; CHECK-NEXT:    [[A_100:%.*]] = add nuw nsw i32 [[A]], 1001203; CHECK-NEXT:    call void @check1(i1 true)1204; CHECK-NEXT:    call void @check1(i1 false)1205; CHECK-NEXT:    [[A_10:%.*]] = add nuw nsw i32 [[A]], 101206; CHECK-NEXT:    [[CMP5:%.*]] = icmp ne i32 [[A_10]], [[B]]1207; CHECK-NEXT:    call void @check1(i1 [[CMP5]])1208; CHECK-NEXT:    [[CMP6:%.*]] = icmp eq i32 [[A_10]], [[B]]1209; CHECK-NEXT:    call void @check1(i1 [[CMP6]])1210; CHECK-NEXT:    ret void1211; CHECK:       else:1212; CHECK-NEXT:    ret void1213;1214  %cmp1 = icmp ult i32 %a, 111215  %cmp2 = icmp ult i32 %b, 211216  %and = select i1 %cmp1, i1 %cmp2, i1 false1217  br i1 %and, label %if, label %else1218 1219if:1220  %a.100 = add nuw nsw i32 %a, 1001221  %cmp3 = icmp ne i32 %a.100, %b1222  call void @check1(i1 %cmp3)1223  %cmp4 = icmp eq i32 %a.100, %b1224  call void @check1(i1 %cmp4)1225 1226  %a.10 = add nuw nsw i32 %a, 101227  %cmp5 = icmp ne i32 %a.10, %b1228  call void @check1(i1 %cmp5)1229  %cmp6 = icmp eq i32 %a.10, %b1230  call void @check1(i1 %cmp6)1231  ret void1232 1233else:1234  ret void1235}1236 1237define i1 @non_const_range_minmax(i8 %a, i8 %b) {1238; CHECK-LABEL: @non_const_range_minmax(1239; CHECK-NEXT:    [[A2:%.*]] = call i8 @llvm.umin.i8(i8 [[A:%.*]], i8 10)1240; CHECK-NEXT:    [[B2:%.*]] = call i8 @llvm.umax.i8(i8 [[B:%.*]], i8 11)1241; CHECK-NEXT:    ret i1 true1242;1243  %a2 = call i8 @llvm.umin.i8(i8 %a, i8 10)1244  %b2 = call i8 @llvm.umax.i8(i8 %b, i8 11)1245  %cmp1 = icmp ult i8 %a2, %b21246  ret i1 %cmp11247}1248 1249define <2 x i1> @non_const_range_minmax_vec(<2 x i8> %a, <2 x i8> %b) {1250; CHECK-LABEL: @non_const_range_minmax_vec(1251; CHECK-NEXT:    [[A2:%.*]] = call <2 x i8> @llvm.umin.v2i8(<2 x i8> [[A:%.*]], <2 x i8> splat (i8 10))1252; CHECK-NEXT:    [[B2:%.*]] = call <2 x i8> @llvm.umax.v2i8(<2 x i8> [[B:%.*]], <2 x i8> splat (i8 11))1253; CHECK-NEXT:    ret <2 x i1> splat (i1 true)1254;1255  %a2 = call <2 x i8> @llvm.umin.v2i8(<2 x i8> %a, <2 x i8> <i8 10, i8 10>)1256  %b2 = call <2 x i8> @llvm.umax.v2i8(<2 x i8> %b, <2 x i8> <i8 11, i8 11>)1257  %cmp1 = icmp ult <2 x i8> %a2, %b21258  ret <2 x i1> %cmp11259}1260 1261define void @ashr_sgt(i8 %x) {1262; CHECK-LABEL: @ashr_sgt(1263; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 21264; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[S]], 11265; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]1266; CHECK:       if:1267; CHECK-NEXT:    call void @check1(i1 true)1268; CHECK-NEXT:    [[C3:%.*]] = icmp samesign ugt i8 [[X]], 81269; CHECK-NEXT:    call void @check1(i1 [[C3]])1270; CHECK-NEXT:    ret void1271; CHECK:       else:1272; CHECK-NEXT:    ret void1273;1274  %s = ashr i8 %x, 21275  %c = icmp sgt i8 %s, 11276  br i1 %c, label %if, label %else1277if:1278  %c2 = icmp sgt i8 %x, 71279  call void @check1(i1 %c2)1280  %c3 = icmp sgt i8 %x, 81281  call void @check1(i1 %c3)1282  ret void1283else:1284  ret void1285}1286 1287define void @ashr_sge(i8 %x) {1288; CHECK-LABEL: @ashr_sge(1289; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 21290; CHECK-NEXT:    [[C:%.*]] = icmp sge i8 [[S]], 11291; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]1292; CHECK:       if:1293; CHECK-NEXT:    call void @check1(i1 true)1294; CHECK-NEXT:    [[C3:%.*]] = icmp samesign uge i8 [[X]], 51295; CHECK-NEXT:    call void @check1(i1 [[C3]])1296; CHECK-NEXT:    ret void1297; CHECK:       else:1298; CHECK-NEXT:    ret void1299;1300  %s = ashr i8 %x, 21301  %c = icmp sge i8 %s, 11302  br i1 %c, label %if, label %else1303if:1304  %c2 = icmp sge i8 %x, 41305  call void @check1(i1 %c2)1306  %c3 = icmp sge i8 %x, 51307  call void @check1(i1 %c3)1308  ret void1309else:1310  ret void1311}1312 1313define void @ashr_slt(i8 %x) {1314; CHECK-LABEL: @ashr_slt(1315; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 21316; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[S]], 11317; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]1318; CHECK:       if:1319; CHECK-NEXT:    call void @check1(i1 true)1320; CHECK-NEXT:    [[C3:%.*]] = icmp slt i8 [[X]], 31321; CHECK-NEXT:    call void @check1(i1 [[C3]])1322; CHECK-NEXT:    ret void1323; CHECK:       else:1324; CHECK-NEXT:    ret void1325;1326  %s = ashr i8 %x, 21327  %c = icmp slt i8 %s, 11328  br i1 %c, label %if, label %else1329if:1330  %c2 = icmp slt i8 %x, 41331  call void @check1(i1 %c2)1332  %c3 = icmp slt i8 %x, 31333  call void @check1(i1 %c3)1334  ret void1335else:1336  ret void1337}1338 1339define void @ashr_sle(i8 %x) {1340; CHECK-LABEL: @ashr_sle(1341; CHECK-NEXT:    [[S:%.*]] = ashr i8 [[X:%.*]], 21342; CHECK-NEXT:    [[C:%.*]] = icmp sle i8 [[S]], 11343; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]1344; CHECK:       if:1345; CHECK-NEXT:    call void @check1(i1 true)1346; CHECK-NEXT:    [[C3:%.*]] = icmp sle i8 [[X]], 61347; CHECK-NEXT:    call void @check1(i1 [[C3]])1348; CHECK-NEXT:    ret void1349; CHECK:       else:1350; CHECK-NEXT:    ret void1351;1352  %s = ashr i8 %x, 21353  %c = icmp sle i8 %s, 11354  br i1 %c, label %if, label %else1355if:1356  %c2 = icmp sle i8 %x, 71357  call void @check1(i1 %c2)1358  %c3 = icmp sle i8 %x, 61359  call void @check1(i1 %c3)1360  ret void1361else:1362  ret void1363}1364 1365declare i8 @llvm.umin.i8(i8, i8)1366declare i8 @llvm.umax.i8(i8, i8)1367declare <2 x i8> @llvm.umin.v2i8(<2 x i8>, <2 x i8>)1368declare <2 x i8> @llvm.umax.v2i8(<2 x i8>, <2 x i8>)1369 1370attributes #4 = { noreturn }1371 1372define i1 @pr69928(i64 noundef %arg, i64 noundef %arg1) {1373; CHECK-LABEL: @pr69928(1374; CHECK-NEXT:  entry:1375; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 644245094401376; CHECK-NEXT:    [[AND:%.*]] = and i64 [[ARG1:%.*]], 42949672951377; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ult i64 [[ARG]], [[AND]]1378; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1379; CHECK-NEXT:    ret i1 [[SELECT]]1380;1381entry:1382  %cmp1 = icmp ult i64 %arg, 644245094401383  %and = and i64 %arg1, 42949672951384  %cmp2 = icmp slt i64 %arg, %and1385  %select = select i1 %cmp1, i1 %cmp2, i1 false1386  ret i1 %select1387}1388 1389define i1 @test_select_flip(i64 noundef %arg) {1390; CHECK-LABEL: @test_select_flip(1391; CHECK-NEXT:  entry:1392; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 10001393; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ult i64 [[ARG]], 1001394; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1395; CHECK-NEXT:    ret i1 [[SELECT]]1396;1397entry:1398  %cmp1 = icmp ult i64 %arg, 10001399  %cmp2 = icmp slt i64 %arg, 1001400  %select = select i1 %cmp1, i1 %cmp2, i1 false1401  ret i1 %select1402}1403 1404define i1 @test_select_flip_fail1(i64 noundef %arg) {1405; CHECK-LABEL: @test_select_flip_fail1(1406; CHECK-NEXT:  entry:1407; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i64 [[ARG:%.*]], 10001408; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[ARG]], 1001409; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1410; CHECK-NEXT:    ret i1 [[SELECT]]1411;1412entry:1413  %cmp1 = icmp slt i64 %arg, 10001414  %cmp2 = icmp slt i64 %arg, 1001415  %select = select i1 %cmp1, i1 %cmp2, i1 false1416  ret i1 %select1417}1418 1419define i1 @test_select_flip_fail2(i64 noundef %arg) {1420; CHECK-LABEL: @test_select_flip_fail2(1421; CHECK-NEXT:  entry:1422; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 10001423; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[ARG]], 1001424; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 false, i1 [[CMP2]]1425; CHECK-NEXT:    ret i1 [[SELECT]]1426;1427entry:1428  %cmp1 = icmp ult i64 %arg, 10001429  %cmp2 = icmp slt i64 %arg, 1001430  %select = select i1 %cmp1, i1 false, i1 %cmp21431  ret i1 %select1432}1433 1434define i1 @test_select_flip_fail3(i64 noundef %arg, i64 noundef %arg1) {1435; CHECK-LABEL: @test_select_flip_fail3(1436; CHECK-NEXT:  entry:1437; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG1:%.*]], 10001438; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[ARG:%.*]], 1001439; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1440; CHECK-NEXT:    ret i1 [[SELECT]]1441;1442entry:1443  %cmp1 = icmp ult i64 %arg1, 10001444  %cmp2 = icmp slt i64 %arg, 1001445  %select = select i1 %cmp1, i1 %cmp2, i1 false1446  ret i1 %select1447}1448 1449define i1 @test_select_flip_fail4(i64 noundef %arg) {1450; CHECK-LABEL: @test_select_flip_fail4(1451; CHECK-NEXT:  entry:1452; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[ARG:%.*]], 1001453; CHECK-NEXT:    [[SELECT:%.*]] = select i1 true, i1 [[CMP2]], i1 false1454; CHECK-NEXT:    ret i1 [[SELECT]]1455;1456entry:1457  %cmp2 = icmp slt i64 %arg, 1001458  %select = select i1 true, i1 %cmp2, i1 false1459  ret i1 %select1460}1461 1462define i1 @test_select_flip_fail5(i64 noundef %arg, i64 noundef %arg1) {1463; CHECK-LABEL: @test_select_flip_fail5(1464; CHECK-NEXT:  entry:1465; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 10001466; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[ARG]], [[ARG1:%.*]]1467; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false1468; CHECK-NEXT:    ret i1 [[SELECT]]1469;1470entry:1471  %cmp1 = icmp ult i64 %arg, 10001472  %cmp2 = icmp slt i64 %arg, %arg11473  %select = select i1 %cmp1, i1 %cmp2, i1 false1474  ret i1 %select1475}1476 1477declare void @opaque()1478 1479define void @test_icmp_ne_from_implied_range(i32 noundef %arg) {1480; CHECK-LABEL: @test_icmp_ne_from_implied_range(1481; CHECK-NEXT:    [[AND_MASK:%.*]] = and i32 [[ARG:%.*]], -81482; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND_MASK]], -161483; CHECK-NEXT:    br i1 [[CMP]], label [[END:%.*]], label [[ELSE:%.*]]1484; CHECK:       else:1485; CHECK-NEXT:    br label [[END]]1486; CHECK:       sw.case:1487; CHECK-NEXT:    call void @opaque()1488; CHECK-NEXT:    br label [[END]]1489; CHECK:       end:1490; CHECK-NEXT:    ret void1491;1492  %and.mask = and i32 %arg, -81493  %cmp = icmp eq i32 %and.mask, -161494  br i1 %cmp, label %end, label %else1495 1496else:1497  ; %arg is within [-8, -16).1498  switch i32 %arg, label %end [1499  i32 -16, label %sw.case1500  i32 -12, label %sw.case1501  i32 -9, label %sw.case1502  ]1503 1504sw.case:1505  call void @opaque()1506  br label %end1507 1508end:1509  ; %arg is within [-16, -8).1510  ret void1511}1512 1513define void @test_trunc_bittest(i8 %a) {1514; CHECK-LABEL: @test_trunc_bittest(1515; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i8 [[A:%.*]] to i11516; CHECK-NEXT:    br i1 [[TRUNC]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1517; CHECK:       if.true:1518; CHECK-NEXT:    call void @check1(i1 true)1519; CHECK-NEXT:    call void @check1(i1 false)1520; CHECK-NEXT:    [[CMP3:%.*]] = icmp ne i8 [[A]], 11521; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1522; CHECK-NEXT:    [[CMP4:%.*]] = icmp eq i8 [[A]], 11523; CHECK-NEXT:    call void @check1(i1 [[CMP4]])1524; CHECK-NEXT:    [[CMP5:%.*]] = icmp ne i8 [[A]], -11525; CHECK-NEXT:    call void @check1(i1 [[CMP5]])1526; CHECK-NEXT:    [[CMP6:%.*]] = icmp eq i8 [[A]], -11527; CHECK-NEXT:    call void @check1(i1 [[CMP6]])1528; CHECK-NEXT:    ret void1529; CHECK:       if.false:1530; CHECK-NEXT:    ret void1531;1532  %trunc = trunc i8 %a to i11533  br i1 %trunc, label %if.true, label %if.false1534 1535if.true:1536  %cmp1 = icmp ne i8 %a, 01537  call void @check1(i1 %cmp1)1538  %cmp2 = icmp eq i8 %a, 01539  call void @check1(i1 %cmp2)1540  %cmp3 = icmp ne i8 %a, 11541  call void @check1(i1 %cmp3)1542  %cmp4 = icmp eq i8 %a, 11543  call void @check1(i1 %cmp4)1544  %cmp5 = icmp ne i8 %a, -11545  call void @check1(i1 %cmp5)1546  %cmp6 = icmp eq i8 %a, -11547  call void @check1(i1 %cmp6)1548  ret void1549 1550if.false:1551  ret void1552}1553 1554define void @test_trunc_not_bittest(i8 %a) {1555; CHECK-LABEL: @test_trunc_not_bittest(1556; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i8 [[A:%.*]] to i11557; CHECK-NEXT:    [[NOT:%.*]] = xor i1 [[TRUNC]], true1558; CHECK-NEXT:    br i1 [[NOT]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]]1559; CHECK:       if.true:1560; CHECK-NEXT:    call void @check1(i1 true)1561; CHECK-NEXT:    call void @check1(i1 false)1562; CHECK-NEXT:    [[CMP3:%.*]] = icmp ne i8 [[A]], 01563; CHECK-NEXT:    call void @check1(i1 [[CMP3]])1564; CHECK-NEXT:    [[CMP4:%.*]] = icmp eq i8 [[A]], 01565; CHECK-NEXT:    call void @check1(i1 [[CMP4]])1566; CHECK-NEXT:    [[CMP5:%.*]] = icmp ne i8 [[A]], -21567; CHECK-NEXT:    call void @check1(i1 [[CMP5]])1568; CHECK-NEXT:    [[CMP6:%.*]] = icmp eq i8 [[A]], -21569; CHECK-NEXT:    call void @check1(i1 [[CMP6]])1570; CHECK-NEXT:    ret void1571; CHECK:       if.false:1572; CHECK-NEXT:    ret void1573;1574  %trunc = trunc i8 %a to i11575  %not = xor i1 %trunc, true1576  br i1 %not, label %if.true, label %if.false1577 1578if.true:1579  %cmp1 = icmp ne i8 %a, -11580  call void @check1(i1 %cmp1)1581  %cmp2 = icmp eq i8 %a, -11582  call void @check1(i1 %cmp2)1583  %cmp3 = icmp ne i8 %a, 01584  call void @check1(i1 %cmp3)1585  %cmp4 = icmp eq i8 %a, 01586  call void @check1(i1 %cmp4)1587  %cmp5 = icmp ne i8 %a, -21588  call void @check1(i1 %cmp5)1589  %cmp6 = icmp eq i8 %a, -21590  call void @check1(i1 %cmp6)1591  ret void1592 1593if.false:1594  ret void1595}1596 1597define void @test_trunc_nuw_bittest(i8 %a) {1598; CHECK-LABEL: @test_trunc_nuw_bittest(1599; CHECK-NEXT:    [[TRUNC:%.*]] = trunc nuw i8 [[A:%.*]] to i11600; CHECK-NEXT:    br i1 [[TRUNC]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1601; CHECK:       if.true:1602; CHECK-NEXT:    call void @check1(i1 true)1603; CHECK-NEXT:    call void @check1(i1 false)1604; CHECK-NEXT:    call void @check1(i1 false)1605; CHECK-NEXT:    call void @check1(i1 true)1606; CHECK-NEXT:    ret void1607; CHECK:       if.false:1608; CHECK-NEXT:    ret void1609;1610  %trunc = trunc nuw i8 %a to i11611  br i1 %trunc, label %if.true, label %if.false1612 1613if.true:1614  %cmp1 = icmp ne i8 %a, 01615  call void @check1(i1 %cmp1)1616  %cmp2 = icmp eq i8 %a, 01617  call void @check1(i1 %cmp2)1618  %cmp3 = icmp ne i8 %a, 11619  call void @check1(i1 %cmp3)1620  %cmp4 = icmp eq i8 %a, 11621  call void @check1(i1 %cmp4)1622  ret void1623 1624if.false:1625  ret void1626}1627 1628define void @test_trunc_nuw_not_bittest(i8 %a) {1629; CHECK-LABEL: @test_trunc_nuw_not_bittest(1630; CHECK-NEXT:    [[TRUNC:%.*]] = trunc nuw i8 [[A:%.*]] to i11631; CHECK-NEXT:    [[NOT:%.*]] = xor i1 [[TRUNC]], true1632; CHECK-NEXT:    br i1 [[NOT]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]1633; CHECK:       if.true:1634; CHECK-NEXT:    call void @check1(i1 false)1635; CHECK-NEXT:    call void @check1(i1 true)1636; CHECK-NEXT:    call void @check1(i1 true)1637; CHECK-NEXT:    call void @check1(i1 false)1638; CHECK-NEXT:    ret void1639; CHECK:       if.false:1640; CHECK-NEXT:    ret void1641;1642  %trunc = trunc nuw i8 %a to i11643  %not = xor i1 %trunc, true1644  br i1 %not, label %if.true, label %if.false1645 1646if.true:1647  %cmp1 = icmp ne i8 %a, 01648  call void @check1(i1 %cmp1)1649  %cmp2 = icmp eq i8 %a, 01650  call void @check1(i1 %cmp2)1651  %cmp3 = icmp ne i8 %a, 11652  call void @check1(i1 %cmp3)1653  %cmp4 = icmp eq i8 %a, 11654  call void @check1(i1 %cmp4)1655  ret void1656 1657if.false:1658  ret void1659}1660