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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=correlated-propagation < %s | FileCheck %s3 4declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32)5 6declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32)7 8declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)9 10declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32)11 12declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32)13 14declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32)15 16declare { i8, i1 } @llvm.umul.with.overflow.i8(i8, i8)17 18declare { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)19 20declare i8 @llvm.uadd.sat.i8(i8, i8)21declare i8 @llvm.sadd.sat.i8(i8, i8)22declare i8 @llvm.usub.sat.i8(i8, i8)23declare i8 @llvm.ssub.sat.i8(i8, i8)24declare <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8>, <2 x i8>)25 26declare void @llvm.trap()27 28 29define i32 @signed_add(i32 %x, i32 %y) {30; CHECK-LABEL: @signed_add(31; CHECK-NEXT: entry:32; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Y:%.*]], 033; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]]34; CHECK: land.lhs.true:35; CHECK-NEXT: [[TMP0:%.*]] = sub nuw nsw i32 2147483647, [[Y]]36; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 037; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 138; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[CONT:%.*]]39; CHECK: trap:40; CHECK-NEXT: tail call void @llvm.trap()41; CHECK-NEXT: unreachable42; CHECK: cont:43; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 044; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP3]], [[X:%.*]]45; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]46; CHECK: lor.lhs.false:47; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[Y]], 048; CHECK-NEXT: br i1 [[CMP2]], label [[LAND_LHS_TRUE3:%.*]], label [[COND_FALSE]]49; CHECK: land.lhs.true3:50; CHECK-NEXT: [[TMP4:%.*]] = sub nsw i32 -2147483648, [[Y]]51; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP4]], 052; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { i32, i1 } [[TMP5]], 153; CHECK-NEXT: br i1 [[TMP6]], label [[TRAP]], label [[CONT4:%.*]]54; CHECK: cont4:55; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i1 } [[TMP5]], 056; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[X]]57; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]]58; CHECK: cond.false:59; CHECK-NEXT: [[TMP8:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X]], i32 [[Y]])60; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP8]], 061; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { i32, i1 } [[TMP8]], 162; CHECK-NEXT: br i1 [[TMP10]], label [[TRAP]], label [[COND_END]]63; CHECK: cond.end:64; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[CONT4]] ], [ 0, [[CONT]] ], [ [[TMP9]], [[COND_FALSE]] ]65; CHECK-NEXT: ret i32 [[COND]]66;67entry:68 %cmp = icmp sgt i32 %y, 069 br i1 %cmp, label %land.lhs.true, label %lor.lhs.false70 71land.lhs.true: ; preds = %entry72 %0 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 2147483647, i32 %y)73 %1 = extractvalue { i32, i1 } %0, 174 br i1 %1, label %trap, label %cont75 76trap: ; preds = %land.lhs.true, %land.lhs.true3, %cond.false77 tail call void @llvm.trap()78 unreachable79 80cont: ; preds = %land.lhs.true81 %2 = extractvalue { i32, i1 } %0, 082 %cmp1 = icmp slt i32 %2, %x83 br i1 %cmp1, label %cond.end, label %cond.false84 85lor.lhs.false: ; preds = %entry86 %cmp2 = icmp slt i32 %y, 087 br i1 %cmp2, label %land.lhs.true3, label %cond.false88 89land.lhs.true3: ; preds = %lor.lhs.false90 %3 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 -2147483648, i32 %y)91 %4 = extractvalue { i32, i1 } %3, 192 br i1 %4, label %trap, label %cont493 94cont4: ; preds = %land.lhs.true395 %5 = extractvalue { i32, i1 } %3, 096 %cmp5 = icmp sgt i32 %5, %x97 br i1 %cmp5, label %cond.end, label %cond.false98 99cond.false: ; preds = %cont, %cont4, %lor.lhs.false100 %6 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %x, i32 %y)101 %7 = extractvalue { i32, i1 } %6, 0102 %8 = extractvalue { i32, i1 } %6, 1103 br i1 %8, label %trap, label %cond.end104 105cond.end: ; preds = %cond.false, %cont, %cont4106 %cond = phi i32 [ 0, %cont4 ], [ 0, %cont ], [ %7, %cond.false ]107 ret i32 %cond108}109 110define i32 @unsigned_add(i32 %x, i32 %y) {111; CHECK-LABEL: @unsigned_add(112; CHECK-NEXT: entry:113; CHECK-NEXT: [[TMP0:%.*]] = sub nuw nsw i32 -1, [[Y:%.*]]114; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0115; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1116; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[CONT:%.*]]117; CHECK: trap:118; CHECK-NEXT: tail call void @llvm.trap()119; CHECK-NEXT: unreachable120; CHECK: cont:121; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0122; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[TMP3]], [[X:%.*]]123; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]124; CHECK: cond.false:125; CHECK-NEXT: [[TMP4:%.*]] = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[X]], i32 [[Y]])126; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0127; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1128; CHECK-NEXT: br i1 [[TMP6]], label [[TRAP]], label [[COND_END]]129; CHECK: cond.end:130; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[CONT]] ], [ [[TMP5]], [[COND_FALSE]] ]131; CHECK-NEXT: ret i32 [[COND]]132;133entry:134 %0 = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 -1, i32 %y)135 %1 = extractvalue { i32, i1 } %0, 1136 br i1 %1, label %trap, label %cont137 138trap: ; preds = %cond.false, %entry139 tail call void @llvm.trap()140 unreachable141 142cont: ; preds = %entry143 %2 = extractvalue { i32, i1 } %0, 0144 %cmp1 = icmp ult i32 %2, %x145 br i1 %cmp1, label %cond.end, label %cond.false146 147cond.false: ; preds = %cont148 %3 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)149 %4 = extractvalue { i32, i1 } %3, 0150 %5 = extractvalue { i32, i1 } %3, 1151 br i1 %5, label %trap, label %cond.end152 153cond.end: ; preds = %cond.false, %cont154 %cond = phi i32 [ 0, %cont ], [ %4, %cond.false ]155 ret i32 %cond156}157 158define i32 @signed_sub(i32 %x, i32 %y) {159; CHECK-LABEL: @signed_sub(160; CHECK-NEXT: entry:161; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y:%.*]], 0162; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]]163; CHECK: land.lhs.true:164; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[Y]], 2147483647165; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0166; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1167; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[CONT:%.*]]168; CHECK: trap:169; CHECK-NEXT: tail call void @llvm.trap()170; CHECK-NEXT: unreachable171; CHECK: cont:172; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0173; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP3]], [[X:%.*]]174; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]175; CHECK: lor.lhs.false:176; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[Y]], 0177; CHECK-NEXT: br i1 [[CMP2]], label [[COND_FALSE]], label [[LAND_LHS_TRUE3:%.*]]178; CHECK: land.lhs.true3:179; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i32 [[Y]], -2147483648180; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP4]], 0181; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1182; CHECK-NEXT: br i1 [[TMP6]], label [[TRAP]], label [[CONT4:%.*]]183; CHECK: cont4:184; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0185; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[X]]186; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]]187; CHECK: cond.false:188; CHECK-NEXT: [[TMP8:%.*]] = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[X]], i32 [[Y]])189; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP8]], 0190; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { i32, i1 } [[TMP8]], 1191; CHECK-NEXT: br i1 [[TMP10]], label [[TRAP]], label [[COND_END]]192; CHECK: cond.end:193; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[CONT4]] ], [ 0, [[CONT]] ], [ [[TMP9]], [[COND_FALSE]] ]194; CHECK-NEXT: ret i32 [[COND]]195;196entry:197 %cmp = icmp slt i32 %y, 0198 br i1 %cmp, label %land.lhs.true, label %lor.lhs.false199 200land.lhs.true: ; preds = %entry201 %0 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %y, i32 2147483647)202 %1 = extractvalue { i32, i1 } %0, 1203 br i1 %1, label %trap, label %cont204 205trap: ; preds = %land.lhs.true, %land.lhs.true3, %cond.false206 tail call void @llvm.trap()207 unreachable208 209cont: ; preds = %land.lhs.true210 %2 = extractvalue { i32, i1 } %0, 0211 %cmp1 = icmp slt i32 %2, %x212 br i1 %cmp1, label %cond.end, label %cond.false213 214lor.lhs.false: ; preds = %entry215 %cmp2 = icmp eq i32 %y, 0216 br i1 %cmp2, label %cond.false, label %land.lhs.true3217 218land.lhs.true3: ; preds = %lor.lhs.false219 %3 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %y, i32 -2147483648)220 %4 = extractvalue { i32, i1 } %3, 1221 br i1 %4, label %trap, label %cont4222 223cont4: ; preds = %land.lhs.true3224 %5 = extractvalue { i32, i1 } %3, 0225 %cmp5 = icmp sgt i32 %5, %x226 br i1 %cmp5, label %cond.end, label %cond.false227 228cond.false: ; preds = %lor.lhs.false, %cont, %cont4229 %6 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %x, i32 %y)230 %7 = extractvalue { i32, i1 } %6, 0231 %8 = extractvalue { i32, i1 } %6, 1232 br i1 %8, label %trap, label %cond.end233 234cond.end: ; preds = %cond.false, %cont, %cont4235 %cond = phi i32 [ 0, %cont4 ], [ 0, %cont ], [ %7, %cond.false ]236 ret i32 %cond237}238 239define i32 @unsigned_sub(i32 %x, i32 %y) {240; CHECK-LABEL: @unsigned_sub(241; CHECK-NEXT: entry:242; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]243; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]244; CHECK: cond.false:245; CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[X]], i32 [[Y]])246; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0247; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1248; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[COND_END]]249; CHECK: trap:250; CHECK-NEXT: tail call void @llvm.trap()251; CHECK-NEXT: unreachable252; CHECK: cond.end:253; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1]], [[COND_FALSE]] ]254; CHECK-NEXT: ret i32 [[COND]]255;256entry:257 %cmp = icmp ult i32 %x, %y258 br i1 %cmp, label %cond.end, label %cond.false259 260cond.false: ; preds = %entry261 %0 = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %x, i32 %y)262 %1 = extractvalue { i32, i1 } %0, 0263 %2 = extractvalue { i32, i1 } %0, 1264 br i1 %2, label %trap, label %cond.end265 266trap: ; preds = %cond.false267 tail call void @llvm.trap()268 unreachable269 270cond.end: ; preds = %cond.false, %entry271 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]272 ret i32 %cond273}274 275define i32 @signed_add_r1(i32 %x) {276; CHECK-LABEL: @signed_add_r1(277; CHECK-NEXT: entry:278; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647279; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]280; CHECK: cond.false:281; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[X]], 1282; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0283; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0284; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1285; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]286; CHECK: trap:287; CHECK-NEXT: tail call void @llvm.trap()288; CHECK-NEXT: unreachable289; CHECK: cond.end:290; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]291; CHECK-NEXT: ret i32 [[COND]]292;293entry:294 %cmp = icmp eq i32 %x, 2147483647295 br i1 %cmp, label %cond.end, label %cond.false296 297cond.false: ; preds = %entry298 %0 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %x, i32 1)299 %1 = extractvalue { i32, i1 } %0, 0300 %2 = extractvalue { i32, i1 } %0, 1301 br i1 %2, label %trap, label %cond.end302 303trap: ; preds = %cond.false304 tail call void @llvm.trap()305 unreachable306 307cond.end: ; preds = %cond.false, %entry308 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]309 ret i32 %cond310}311 312define i32 @unsigned_add_r1(i32 %x) {313; CHECK-LABEL: @unsigned_add_r1(314; CHECK-NEXT: entry:315; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -1316; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]317; CHECK: cond.false:318; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[X]], 1319; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0320; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0321; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1322; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]323; CHECK: trap:324; CHECK-NEXT: tail call void @llvm.trap()325; CHECK-NEXT: unreachable326; CHECK: cond.end:327; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]328; CHECK-NEXT: ret i32 [[COND]]329;330entry:331 %cmp = icmp eq i32 %x, -1332 br i1 %cmp, label %cond.end, label %cond.false333 334cond.false: ; preds = %entry335 %0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 1)336 %1 = extractvalue { i32, i1 } %0, 0337 %2 = extractvalue { i32, i1 } %0, 1338 br i1 %2, label %trap, label %cond.end339 340trap: ; preds = %cond.false341 tail call void @llvm.trap()342 unreachable343 344cond.end: ; preds = %cond.false, %entry345 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]346 ret i32 %cond347}348 349define i32 @signed_sub_r1(i32 %x) {350; CHECK-LABEL: @signed_sub_r1(351; CHECK-NEXT: entry:352; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648353; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]354; CHECK: cond.false:355; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 [[X]], 1356; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0357; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0358; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1359; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]360; CHECK: trap:361; CHECK-NEXT: tail call void @llvm.trap()362; CHECK-NEXT: unreachable363; CHECK: cond.end:364; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]365; CHECK-NEXT: ret i32 [[COND]]366;367entry:368 %cmp = icmp eq i32 %x, -2147483648369 br i1 %cmp, label %cond.end, label %cond.false370 371cond.false: ; preds = %entry372 %0 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %x, i32 1)373 %1 = extractvalue { i32, i1 } %0, 0374 %2 = extractvalue { i32, i1 } %0, 1375 br i1 %2, label %trap, label %cond.end376 377trap: ; preds = %cond.false378 tail call void @llvm.trap()379 unreachable380 381cond.end: ; preds = %cond.false, %entry382 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]383 ret i32 %cond384}385 386define i32 @unsigned_sub_r1(i32 %x) {387; CHECK-LABEL: @unsigned_sub_r1(388; CHECK-NEXT: entry:389; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0390; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]391; CHECK: cond.false:392; CHECK-NEXT: [[TMP0:%.*]] = sub nuw i32 [[X]], 1393; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0394; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0395; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1396; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]397; CHECK: trap:398; CHECK-NEXT: tail call void @llvm.trap()399; CHECK-NEXT: unreachable400; CHECK: cond.end:401; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]402; CHECK-NEXT: ret i32 [[COND]]403;404entry:405 %cmp = icmp eq i32 %x, 0406 br i1 %cmp, label %cond.end, label %cond.false407 408cond.false: ; preds = %entry409 %0 = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %x, i32 1)410 %1 = extractvalue { i32, i1 } %0, 0411 %2 = extractvalue { i32, i1 } %0, 1412 br i1 %2, label %trap, label %cond.end413 414trap: ; preds = %cond.false415 tail call void @llvm.trap()416 unreachable417 418cond.end: ; preds = %cond.false, %entry419 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]420 ret i32 %cond421}422 423define i32 @signed_add_rn1(i32 %x) {424; CHECK-LABEL: @signed_add_rn1(425; CHECK-NEXT: entry:426; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648427; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]428; CHECK: cond.false:429; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[X]], -1430; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0431; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0432; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1433; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]434; CHECK: trap:435; CHECK-NEXT: tail call void @llvm.trap()436; CHECK-NEXT: unreachable437; CHECK: cond.end:438; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]439; CHECK-NEXT: ret i32 [[COND]]440;441entry:442 %cmp = icmp eq i32 %x, -2147483648443 br i1 %cmp, label %cond.end, label %cond.false444 445cond.false: ; preds = %entry446 %0 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %x, i32 -1)447 %1 = extractvalue { i32, i1 } %0, 0448 %2 = extractvalue { i32, i1 } %0, 1449 br i1 %2, label %trap, label %cond.end450 451trap: ; preds = %cond.false452 tail call void @llvm.trap()453 unreachable454 455cond.end: ; preds = %cond.false, %entry456 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]457 ret i32 %cond458}459 460define i32 @signed_sub_rn1(i32 %x) {461; CHECK-LABEL: @signed_sub_rn1(462; CHECK-NEXT: entry:463; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647464; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]465; CHECK: cond.false:466; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 [[X]], -1467; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0468; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 0469; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1470; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[COND_END]]471; CHECK: trap:472; CHECK-NEXT: tail call void @llvm.trap()473; CHECK-NEXT: unreachable474; CHECK: cond.end:475; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2]], [[COND_FALSE]] ]476; CHECK-NEXT: ret i32 [[COND]]477;478entry:479 %cmp = icmp eq i32 %x, 2147483647480 br i1 %cmp, label %cond.end, label %cond.false481 482cond.false: ; preds = %entry483 %0 = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %x, i32 -1)484 %1 = extractvalue { i32, i1 } %0, 0485 %2 = extractvalue { i32, i1 } %0, 1486 br i1 %2, label %trap, label %cond.end487 488trap: ; preds = %cond.false489 tail call void @llvm.trap()490 unreachable491 492cond.end: ; preds = %cond.false, %entry493 %cond = phi i32 [ 0, %entry ], [ %1, %cond.false ]494 ret i32 %cond495}496 497define i32 @unsigned_mul(i32 %x) {498; CHECK-LABEL: @unsigned_mul(499; CHECK-NEXT: entry:500; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], 10000501; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]502; CHECK: cond.false:503; CHECK-NEXT: [[MULO1:%.*]] = mul nuw nsw i32 [[X]], 100504; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[MULO1]], 0505; CHECK-NEXT: [[RES:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0506; CHECK-NEXT: [[OV:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1507; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[COND_END]]508; CHECK: trap:509; CHECK-NEXT: tail call void @llvm.trap()510; CHECK-NEXT: unreachable511; CHECK: cond.end:512; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RES]], [[COND_FALSE]] ]513; CHECK-NEXT: ret i32 [[COND]]514;515entry:516 %cmp = icmp ugt i32 %x, 10000517 br i1 %cmp, label %cond.end, label %cond.false518 519cond.false: ; preds = %entry520 %mulo = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %x, i32 100)521 %res = extractvalue { i32, i1 } %mulo, 0522 %ov = extractvalue { i32, i1 } %mulo, 1523 br i1 %ov, label %trap, label %cond.end524 525trap: ; preds = %cond.false526 tail call void @llvm.trap()527 unreachable528 529cond.end: ; preds = %cond.false, %entry530 %cond = phi i32 [ 0, %entry ], [ %res, %cond.false ]531 ret i32 %cond532}533 534define i32 @signed_mul(i32 %x) {535; CHECK-LABEL: @signed_mul(536; CHECK-NEXT: entry:537; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[X:%.*]], 10000538; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], -10000539; CHECK-NEXT: [[CMP3:%.*]] = or i1 [[CMP1]], [[CMP2]]540; CHECK-NEXT: br i1 [[CMP3]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]541; CHECK: cond.false:542; CHECK-NEXT: [[MULO1:%.*]] = mul nsw i32 [[X]], 100543; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[MULO1]], 0544; CHECK-NEXT: [[RES:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0545; CHECK-NEXT: [[OV:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1546; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[COND_END]]547; CHECK: trap:548; CHECK-NEXT: tail call void @llvm.trap()549; CHECK-NEXT: unreachable550; CHECK: cond.end:551; CHECK-NEXT: [[COND:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RES]], [[COND_FALSE]] ]552; CHECK-NEXT: ret i32 [[COND]]553;554entry:555 %cmp1 = icmp sgt i32 %x, 10000556 %cmp2 = icmp slt i32 %x, -10000557 %cmp3 = or i1 %cmp1, %cmp2558 br i1 %cmp3, label %cond.end, label %cond.false559 560cond.false: ; preds = %entry561 %mulo = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 100)562 %res = extractvalue { i32, i1 } %mulo, 0563 %ov = extractvalue { i32, i1 } %mulo, 1564 br i1 %ov, label %trap, label %cond.end565 566trap: ; preds = %cond.false567 tail call void @llvm.trap()568 unreachable569 570cond.end: ; preds = %cond.false, %entry571 %cond = phi i32 [ 0, %entry ], [ %res, %cond.false ]572 ret i32 %cond573}574 575declare i32 @bar(i32)576 577define void @unsigned_loop(i32 %i) {578; CHECK-LABEL: @unsigned_loop(579; CHECK-NEXT: entry:580; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[I:%.*]], 0581; CHECK-NEXT: br i1 [[CMP3]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]582; CHECK: while.body.preheader:583; CHECK-NEXT: br label [[WHILE_BODY:%.*]]584; CHECK: while.body:585; CHECK-NEXT: [[I_ADDR_04:%.*]] = phi i32 [ [[TMP3:%.*]], [[CONT:%.*]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ]586; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @bar(i32 [[I_ADDR_04]])587; CHECK-NEXT: [[TMP0:%.*]] = sub nuw i32 [[I_ADDR_04]], 1588; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0589; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1590; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[CONT]]591; CHECK: trap:592; CHECK-NEXT: tail call void @llvm.trap()593; CHECK-NEXT: unreachable594; CHECK: cont:595; CHECK-NEXT: [[TMP3]] = extractvalue { i32, i1 } [[TMP1]], 0596; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP3]], 0597; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_END]], label [[WHILE_BODY]]598; CHECK: while.end:599; CHECK-NEXT: ret void600;601entry:602 %cmp3 = icmp eq i32 %i, 0603 br i1 %cmp3, label %while.end, label %while.body.preheader604 605while.body.preheader: ; preds = %entry606 br label %while.body607 608while.body: ; preds = %while.body.preheader, %cont609 %i.addr.04 = phi i32 [ %2, %cont ], [ %i, %while.body.preheader ]610 %call = tail call i32 @bar(i32 %i.addr.04)611 %0 = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %i.addr.04, i32 1)612 %1 = extractvalue { i32, i1 } %0, 1613 br i1 %1, label %trap, label %cont614 615trap: ; preds = %while.body616 tail call void @llvm.trap()617 unreachable618 619cont: ; preds = %while.body620 %2 = extractvalue { i32, i1 } %0, 0621 %cmp = icmp eq i32 %2, 0622 br i1 %cmp, label %while.end, label %while.body623 624while.end: ; preds = %cont, %entry625 ret void626}627 628define void @intrinsic_into_phi(i32 %n) {629; CHECK-LABEL: @intrinsic_into_phi(630; CHECK-NEXT: entry:631; CHECK-NEXT: br label [[CONT:%.*]]632; CHECK: for.cond:633; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[DOTLCSSA:%.*]], 1634; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[TMP0]], 0635; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1636; CHECK-NEXT: br i1 [[TMP2]], label [[TRAP:%.*]], label [[CONT]]637; CHECK: trap:638; CHECK-NEXT: tail call void @llvm.trap()639; CHECK-NEXT: unreachable640; CHECK: cont:641; CHECK-NEXT: [[TMP3:%.*]] = phi { i32, i1 } [ zeroinitializer, [[ENTRY:%.*]] ], [ [[TMP1]], [[FOR_COND:%.*]] ]642; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP3]], 0643; CHECK-NEXT: [[CALL9:%.*]] = tail call i32 @bar(i32 [[TMP4]])644; CHECK-NEXT: [[TOBOOL10:%.*]] = icmp eq i32 [[CALL9]], 0645; CHECK-NEXT: br i1 [[TOBOOL10]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]646; CHECK: while.body.preheader:647; CHECK-NEXT: br label [[WHILE_BODY:%.*]]648; CHECK: while.cond:649; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { i32, i1 } [[TMP7:%.*]], 0650; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @bar(i32 [[TMP5]])651; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[CALL]], 0652; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END]], label [[WHILE_BODY]]653; CHECK: while.body:654; CHECK-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP5]], [[WHILE_COND:%.*]] ], [ [[TMP4]], [[WHILE_BODY_PREHEADER]] ]655; CHECK-NEXT: [[TMP7]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[TMP6]], i32 1)656; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1657; CHECK-NEXT: br i1 [[TMP8]], label [[TRAP]], label [[WHILE_COND]]658; CHECK: while.end:659; CHECK-NEXT: [[DOTLCSSA]] = phi i32 [ [[TMP4]], [[CONT]] ], [ [[TMP5]], [[WHILE_COND]] ]660; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[DOTLCSSA]], [[N:%.*]]661; CHECK-NEXT: br i1 [[CMP]], label [[FOR_COND]], label [[CLEANUP2:%.*]]662; CHECK: cleanup2:663; CHECK-NEXT: ret void664;665entry:666 br label %cont667 668for.cond: ; preds = %while.end669 %0 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %.lcssa, i32 1)670 %1 = extractvalue { i32, i1 } %0, 1671 br i1 %1, label %trap, label %cont672 673trap: ; preds = %for.cond, %while.body674 tail call void @llvm.trap()675 unreachable676 677cont: ; preds = %entry, %for.cond678 %2 = phi { i32, i1 } [ zeroinitializer, %entry ], [ %0, %for.cond ]679 %3 = extractvalue { i32, i1 } %2, 0680 %call9 = tail call i32 @bar(i32 %3)681 %tobool10 = icmp eq i32 %call9, 0682 br i1 %tobool10, label %while.end, label %while.body.preheader683 684while.body.preheader: ; preds = %cont685 br label %while.body686 687while.cond: ; preds = %while.body688 %4 = extractvalue { i32, i1 } %6, 0689 %call = tail call i32 @bar(i32 %4)690 %tobool = icmp eq i32 %call, 0691 br i1 %tobool, label %while.end, label %while.body692 693while.body: ; preds = %while.body.preheader, %while.cond694 %5 = phi i32 [ %4, %while.cond ], [ %3, %while.body.preheader ]695 %6 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %5, i32 1)696 %7 = extractvalue { i32, i1 } %6, 1697 br i1 %7, label %trap, label %while.cond698 699while.end: ; preds = %while.cond, %cont700 %.lcssa = phi i32 [ %3, %cont ], [ %4, %while.cond ]701 %cmp = icmp slt i32 %.lcssa, %n702 br i1 %cmp, label %for.cond, label %cleanup2703 704cleanup2: ; preds = %while.end705 ret void706}707 708define { i8, i1 } @signed_mul_constant_folding() {709; CHECK-LABEL: @signed_mul_constant_folding(710; CHECK-NEXT: ret { i8, i1 } { i8 2, i1 false }711;712 %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 2)713 ret { i8, i1 } %mul714}715 716define { <2 x i32>, <2 x i1> } @uaddo_vec(<2 x i32> %a) {717; CHECK-LABEL: @uaddo_vec(718; CHECK-NEXT: [[ADD:%.*]] = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[A:%.*]], <2 x i32> splat (i32 1))719; CHECK-NEXT: ret { <2 x i32>, <2 x i1> } [[ADD]]720;721 %add = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> <i32 1, i32 1>)722 ret { <2 x i32>, <2 x i1> } %add723}724 725 726define i8 @uadd_sat_no_unsigned_overflow(i8 %x) {727; CHECK-LABEL: @uadd_sat_no_unsigned_overflow(728; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 100729; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]730; CHECK: trap:731; CHECK-NEXT: call void @llvm.trap()732; CHECK-NEXT: unreachable733; CHECK: cont:734; CHECK-NEXT: [[RES1:%.*]] = add nuw i8 [[X]], 100735; CHECK-NEXT: ret i8 [[RES1]]736;737 %cmp = icmp ugt i8 %x, 100738 br i1 %cmp, label %trap, label %cont739 740trap:741 call void @llvm.trap()742 unreachable743 744cont:745 %res = call i8 @llvm.uadd.sat.i8(i8 %x, i8 100)746 ret i8 %res747}748 749define i8 @uadd_sat_no_overflow(i8 %x) {750; CHECK-LABEL: @uadd_sat_no_overflow(751; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 27752; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]753; CHECK: trap:754; CHECK-NEXT: call void @llvm.trap()755; CHECK-NEXT: unreachable756; CHECK: cont:757; CHECK-NEXT: [[RES1:%.*]] = add nuw nsw i8 [[X]], 100758; CHECK-NEXT: ret i8 [[RES1]]759;760 %cmp = icmp ugt i8 %x, 27761 br i1 %cmp, label %trap, label %cont762 763trap:764 call void @llvm.trap()765 unreachable766 767cont:768 %res = call i8 @llvm.uadd.sat.i8(i8 %x, i8 100)769 ret i8 %res770}771 772define i8 @sadd_sat_no_signed_overflow(i8 %x) {773; CHECK-LABEL: @sadd_sat_no_signed_overflow(774; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], 100775; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]776; CHECK: trap:777; CHECK-NEXT: call void @llvm.trap()778; CHECK-NEXT: unreachable779; CHECK: cont:780; CHECK-NEXT: [[RES1:%.*]] = add nsw i8 [[X]], 20781; CHECK-NEXT: ret i8 [[RES1]]782;783 %cmp = icmp sgt i8 %x, 100784 br i1 %cmp, label %trap, label %cont785 786trap:787 call void @llvm.trap()788 unreachable789 790cont:791 %res = call i8 @llvm.sadd.sat.i8(i8 %x, i8 20)792 ret i8 %res793}794 795define i8 @sadd_sat_no_overflow(i8 %x) {796; CHECK-LABEL: @sadd_sat_no_overflow(797; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 107798; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]799; CHECK: trap:800; CHECK-NEXT: call void @llvm.trap()801; CHECK-NEXT: unreachable802; CHECK: cont:803; CHECK-NEXT: [[RES1:%.*]] = add nuw nsw i8 [[X]], 20804; CHECK-NEXT: ret i8 [[RES1]]805;806 %cmp = icmp ugt i8 %x, 107807 br i1 %cmp, label %trap, label %cont808 809trap:810 call void @llvm.trap()811 unreachable812 813cont:814 %res = call i8 @llvm.sadd.sat.i8(i8 %x, i8 20)815 ret i8 %res816}817 818define i8 @usub_sat_no_unsigned_overflow(i8 %x) {819; CHECK-LABEL: @usub_sat_no_unsigned_overflow(820; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], 100821; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]822; CHECK: trap:823; CHECK-NEXT: call void @llvm.trap()824; CHECK-NEXT: unreachable825; CHECK: cont:826; CHECK-NEXT: [[RES1:%.*]] = sub nuw i8 [[X]], 100827; CHECK-NEXT: ret i8 [[RES1]]828;829 %cmp = icmp ult i8 %x, 100830 br i1 %cmp, label %trap, label %cont831 832trap:833 call void @llvm.trap()834 unreachable835 836cont:837 %res = call i8 @llvm.usub.sat.i8(i8 %x, i8 100)838 ret i8 %res839}840 841define i8 @usub_sat_no_overflow(i8 %x) {842; CHECK-LABEL: @usub_sat_no_overflow(843; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], -28844; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]845; CHECK: trap:846; CHECK-NEXT: call void @llvm.trap()847; CHECK-NEXT: unreachable848; CHECK: cont:849; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i8 [[X]], 100850; CHECK-NEXT: ret i8 [[RES1]]851;852 %cmp = icmp ult i8 %x, 228853 br i1 %cmp, label %trap, label %cont854 855trap:856 call void @llvm.trap()857 unreachable858 859cont:860 %res = call i8 @llvm.usub.sat.i8(i8 %x, i8 100)861 ret i8 %res862}863 864define i8 @ssub_sat_no_signed_overflow(i8 %x) {865; CHECK-LABEL: @ssub_sat_no_signed_overflow(866; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], -100867; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]868; CHECK: trap:869; CHECK-NEXT: call void @llvm.trap()870; CHECK-NEXT: unreachable871; CHECK: cont:872; CHECK-NEXT: [[RES1:%.*]] = sub nsw i8 [[X]], 20873; CHECK-NEXT: ret i8 [[RES1]]874;875 %cmp = icmp slt i8 %x, -100876 br i1 %cmp, label %trap, label %cont877 878trap:879 call void @llvm.trap()880 unreachable881 882cont:883 %res = call i8 @llvm.ssub.sat.i8(i8 %x, i8 20)884 ret i8 %res885}886 887define i8 @ssub_sat_no_overflow(i8 %x) {888; CHECK-LABEL: @ssub_sat_no_overflow(889; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], -108890; CHECK-NEXT: br i1 [[CMP]], label [[TRAP:%.*]], label [[CONT:%.*]]891; CHECK: trap:892; CHECK-NEXT: call void @llvm.trap()893; CHECK-NEXT: unreachable894; CHECK: cont:895; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i8 [[X]], 20896; CHECK-NEXT: ret i8 [[RES1]]897;898 %cmp = icmp ult i8 %x, 148899 br i1 %cmp, label %trap, label %cont900 901trap:902 call void @llvm.trap()903 unreachable904 905cont:906 %res = call i8 @llvm.ssub.sat.i8(i8 %x, i8 20)907 ret i8 %res908}909 910define <2 x i8> @uadd_sat_vec(<2 x i8> %a) {911; CHECK-LABEL: @uadd_sat_vec(912; CHECK-NEXT: [[ADD:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[A:%.*]], <2 x i8> splat (i8 1))913; CHECK-NEXT: ret <2 x i8> [[ADD]]914;915 %add = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> %a, <2 x i8> <i8 1, i8 1>)916 ret <2 x i8> %add917}918 919; In the following tests, we should first simplify a with.overflow intrinsic920; to a simple arithmetic operation and insertvalue, but also simplify the921; subsequent comparison that is based on it.922 923define i1 @sadd_and_cmp(i32 %x, i32 %y) #0 {924; CHECK-LABEL: @sadd_and_cmp(925; CHECK-NEXT: entry:926; CHECK-NEXT: [[X_OFFSET:%.*]] = add i32 [[X:%.*]], 9927; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X_OFFSET]], 19928; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]929; CHECK: cont1:930; CHECK-NEXT: [[Y_OFFSET:%.*]] = add i32 [[Y:%.*]], 9931; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y_OFFSET]], 19932; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]933; CHECK: cont2:934; CHECK-NEXT: [[RES1:%.*]] = add nsw i32 [[X]], [[Y]]935; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 0936; CHECK-NEXT: [[ADD:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0937; CHECK-NEXT: br label [[OUT]]938; CHECK: out:939; CHECK-NEXT: ret i1 true940;941entry:942 %x.offset = add i32 %x, 9943 %cmp1 = icmp ult i32 %x.offset, 19944 br i1 %cmp1, label %cont1, label %out945 946cont1:947 %y.offset = add i32 %y, 9948 %cmp2 = icmp ult i32 %y.offset, 19949 br i1 %cmp2, label %cont2, label %out950 951cont2:952 ; x = [-9,10), y = [-9,10)953 %res = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %x, i32 %y)954 %add = extractvalue { i32, i1 } %res, 0955 ; add = [-18,19)956 %cmp3 = icmp slt i32 %add, 19957 br label %out958 959out:960 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]961 ret i1 %ret962}963 964 965define i1 @uadd_and_cmp(i32 %x, i32 %y) #0 {966; CHECK-LABEL: @uadd_and_cmp(967; CHECK-NEXT: entry:968; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 10969; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]970; CHECK: cont1:971; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 10972; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]973; CHECK: cont2:974; CHECK-NEXT: [[RES1:%.*]] = add nuw nsw i32 [[X]], [[Y]]975; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 0976; CHECK-NEXT: [[ADD:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0977; CHECK-NEXT: br label [[OUT]]978; CHECK: out:979; CHECK-NEXT: ret i1 true980;981entry:982 %cmp1 = icmp ult i32 %x, 10983 br i1 %cmp1, label %cont1, label %out984 985cont1:986 %cmp2 = icmp ult i32 %y, 10987 br i1 %cmp2, label %cont2, label %out988 989cont2:990 %res = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)991 %add = extractvalue { i32, i1 } %res, 0992 %cmp3 = icmp ult i32 %add, 19993 br label %out994 995out:996 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]997 ret i1 %ret998}999 1000define i1 @ssub_and_cmp(i32 %x, i32 %y) #0 {1001; CHECK-LABEL: @ssub_and_cmp(1002; CHECK-NEXT: entry:1003; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 101004; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]1005; CHECK: cont1:1006; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 101007; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]1008; CHECK: cont2:1009; CHECK-NEXT: [[OFFSET:%.*]] = add nuw nsw i32 [[X]], 91010; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i32 [[OFFSET]], [[Y]]1011; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 01012; CHECK-NEXT: [[SUB:%.*]] = extractvalue { i32, i1 } [[TMP0]], 01013; CHECK-NEXT: br label [[OUT]]1014; CHECK: out:1015; CHECK-NEXT: ret i1 true1016;1017entry:1018 %cmp1 = icmp ult i32 %x, 101019 br i1 %cmp1, label %cont1, label %out1020 1021cont1:1022 %cmp2 = icmp ult i32 %y, 101023 br i1 %cmp2, label %cont2, label %out1024 1025cont2:1026 %offset = add i32 %x, 91027 ; x = [0,10), y = [0,10), offset = [9,19)1028 %res = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %offset, i32 %y)1029 %sub = extractvalue { i32, i1 } %res, 01030 %cmp3 = icmp ult i32 %sub, 191031 br label %out1032 1033out:1034 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]1035 ret i1 %ret1036}1037 1038define i1 @usub_and_cmp(i32 %x, i32 %y) #0 {1039; CHECK-LABEL: @usub_and_cmp(1040; CHECK-NEXT: entry:1041; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 101042; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]1043; CHECK: cont1:1044; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 101045; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]1046; CHECK: cont2:1047; CHECK-NEXT: [[OFFSET:%.*]] = add nuw nsw i32 [[X]], 91048; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i32 [[OFFSET]], [[Y]]1049; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 01050; CHECK-NEXT: [[SUB:%.*]] = extractvalue { i32, i1 } [[TMP0]], 01051; CHECK-NEXT: br label [[OUT]]1052; CHECK: out:1053; CHECK-NEXT: ret i1 true1054;1055entry:1056 %cmp1 = icmp ult i32 %x, 101057 br i1 %cmp1, label %cont1, label %out1058 1059cont1:1060 %cmp2 = icmp ult i32 %y, 101061 br i1 %cmp2, label %cont2, label %out1062 1063cont2:1064 %offset = add i32 %x, 91065 ; x = [0,10), y = [0,10), offset = [9,19)1066 %res = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %offset, i32 %y)1067 %sub = extractvalue { i32, i1 } %res, 01068 %cmp3 = icmp ult i32 %sub, 191069 br label %out1070 1071out:1072 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]1073 ret i1 %ret1074}1075 1076define i1 @smul_and_cmp(i32 %x, i32 %y) #0 {1077; CHECK-LABEL: @smul_and_cmp(1078; CHECK-NEXT: entry:1079; CHECK-NEXT: [[X_OFFSET:%.*]] = add i32 [[X:%.*]], 91080; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X_OFFSET]], 191081; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]1082; CHECK: cont1:1083; CHECK-NEXT: [[Y_OFFSET:%.*]] = add i32 [[Y:%.*]], 91084; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y_OFFSET]], 191085; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]1086; CHECK: cont2:1087; CHECK-NEXT: [[RES1:%.*]] = mul nsw i32 [[X]], [[Y]]1088; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 01089; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i32, i1 } [[TMP0]], 01090; CHECK-NEXT: br label [[OUT]]1091; CHECK: out:1092; CHECK-NEXT: ret i1 true1093;1094entry:1095 %x.offset = add i32 %x, 91096 %cmp1 = icmp ult i32 %x.offset, 191097 br i1 %cmp1, label %cont1, label %out1098 1099cont1:1100 %y.offset = add i32 %y, 91101 %cmp2 = icmp ult i32 %y.offset, 191102 br i1 %cmp2, label %cont2, label %out1103 1104cont2:1105 ; x = [-9,10), y = [-9,10)1106 %res = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %y)1107 %mul = extractvalue { i32, i1 } %res, 01108 %cmp3 = icmp sle i32 %mul, 811109 %cmp4 = icmp sge i32 %mul, -811110 %cmp5 = and i1 %cmp3, %cmp41111 br label %out1112 1113out:1114 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp5, %cont2 ]1115 ret i1 %ret1116}1117 1118define i1 @umul_and_cmp(i32 %x, i32 %y) #0 {1119; CHECK-LABEL: @umul_and_cmp(1120; CHECK-NEXT: entry:1121; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 1001122; CHECK-NEXT: br i1 [[CMP1]], label [[CONT1:%.*]], label [[OUT:%.*]]1123; CHECK: cont1:1124; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 1001125; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]1126; CHECK: cont2:1127; CHECK-NEXT: [[RES1:%.*]] = mul nuw nsw i32 [[X]], [[Y]]1128; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[RES1]], 01129; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i32, i1 } [[TMP0]], 01130; CHECK-NEXT: br label [[OUT]]1131; CHECK: out:1132; CHECK-NEXT: ret i1 true1133;1134entry:1135 %cmp1 = icmp ult i32 %x, 1001136 br i1 %cmp1, label %cont1, label %out1137 1138cont1:1139 %cmp2 = icmp ult i32 %y, 1001140 br i1 %cmp2, label %cont2, label %out1141 1142cont2:1143 %res = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %x, i32 %y)1144 %mul = extractvalue { i32, i1 } %res, 01145 %cmp3 = icmp ule i32 %mul, 98011146 br label %out1147 1148out:1149 %ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]1150 ret i1 %ret1151}1152 1153define i8 @uadd_sat_undef_range(i8 %x) {1154; CHECK-LABEL: @uadd_sat_undef_range(1155; CHECK-NEXT: entry:1156; CHECK-NEXT: switch i8 [[X:%.*]], label [[JOIN:%.*]] [1157; CHECK-NEXT: i8 1, label [[CASE1:%.*]]1158; CHECK-NEXT: i8 2, label [[CASE2:%.*]]1159; CHECK-NEXT: ]1160; CHECK: case1:1161; CHECK-NEXT: br label [[JOIN]]1162; CHECK: case2:1163; CHECK-NEXT: br label [[JOIN]]1164; CHECK: join:1165; CHECK-NEXT: [[PHI:%.*]] = phi i8 [ 1, [[CASE1]] ], [ 2, [[CASE2]] ], [ undef, [[ENTRY:%.*]] ]1166; CHECK-NEXT: [[RES:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[PHI]], i8 100)1167; CHECK-NEXT: ret i8 [[RES]]1168;1169entry:1170 switch i8 %x, label %join [1171 i8 1, label %case11172 i8 2, label %case21173 ]1174 1175case1:1176 br label %join1177 1178case2:1179 br label %join1180 1181join:1182 %phi = phi i8 [ 1, %case1 ], [ 2, %case2 ], [ undef, %entry ]1183 %res = call i8 @llvm.uadd.sat.i8(i8 %phi, i8 100)1184 ret i8 %res1185}1186