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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=dse -S | FileCheck %s3 4define void @write4to7(ptr nocapture %p) {5; CHECK-LABEL: @write4to7(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 18; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 49; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)10; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 111; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 412; CHECK-NEXT: ret void13;14entry:15 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 116 call void @llvm.memset.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i1 false)17 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 118 store i32 1, ptr %arrayidx1, align 419 ret void20}21 22define void @write4to7_weird_element_type(ptr nocapture %p) {23; CHECK-LABEL: @write4to7_weird_element_type(24; CHECK-NEXT: entry:25; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 126; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 427; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP1]], i8 0, i64 24, i1 false)28; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 129; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 430; CHECK-NEXT: ret void31;32entry:33 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 134 call void @llvm.memset.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i1 false)35 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 136 store i32 1, ptr %arrayidx1, align 437 ret void38}39 40define void @write4to7_addrspace(ptr addrspace(1) nocapture %p) {41; CHECK-LABEL: @write4to7_addrspace(42; CHECK-NEXT: entry:43; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 144; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[ARRAYIDX0]], i64 445; CHECK-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) align 4 [[TMP0]], i8 0, i64 24, i1 false)46; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P]], i64 147; CHECK-NEXT: store i32 1, ptr addrspace(1) [[ARRAYIDX1]], align 448; CHECK-NEXT: ret void49;50entry:51 %arrayidx0 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 152 call void @llvm.memset.p1.i64(ptr addrspace(1) align 4 %arrayidx0, i8 0, i64 28, i1 false)53 %arrayidx1 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 154 store i32 1, ptr addrspace(1) %arrayidx1, align 455 ret void56}57 58define void @write4to7_atomic(ptr nocapture %p) {59; CHECK-LABEL: @write4to7_atomic(60; CHECK-NEXT: entry:61; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 162; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 463; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i32 4)64; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 165; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 466; CHECK-NEXT: ret void67;68entry:69 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 170 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)71 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 172 store atomic i32 1, ptr %arrayidx1 unordered, align 473 ret void74}75 76define void @write0to3(ptr nocapture %p) {77; CHECK-LABEL: @write0to3(78; CHECK-NEXT: entry:79; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 480; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)81; CHECK-NEXT: store i32 1, ptr [[P]], align 482; CHECK-NEXT: ret void83;84entry:85 call void @llvm.memset.p0.i64(ptr align 4 %p, i8 0, i64 28, i1 false)86 store i32 1, ptr %p, align 487 ret void88}89 90define void @write0to3_atomic(ptr nocapture %p) {91; CHECK-LABEL: @write0to3_atomic(92; CHECK-NEXT: entry:93; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 494; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i32 4)95; CHECK-NEXT: store atomic i32 1, ptr [[P]] unordered, align 496; CHECK-NEXT: ret void97;98entry:99 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 28, i32 4)100 store atomic i32 1, ptr %p unordered, align 4101 ret void102}103 104; Atomicity of the store is weaker from the memset105define void @write0to3_atomic_weaker(ptr nocapture %p) {106; CHECK-LABEL: @write0to3_atomic_weaker(107; CHECK-NEXT: entry:108; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4109; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i32 4)110; CHECK-NEXT: store i32 1, ptr [[P]], align 4111; CHECK-NEXT: ret void112;113entry:114 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 28, i32 4)115 store i32 1, ptr %p, align 4116 ret void117}118 119define void @write0to7(ptr nocapture %p) {120; CHECK-LABEL: @write0to7(121; CHECK-NEXT: entry:122; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 8123; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)124; CHECK-NEXT: store i64 1, ptr [[P]], align 8125; CHECK-NEXT: ret void126;127entry:128 call void @llvm.memset.p0.i64(ptr align 4 %p, i8 0, i64 32, i1 false)129 store i64 1, ptr %p, align 8130 ret void131}132 133; Changing the memset start and length is okay here because the134; store is a multiple of the memset element size135define void @write0to7_atomic(ptr nocapture %p) {136; CHECK-LABEL: @write0to7_atomic(137; CHECK-NEXT: entry:138; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 8139; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i32 4)140; CHECK-NEXT: store atomic i64 1, ptr [[P]] unordered, align 8141; CHECK-NEXT: ret void142;143entry:144 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 32, i32 4)145 store atomic i64 1, ptr %p unordered, align 8146 ret void147}148 149define void @write0to7_2(ptr nocapture %p) {150; CHECK-LABEL: @write0to7_2(151; CHECK-NEXT: entry:152; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 1153; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4154; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)155; CHECK-NEXT: store i64 1, ptr [[P]], align 8156; CHECK-NEXT: ret void157;158entry:159 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 1160 call void @llvm.memset.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i1 false)161 store i64 1, ptr %p, align 8162 ret void163}164 165define void @write0to7_2_atomic(ptr nocapture %p) {166; CHECK-LABEL: @write0to7_2_atomic(167; CHECK-NEXT: entry:168; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 1169; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4170; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i32 4)171; CHECK-NEXT: store atomic i64 1, ptr [[P]] unordered, align 8172; CHECK-NEXT: ret void173;174entry:175 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 1176 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)177 store atomic i64 1, ptr %p unordered, align 8178 ret void179}180 181; We do not trim the beginning of the eariler write if the alignment of the182; start pointer is changed.183define void @dontwrite0to3_align8(ptr nocapture %p) {184; CHECK-LABEL: @dontwrite0to3_align8(185; CHECK-NEXT: entry:186; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 32, i1 false)187; CHECK-NEXT: store i32 1, ptr [[P]], align 4188; CHECK-NEXT: ret void189;190entry:191 call void @llvm.memset.p0.i64(ptr align 8 %p, i8 0, i64 32, i1 false)192 store i32 1, ptr %p, align 4193 ret void194}195 196define void @dontwrite0to3_align8_atomic(ptr nocapture %p) {197; CHECK-LABEL: @dontwrite0to3_align8_atomic(198; CHECK-NEXT: entry:199; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 32, i32 4)200; CHECK-NEXT: store atomic i32 1, ptr [[P]] unordered, align 4201; CHECK-NEXT: ret void202;203entry:204 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %p, i8 0, i64 32, i32 4)205 store atomic i32 1, ptr %p unordered, align 4206 ret void207}208 209define void @dontwrite0to1(ptr nocapture %p) {210; CHECK-LABEL: @dontwrite0to1(211; CHECK-NEXT: entry:212; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[P:%.*]], i8 0, i64 32, i1 false)213; CHECK-NEXT: store i16 1, ptr [[P]], align 4214; CHECK-NEXT: ret void215;216entry:217 call void @llvm.memset.p0.i64(ptr align 4 %p, i8 0, i64 32, i1 false)218 store i16 1, ptr %p, align 4219 ret void220}221 222define void @dontwrite0to1_atomic(ptr nocapture %p) {223; CHECK-LABEL: @dontwrite0to1_atomic(224; CHECK-NEXT: entry:225; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[P:%.*]], i8 0, i64 32, i32 4)226; CHECK-NEXT: store atomic i16 1, ptr [[P]] unordered, align 4227; CHECK-NEXT: ret void228;229entry:230 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 32, i32 4)231 store atomic i16 1, ptr %p unordered, align 4232 ret void233}234 235define void @write2to10(ptr nocapture %p) {236; CHECK-LABEL: @write2to10(237; CHECK-NEXT: entry:238; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 1239; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4240; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 28, i1 false)241; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1242; CHECK-NEXT: store i64 1, ptr [[ARRAYIDX2]], align 8243; CHECK-NEXT: ret void244;245entry:246 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 1247 call void @llvm.memset.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 32, i1 false)248 %arrayidx2 = getelementptr inbounds i16, ptr %p, i64 1249 store i64 1, ptr %arrayidx2, align 8250 ret void251}252 253define void @write2to10_atomic(ptr nocapture %p) {254; CHECK-LABEL: @write2to10_atomic(255; CHECK-NEXT: entry:256; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 1257; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4258; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 28, i32 4)259; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, ptr [[P]], i64 1260; CHECK-NEXT: store atomic i64 1, ptr [[ARRAYIDX2]] unordered, align 8261; CHECK-NEXT: ret void262;263entry:264 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 1265 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 32, i32 4)266 %arrayidx2 = getelementptr inbounds i16, ptr %p, i64 1267 store atomic i64 1, ptr %arrayidx2 unordered, align 8268 ret void269}270 271define void @write8To15AndThen0To7(ptr nocapture %P) {272; CHECK-LABEL: @write8To15AndThen0To7(273; CHECK-NEXT: entry:274; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16275; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i1 false)276; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1277; CHECK-NEXT: store i64 1, ptr [[BASE64_1]], align 4278; CHECK-NEXT: store i64 2, ptr [[P]], align 4279; CHECK-NEXT: ret void280;281entry:282 283 tail call void @llvm.memset.p0.i64(ptr align 8 %P, i8 0, i64 32, i1 false)284 285 %base64_1 = getelementptr inbounds i64, ptr %P, i64 1286 287 store i64 1, ptr %base64_1288 store i64 2, ptr %P289 ret void290}291 292define void @write8To15AndThen0To7_atomic(ptr nocapture %P) {293; CHECK-LABEL: @write8To15AndThen0To7_atomic(294; CHECK-NEXT: entry:295; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16296; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i32 8)297; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1298; CHECK-NEXT: store atomic i64 1, ptr [[BASE64_1]] unordered, align 8299; CHECK-NEXT: store atomic i64 2, ptr [[P]] unordered, align 8300; CHECK-NEXT: ret void301;302entry:303 304 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)305 306 %base64_1 = getelementptr inbounds i64, ptr %P, i64 1307 308 store atomic i64 1, ptr %base64_1 unordered, align 8309 store atomic i64 2, ptr %P unordered, align 8310 ret void311}312 313define void @write8To15AndThen0To7_atomic_weaker(ptr nocapture %P) {314; CHECK-LABEL: @write8To15AndThen0To7_atomic_weaker(315; CHECK-NEXT: entry:316; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16317; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i32 8)318; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1319; CHECK-NEXT: store atomic i64 1, ptr [[BASE64_1]] unordered, align 8320; CHECK-NEXT: store i64 2, ptr [[P]], align 8321; CHECK-NEXT: ret void322;323entry:324 325 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)326 327 %base64_1 = getelementptr inbounds i64, ptr %P, i64 1328 329 store atomic i64 1, ptr %base64_1 unordered, align 8330 store i64 2, ptr %P, align 8331 ret void332}333 334define void @write8To15AndThen0To7_atomic_weaker_2(ptr nocapture %P) {335; CHECK-LABEL: @write8To15AndThen0To7_atomic_weaker_2(336; CHECK-NEXT: entry:337; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16338; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i32 8)339; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1340; CHECK-NEXT: store i64 1, ptr [[BASE64_1]], align 8341; CHECK-NEXT: store atomic i64 2, ptr [[P]] unordered, align 8342; CHECK-NEXT: ret void343;344entry:345 346 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)347 348 %base64_1 = getelementptr inbounds i64, ptr %P, i64 1349 350 store i64 1, ptr %base64_1, align 8351 store atomic i64 2, ptr %P unordered, align 8352 ret void353}354 355declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind356declare void @llvm.memset.p1.i64(ptr addrspace(1) nocapture, i8, i64, i1) nounwind357declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture, i8, i64, i32) nounwind358 359define void @ow_begin_align1(ptr nocapture %p) {360; CHECK-LABEL: @ow_begin_align1(361; CHECK-NEXT: entry:362; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1363; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 7364; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP0]], i8 0, i64 25, i1 false)365; CHECK-NEXT: store i64 1, ptr [[P]], align 1366; CHECK-NEXT: ret void367;368entry:369 %p1 = getelementptr inbounds i8, ptr %p, i64 1370 call void @llvm.memset.p0.i64(ptr align 1 %p1, i8 0, i64 32, i1 false)371 store i64 1, ptr %p, align 1372 ret void373}374 375define void @ow_end_align4(ptr nocapture %p) {376; CHECK-LABEL: @ow_end_align4(377; CHECK-NEXT: entry:378; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1379; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 4380; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 28, i1 false)381; CHECK-NEXT: store i64 1, ptr [[P]], align 1382; CHECK-NEXT: ret void383;384entry:385 %p1 = getelementptr inbounds i8, ptr %p, i64 1386 call void @llvm.memset.p0.i64(ptr align 4 %p1, i8 0, i64 32, i1 false)387 store i64 1, ptr %p, align 1388 ret void389}390 391define void @ow_end_align8(ptr nocapture %p) {392; CHECK-LABEL: @ow_end_align8(393; CHECK-NEXT: entry:394; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1395; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[P1]], i8 0, i64 32, i1 false)396; CHECK-NEXT: store i64 1, ptr [[P]], align 1397; CHECK-NEXT: ret void398;399entry:400 %p1 = getelementptr inbounds i8, ptr %p, i64 1401 call void @llvm.memset.p0.i64(ptr align 8 %p1, i8 0, i64 32, i1 false)402 store i64 1, ptr %p, align 1403 ret void404}405 406; Verify that we adjust/drop the dereferenceable attribute.407define void @dereferenceable(ptr nocapture %p) {408; CHECK-LABEL: @dereferenceable(409; CHECK-NEXT: entry:410; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4411; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)412; CHECK-NEXT: store i32 1, ptr [[P]], align 4413; CHECK-NEXT: ret void414;415entry:416 call void @llvm.memset.p0.i64(ptr dereferenceable(28) align 4 %p, i8 0, i64 28, i1 false)417 store i32 1, ptr %p, align 4418 ret void419}420 421; Verify that we adjust/drop the dereferenceable_or_null attribute.422define void @dereferenceable_or_null(ptr nocapture %p) {423; CHECK-LABEL: @dereferenceable_or_null(424; CHECK-NEXT: entry:425; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 8426; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 20, i1 false)427; CHECK-NEXT: store i64 1, ptr [[P]], align 4428; CHECK-NEXT: ret void429;430entry:431 call void @llvm.memset.p0.i64(ptr dereferenceable_or_null(28) align 4 %p, i8 0, i64 28, i1 false)432 store i64 1, ptr %p, align 4433 ret void434}435