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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=dse -S | FileCheck %s3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"4 5%struct.vec2 = type { <4 x i32>, <4 x i32> }6%struct.vec2plusi = type { <4 x i32>, <4 x i32>, i32 }7 8@glob1 = global %struct.vec2 zeroinitializer, align 169@glob2 = global %struct.vec2plusi zeroinitializer, align 1610 11define void @write24to28(ptr nocapture %p) nounwind uwtable ssp {12; CHECK-LABEL: @write24to28(13; CHECK-NEXT: entry:14; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 115; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[ARRAYIDX0]], i8 0, i64 24, i1 false)16; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 717; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 418; CHECK-NEXT: ret void19;20entry:21 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 122 call void @llvm.memset.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i1 false)23 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 724 store i32 1, ptr %arrayidx1, align 425 ret void26}27 28define void @write24to28_atomic(ptr nocapture %p) nounwind uwtable ssp {29; CHECK-LABEL: @write24to28_atomic(30; CHECK-NEXT: entry:31; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 132; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[ARRAYIDX0]], i8 0, i64 24, i32 4)33; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 734; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 435; CHECK-NEXT: ret void36;37entry:38 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 139 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)40 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 741 store atomic i32 1, ptr %arrayidx1 unordered, align 442 ret void43}44 45; Atomicity of the store is weaker from the memset46define void @write24to28_atomic_weaker(ptr nocapture %p) nounwind uwtable ssp {47; CHECK-LABEL: @write24to28_atomic_weaker(48; CHECK-NEXT: entry:49; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 150; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[ARRAYIDX0]], i8 0, i64 24, i32 4)51; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 752; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 453; CHECK-NEXT: ret void54;55entry:56 %arrayidx0 = getelementptr inbounds i32, ptr %p, i64 157 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)58 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 759 store i32 1, ptr %arrayidx1, align 460 ret void61}62 63define void @write28to32(ptr nocapture %p) nounwind uwtable ssp {64; CHECK-LABEL: @write28to32(65; CHECK-NEXT: entry:66; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[P:%.*]], i8 0, i64 28, i1 false)67; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 768; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 469; CHECK-NEXT: ret void70;71entry:72 call void @llvm.memset.p0.i64(ptr align 4 %p, i8 0, i64 32, i1 false)73 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 774 store i32 1, ptr %arrayidx1, align 475 ret void76}77 78define void @write28to32_atomic(ptr nocapture %p) nounwind uwtable ssp {79; CHECK-LABEL: @write28to32_atomic(80; CHECK-NEXT: entry:81; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[P:%.*]], i8 0, i64 28, i32 4)82; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 783; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 484; CHECK-NEXT: ret void85;86entry:87 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 32, i32 4)88 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 789 store atomic i32 1, ptr %arrayidx1 unordered, align 490 ret void91}92 93define void @dontwrite28to32memset(ptr nocapture %p) nounwind uwtable ssp {94; CHECK-LABEL: @dontwrite28to32memset(95; CHECK-NEXT: entry:96; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[P:%.*]], i8 0, i64 32, i1 false)97; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 798; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 499; CHECK-NEXT: ret void100;101entry:102 call void @llvm.memset.p0.i64(ptr align 16 %p, i8 0, i64 32, i1 false)103 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 7104 store i32 1, ptr %arrayidx1, align 4105 ret void106}107 108define void @dontwrite28to32memset_atomic(ptr nocapture %p) nounwind uwtable ssp {109; CHECK-LABEL: @dontwrite28to32memset_atomic(110; CHECK-NEXT: entry:111; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 16 [[P:%.*]], i8 0, i64 32, i32 4)112; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 7113; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 4114; CHECK-NEXT: ret void115;116entry:117 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 16 %p, i8 0, i64 32, i32 4)118 %arrayidx1 = getelementptr inbounds i32, ptr %p, i64 7119 store atomic i32 1, ptr %arrayidx1 unordered, align 4120 ret void121}122 123define void @write32to36(ptr nocapture %p) nounwind uwtable ssp {124; CHECK-LABEL: @write32to36(125; CHECK-NEXT: entry:126; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob2, i64 32, i1 false)127; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2PLUSI:%.*]], ptr [[P]], i64 0, i32 2128; CHECK-NEXT: store i32 1, ptr [[C]], align 4129; CHECK-NEXT: ret void130;131entry:132 tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob2, i64 36, i1 false)133 %c = getelementptr inbounds %struct.vec2plusi, ptr %p, i64 0, i32 2134 store i32 1, ptr %c, align 4135 ret void136}137 138define void @write32to36_atomic(ptr nocapture %p) nounwind uwtable ssp {139; CHECK-LABEL: @write32to36_atomic(140; CHECK-NEXT: entry:141; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob2, i64 32, i32 4)142; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2PLUSI:%.*]], ptr [[P]], i64 0, i32 2143; CHECK-NEXT: store atomic i32 1, ptr [[C]] unordered, align 4144; CHECK-NEXT: ret void145;146entry:147 tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob2, i64 36, i32 4)148 %c = getelementptr inbounds %struct.vec2plusi, ptr %p, i64 0, i32 2149 store atomic i32 1, ptr %c unordered, align 4150 ret void151}152 153; Atomicity of the store is weaker than the memcpy154define void @write32to36_atomic_weaker(ptr nocapture %p) nounwind uwtable ssp {155; CHECK-LABEL: @write32to36_atomic_weaker(156; CHECK-NEXT: entry:157; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob2, i64 32, i32 4)158; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2PLUSI:%.*]], ptr [[P]], i64 0, i32 2159; CHECK-NEXT: store i32 1, ptr [[C]], align 4160; CHECK-NEXT: ret void161;162entry:163 tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob2, i64 36, i32 4)164 %c = getelementptr inbounds %struct.vec2plusi, ptr %p, i64 0, i32 2165 store i32 1, ptr %c, align 4166 ret void167}168 169define void @write16to32(ptr nocapture %p) nounwind uwtable ssp {170; CHECK-LABEL: @write16to32(171; CHECK-NEXT: entry:172; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob1, i64 16, i1 false)173; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], ptr [[P]], i64 0, i32 1174; CHECK-NEXT: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr [[C]], align 4175; CHECK-NEXT: ret void176;177entry:178 tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob1, i64 32, i1 false)179 %c = getelementptr inbounds %struct.vec2, ptr %p, i64 0, i32 1180 store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %c, align 4181 ret void182}183 184define void @write16to32_atomic(ptr nocapture %p) nounwind uwtable ssp {185; CHECK-LABEL: @write16to32_atomic(186; CHECK-NEXT: entry:187; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob1, i64 16, i32 4)188; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], ptr [[P]], i64 0, i32 1189; CHECK-NEXT: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr [[C]], align 4190; CHECK-NEXT: ret void191;192entry:193 tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob1, i64 32, i32 4)194 %c = getelementptr inbounds %struct.vec2, ptr %p, i64 0, i32 1195 store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %c, align 4196 ret void197}198 199define void @dontwrite28to32memcpy(ptr nocapture %p) nounwind uwtable ssp {200; CHECK-LABEL: @dontwrite28to32memcpy(201; CHECK-NEXT: entry:202; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob1, i64 32, i1 false)203; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], ptr [[P]], i64 0, i32 0, i64 7204; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 4205; CHECK-NEXT: ret void206;207entry:208 tail call void @llvm.memcpy.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob1, i64 32, i1 false)209 %arrayidx1 = getelementptr inbounds %struct.vec2, ptr %p, i64 0, i32 0, i64 7210 store i32 1, ptr %arrayidx1, align 4211 ret void212}213 214define void @dontwrite28to32memcpy_atomic(ptr nocapture %p) nounwind uwtable ssp {215; CHECK-LABEL: @dontwrite28to32memcpy_atomic(216; CHECK-NEXT: entry:217; CHECK-NEXT: tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 [[P:%.*]], ptr align 16 @glob1, i64 32, i32 4)218; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], ptr [[P]], i64 0, i32 0, i64 7219; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 4220; CHECK-NEXT: ret void221;222entry:223 tail call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 16 %p, ptr align 16 @glob1, i64 32, i32 4)224 %arrayidx1 = getelementptr inbounds %struct.vec2, ptr %p, i64 0, i32 0, i64 7225 store atomic i32 1, ptr %arrayidx1 unordered, align 4226 ret void227}228 229declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind230declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i32) nounwind231declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind232declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture, i8, i64, i32) nounwind233 234%struct.trapframe = type { i64, i64, i64 }235 236; bugzilla 11455 - make sure negative GEP's don't break this optimisation237define void @cpu_lwp_fork(ptr %md_regs, i64 %pcb_rsp0) nounwind uwtable noinline ssp {238; CHECK-LABEL: @cpu_lwp_fork(239; CHECK-NEXT: entry:240; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[PCB_RSP0:%.*]] to ptr241; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds [[STRUCT_TRAPFRAME:%.*]], ptr [[TMP0]], i64 -1242; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[ADD_PTR]], ptr [[MD_REGS:%.*]], i64 24, i1 false)243; CHECK-NEXT: [[TF_TRAPNO:%.*]] = getelementptr inbounds [[STRUCT_TRAPFRAME]], ptr [[TMP0]], i64 -1, i32 1244; CHECK-NEXT: store i64 3, ptr [[TF_TRAPNO]], align 8245; CHECK-NEXT: ret void246;247entry:248 %0 = inttoptr i64 %pcb_rsp0 to ptr249 %add.ptr = getelementptr inbounds %struct.trapframe, ptr %0, i64 -1250 call void @llvm.memcpy.p0.p0.i64(ptr %add.ptr, ptr %md_regs, i64 24, i1 false)251 %tf_trapno = getelementptr inbounds %struct.trapframe, ptr %0, i64 -1, i32 1252 store i64 3, ptr %tf_trapno, align 8253 ret void254}255 256define void @write16To23AndThen24To31(ptr nocapture %P, i64 %n64, i32 %n32, i16 %n16, i8 %n8) {257; CHECK-LABEL: @write16To23AndThen24To31(258; CHECK-NEXT: entry:259; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 16, i1 false)260; CHECK-NEXT: [[BASE64_2:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 2261; CHECK-NEXT: [[BASE64_3:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 3262; CHECK-NEXT: store i64 3, ptr [[BASE64_2]]263; CHECK-NEXT: store i64 3, ptr [[BASE64_3]]264; CHECK-NEXT: ret void265;266entry:267 268 tail call void @llvm.memset.p0.i64(ptr align 8 %P, i8 0, i64 32, i1 false)269 270 %base64_2 = getelementptr inbounds i64, ptr %P, i64 2271 %base64_3 = getelementptr inbounds i64, ptr %P, i64 3272 273 store i64 3, ptr %base64_2274 store i64 3, ptr %base64_3275 ret void276}277 278define void @write16To23AndThen24To31_atomic(ptr nocapture %P, i64 %n64, i32 %n32, i16 %n16, i8 %n8) {279; CHECK-LABEL: @write16To23AndThen24To31_atomic(280; CHECK-NEXT: entry:281; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 16, i32 8)282; CHECK-NEXT: [[BASE64_2:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 2283; CHECK-NEXT: [[BASE64_3:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 3284; CHECK-NEXT: store atomic i64 3, ptr [[BASE64_2]] unordered, align 8285; CHECK-NEXT: store atomic i64 3, ptr [[BASE64_3]] unordered, align 8286; CHECK-NEXT: ret void287;288entry:289 290 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)291 292 %base64_2 = getelementptr inbounds i64, ptr %P, i64 2293 %base64_3 = getelementptr inbounds i64, ptr %P, i64 3294 295 store atomic i64 3, ptr %base64_2 unordered, align 8296 store atomic i64 3, ptr %base64_3 unordered, align 8297 ret void298}299 300define void @write16To23AndThen24To31_atomic_weaker1(ptr nocapture %P, i64 %n64, i32 %n32, i16 %n16, i8 %n8) {301; CHECK-LABEL: @write16To23AndThen24To31_atomic_weaker1(302; CHECK-NEXT: entry:303; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 16, i32 8)304; CHECK-NEXT: [[BASE64_2:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 2305; CHECK-NEXT: [[BASE64_3:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 3306; CHECK-NEXT: store i64 3, ptr [[BASE64_2]], align 8307; CHECK-NEXT: store atomic i64 3, ptr [[BASE64_3]] unordered, align 8308; CHECK-NEXT: ret void309;310entry:311 312 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)313 314 %base64_2 = getelementptr inbounds i64, ptr %P, i64 2315 %base64_3 = getelementptr inbounds i64, ptr %P, i64 3316 317 store i64 3, ptr %base64_2, align 8318 store atomic i64 3, ptr %base64_3 unordered, align 8319 ret void320}321 322define void @write16To23AndThen24To31_atomic_weaker2(ptr nocapture %P, i64 %n64, i32 %n32, i16 %n16, i8 %n8) {323; CHECK-LABEL: @write16To23AndThen24To31_atomic_weaker2(324; CHECK-NEXT: entry:325; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[P:%.*]], i8 0, i64 16, i32 8)326; CHECK-NEXT: [[BASE64_2:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 2327; CHECK-NEXT: [[BASE64_3:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 3328; CHECK-NEXT: store atomic i64 3, ptr [[BASE64_2]] unordered, align 8329; CHECK-NEXT: store i64 3, ptr [[BASE64_3]], align 8330; CHECK-NEXT: ret void331;332entry:333 334 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)335 336 %base64_2 = getelementptr inbounds i64, ptr %P, i64 2337 %base64_3 = getelementptr inbounds i64, ptr %P, i64 3338 339 store atomic i64 3, ptr %base64_2 unordered, align 8340 store i64 3, ptr %base64_3, align 8341 ret void342}343 344define void @ow_end_align1(ptr nocapture %p) {345; CHECK-LABEL: @ow_end_align1(346; CHECK-NEXT: entry:347; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1348; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[P1]], i8 0, i64 27, i1 false)349; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 27350; CHECK-NEXT: store i64 1, ptr [[P2]], align 1351; CHECK-NEXT: ret void352;353entry:354 %p1 = getelementptr inbounds i8, ptr %p, i64 1355 call void @llvm.memset.p0.i64(ptr align 1 %p1, i8 0, i64 32, i1 false)356 %p2 = getelementptr inbounds i8, ptr %p1, i64 27357 store i64 1, ptr %p2, align 1358 ret void359}360 361define void @ow_end_align4(ptr nocapture %p) {362; CHECK-LABEL: @ow_end_align4(363; CHECK-NEXT: entry:364; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1365; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[P1]], i8 0, i64 28, i1 false)366; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 27367; CHECK-NEXT: store i64 1, ptr [[P2]], align 1368; CHECK-NEXT: ret void369;370entry:371 %p1 = getelementptr inbounds i8, ptr %p, i64 1372 call void @llvm.memset.p0.i64(ptr align 4 %p1, i8 0, i64 32, i1 false)373 %p2 = getelementptr inbounds i8, ptr %p1, i64 27374 store i64 1, ptr %p2, align 1375 ret void376}377 378define void @ow_end_align8(ptr nocapture %p) {379; CHECK-LABEL: @ow_end_align8(380; CHECK-NEXT: entry:381; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1382; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[P1]], i8 0, i64 32, i1 false)383; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 27384; CHECK-NEXT: store i64 1, ptr [[P2]], align 1385; CHECK-NEXT: ret void386;387entry:388 %p1 = getelementptr inbounds i8, ptr %p, i64 1389 call void @llvm.memset.p0.i64(ptr align 8 %p1, i8 0, i64 32, i1 false)390 %p2 = getelementptr inbounds i8, ptr %p1, i64 27391 store i64 1, ptr %p2, align 1392 ret void393}394 395