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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -S -passes='early-cse' -earlycse-debug-hash | FileCheck %s --check-prefix=CHECK-NOMEMSSA3; RUN: opt < %s -S -passes='early-cse<memssa>' | FileCheck %s4; RUN: opt < %s -S -passes='early-cse' | FileCheck %s --check-prefix=CHECK-NOMEMSSA5; RUN: opt < %s -S -aa-pipeline=basic-aa -passes='early-cse<memssa>' | FileCheck %s6 7@G1 = global i32 zeroinitializer8@G2 = global i32 zeroinitializer9@G3 = global i32 zeroinitializer10 11;; Simple load value numbering across non-clobbering store.12define i32 @test1() {13; CHECK-NOMEMSSA-LABEL: @test1(14; CHECK-NOMEMSSA-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 415; CHECK-NOMEMSSA-NEXT: store i32 0, ptr @G2, align 416; CHECK-NOMEMSSA-NEXT: [[V2:%.*]] = load i32, ptr @G1, align 417; CHECK-NOMEMSSA-NEXT: [[DIFF:%.*]] = sub i32 [[V1]], [[V2]]18; CHECK-NOMEMSSA-NEXT: ret i32 [[DIFF]]19;20; CHECK-LABEL: @test1(21; CHECK-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 422; CHECK-NEXT: store i32 0, ptr @G2, align 423; CHECK-NEXT: ret i32 024;25 %V1 = load i32, ptr @G126 store i32 0, ptr @G227 %V2 = load i32, ptr @G128 %Diff = sub i32 %V1, %V229 ret i32 %Diff30}31 32;; Simple dead store elimination across non-clobbering store.33define void @test2() {34; CHECK-NOMEMSSA-LABEL: @test2(35; CHECK-NOMEMSSA-NEXT: entry:36; CHECK-NOMEMSSA-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 437; CHECK-NOMEMSSA-NEXT: store i32 0, ptr @G2, align 438; CHECK-NOMEMSSA-NEXT: store i32 [[V1]], ptr @G1, align 439; CHECK-NOMEMSSA-NEXT: ret void40;41; CHECK-LABEL: @test2(42; CHECK-NEXT: entry:43; CHECK-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 444; CHECK-NEXT: store i32 0, ptr @G2, align 445; CHECK-NEXT: ret void46;47entry:48 %V1 = load i32, ptr @G149 store i32 0, ptr @G250 store i32 %V1, ptr @G151 ret void52}53 54;; Check that memoryphi optimization happens during EarlyCSE, enabling55;; more load CSE opportunities.56define void @test_memphiopt(i1 %c, ptr %p) {57; CHECK-NOMEMSSA-LABEL: @test_memphiopt(58; CHECK-NOMEMSSA-NEXT: entry:59; CHECK-NOMEMSSA-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 460; CHECK-NOMEMSSA-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]61; CHECK-NOMEMSSA: then:62; CHECK-NOMEMSSA-NEXT: [[PV:%.*]] = load i32, ptr [[P:%.*]], align 463; CHECK-NOMEMSSA-NEXT: br label [[END]]64; CHECK-NOMEMSSA: end:65; CHECK-NOMEMSSA-NEXT: [[V2:%.*]] = load i32, ptr @G1, align 466; CHECK-NOMEMSSA-NEXT: [[SUM:%.*]] = add i32 [[V1]], [[V2]]67; CHECK-NOMEMSSA-NEXT: store i32 [[SUM]], ptr @G2, align 468; CHECK-NOMEMSSA-NEXT: ret void69;70; CHECK-LABEL: @test_memphiopt(71; CHECK-NEXT: entry:72; CHECK-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 473; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]74; CHECK: then:75; CHECK-NEXT: [[PV:%.*]] = load i32, ptr [[P:%.*]], align 476; CHECK-NEXT: br label [[END]]77; CHECK: end:78; CHECK-NEXT: [[SUM:%.*]] = add i32 [[V1]], [[V1]]79; CHECK-NEXT: store i32 [[SUM]], ptr @G2, align 480; CHECK-NEXT: ret void81;82entry:83 %v1 = load i32, ptr @G184 br i1 %c, label %then, label %end85 86then:87 %pv = load i32, ptr %p88 store i32 %pv, ptr %p89 br label %end90 91end:92 %v2 = load i32, ptr @G193 %sum = add i32 %v1, %v294 store i32 %sum, ptr @G295 ret void96}97 98 99;; Check that MemoryPhi optimization and MemoryUse re-optimization100;; happens during EarlyCSE, enabling more load CSE opportunities.101define void @test_memphiopt2(i1 %c, ptr %p) {102; CHECK-NOMEMSSA-LABEL: @test_memphiopt2(103; CHECK-NOMEMSSA-NEXT: entry:104; CHECK-NOMEMSSA-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 4105; CHECK-NOMEMSSA-NEXT: store i32 [[V1]], ptr @G2, align 4106; CHECK-NOMEMSSA-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]107; CHECK-NOMEMSSA: then:108; CHECK-NOMEMSSA-NEXT: [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4109; CHECK-NOMEMSSA-NEXT: br label [[END]]110; CHECK-NOMEMSSA: end:111; CHECK-NOMEMSSA-NEXT: [[V2:%.*]] = load i32, ptr @G1, align 4112; CHECK-NOMEMSSA-NEXT: store i32 [[V2]], ptr @G3, align 4113; CHECK-NOMEMSSA-NEXT: ret void114;115; CHECK-LABEL: @test_memphiopt2(116; CHECK-NEXT: entry:117; CHECK-NEXT: [[V1:%.*]] = load i32, ptr @G1, align 4118; CHECK-NEXT: store i32 [[V1]], ptr @G2, align 4119; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]120; CHECK: then:121; CHECK-NEXT: [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4122; CHECK-NEXT: br label [[END]]123; CHECK: end:124; CHECK-NEXT: store i32 [[V1]], ptr @G3, align 4125; CHECK-NEXT: ret void126;127entry:128 %v1 = load i32, ptr @G1129 store i32 %v1, ptr @G2130 br i1 %c, label %then, label %end131 132then:133 %pv = load i32, ptr %p134 store i32 %pv, ptr %p135 br label %end136 137end:138 %v2 = load i32, ptr @G1139 store i32 %v2, ptr @G3140 ret void141}142 143;; Check that we respect lifetime.start/lifetime.end intrinsics when deleting144;; stores that, without the lifetime calls, would be writebacks.145define void @test_writeback_lifetimes() {146; CHECK-NOMEMSSA-LABEL: @test_writeback_lifetimes(147; CHECK-NOMEMSSA-NEXT: entry:148; CHECK-NOMEMSSA-NEXT: [[P:%.*]] = alloca i64, align 8149; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])150; CHECK-NOMEMSSA-NEXT: [[Q:%.*]] = getelementptr i32, ptr [[P]], i64 1151; CHECK-NOMEMSSA-NEXT: [[PV:%.*]] = load i32, ptr [[P]], align 4152; CHECK-NOMEMSSA-NEXT: [[QV:%.*]] = load i32, ptr [[Q]], align 4153; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]])154; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])155; CHECK-NOMEMSSA-NEXT: store i32 [[PV]], ptr [[P]], align 4156; CHECK-NOMEMSSA-NEXT: store i32 [[QV]], ptr [[Q]], align 4157; CHECK-NOMEMSSA-NEXT: ret void158;159; CHECK-LABEL: @test_writeback_lifetimes(160; CHECK-NEXT: entry:161; CHECK-NEXT: [[P:%.*]] = alloca i64, align 8162; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])163; CHECK-NEXT: [[Q:%.*]] = getelementptr i32, ptr [[P]], i64 1164; CHECK-NEXT: [[PV:%.*]] = load i32, ptr [[P]], align 4165; CHECK-NEXT: [[QV:%.*]] = load i32, ptr [[Q]], align 4166; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]])167; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])168; CHECK-NEXT: store i32 [[PV]], ptr [[P]], align 4169; CHECK-NEXT: store i32 [[QV]], ptr [[Q]], align 4170; CHECK-NEXT: ret void171;172entry:173 %p = alloca i64174 call void @llvm.lifetime.start.p0(ptr %p)175 %q = getelementptr i32, ptr %p, i64 1176 %pv = load i32, ptr %p177 %qv = load i32, ptr %q178 call void @llvm.lifetime.end.p0(ptr %p)179 call void @llvm.lifetime.start.p0(ptr %p)180 store i32 %pv, ptr %p181 store i32 %qv, ptr %q182 ret void183}184 185;; Check that we respect lifetime.start/lifetime.end intrinsics when deleting186;; stores that, without the lifetime calls, would be writebacks.187define void @test_writeback_lifetimes_multi_arg(ptr %q) {188; CHECK-NOMEMSSA-LABEL: @test_writeback_lifetimes_multi_arg(189; CHECK-NOMEMSSA-NEXT: entry:190; CHECK-NOMEMSSA-NEXT: [[P:%.*]] = alloca i64, align 8191; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])192; CHECK-NOMEMSSA-NEXT: [[PV:%.*]] = load i32, ptr [[P]], align 4193; CHECK-NOMEMSSA-NEXT: [[QV:%.*]] = load i32, ptr [[Q:%.*]], align 4194; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]])195; CHECK-NOMEMSSA-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])196; CHECK-NOMEMSSA-NEXT: store i32 [[PV]], ptr [[P]], align 4197; CHECK-NOMEMSSA-NEXT: store i32 [[QV]], ptr [[Q]], align 4198; CHECK-NOMEMSSA-NEXT: ret void199;200; CHECK-LABEL: @test_writeback_lifetimes_multi_arg(201; CHECK-NEXT: entry:202; CHECK-NEXT: [[P:%.*]] = alloca i64, align 8203; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])204; CHECK-NEXT: [[PV:%.*]] = load i32, ptr [[P]], align 4205; CHECK-NEXT: [[QV:%.*]] = load i32, ptr [[Q:%.*]], align 4206; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]])207; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]])208; CHECK-NEXT: store i32 [[PV]], ptr [[P]], align 4209; CHECK-NEXT: ret void210;211entry:212 %p = alloca i64213 call void @llvm.lifetime.start.p0(ptr %p)214 %pv = load i32, ptr %p215 %qv = load i32, ptr %q216 call void @llvm.lifetime.end.p0(ptr %p)217 call void @llvm.lifetime.start.p0(ptr %p)218 store i32 %pv, ptr %p219 store i32 %qv, ptr %q220 ret void221}222 223declare void @llvm.lifetime.end.p0(ptr)224declare void @llvm.lifetime.start.p0(ptr)225