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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 32; RUN: opt -S -expand-memcmp -memcmp-num-loads-per-block=1 -mtriple=aarch64-unknown-unknown < %s | FileCheck %s3; RUN: opt -S -passes=expand-memcmp -memcmp-num-loads-per-block=1 -mtriple=aarch64-unknown-unknown < %s | FileCheck %s4 5declare i32 @memcmp(ptr nocapture, ptr nocapture, i64)6 7define i32 @cmp2(ptr nocapture readonly %x, ptr nocapture readonly %y) {8; CHECK-LABEL: define i32 @cmp2(9; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {10; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[X]], align 111; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[Y]], align 112; CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])13; CHECK-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])14; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[TMP3]] to i3215; CHECK-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i3216; CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], [[TMP6]]17; CHECK-NEXT: ret i32 [[TMP7]]18;19 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)20 ret i32 %call21}22 23define i32 @cmp2_align2(ptr nocapture readonly align 2 %x, ptr nocapture readonly align 2 %y) {24; CHECK-LABEL: define i32 @cmp2_align2(25; CHECK-SAME: ptr readonly align 2 captures(none) [[X:%.*]], ptr readonly align 2 captures(none) [[Y:%.*]]) {26; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[X]], align 227; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[Y]], align 228; CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])29; CHECK-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])30; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[TMP3]] to i3231; CHECK-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i3232; CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], [[TMP6]]33; CHECK-NEXT: ret i32 [[TMP7]]34;35 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)36 ret i32 %call37}38 39define i32 @cmp3(ptr nocapture readonly %x, ptr nocapture readonly %y) {40; CHECK-LABEL: define i32 @cmp3(41; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {42; CHECK-NEXT: [[TMP1:%.*]] = load i24, ptr [[X]], align 143; CHECK-NEXT: [[TMP2:%.*]] = load i24, ptr [[Y]], align 144; CHECK-NEXT: [[TMP3:%.*]] = zext i24 [[TMP1]] to i3245; CHECK-NEXT: [[TMP4:%.*]] = zext i24 [[TMP2]] to i3246; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])47; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])48; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[TMP5]], i32 [[TMP6]])49; CHECK-NEXT: ret i32 [[TMP11]]50;51 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 3)52 ret i32 %call53}54 55define i32 @cmp4(ptr nocapture readonly %x, ptr nocapture readonly %y) {56; CHECK-LABEL: define i32 @cmp4(57; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {58; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 159; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 160; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])61; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])62; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[TMP3]], i32 [[TMP4]])63; CHECK-NEXT: ret i32 [[TMP9]]64;65 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 4)66 ret i32 %call67}68 69define i32 @cmp5(ptr nocapture readonly %x, ptr nocapture readonly %y) {70; CHECK-LABEL: define i32 @cmp5(71; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {72; CHECK-NEXT: [[TMP1:%.*]] = load i40, ptr [[X]], align 173; CHECK-NEXT: [[TMP2:%.*]] = load i40, ptr [[Y]], align 174; CHECK-NEXT: [[TMP3:%.*]] = zext i40 [[TMP1]] to i6475; CHECK-NEXT: [[TMP4:%.*]] = zext i40 [[TMP2]] to i6476; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])77; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])78; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.ucmp.i32.i64(i64 [[TMP5]], i64 [[TMP6]])79; CHECK-NEXT: ret i32 [[TMP11]]80;81 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 5)82 ret i32 %call83}84 85define i32 @cmp6(ptr nocapture readonly %x, ptr nocapture readonly %y) {86; CHECK-LABEL: define i32 @cmp6(87; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {88; CHECK-NEXT: [[TMP1:%.*]] = load i48, ptr [[X]], align 189; CHECK-NEXT: [[TMP2:%.*]] = load i48, ptr [[Y]], align 190; CHECK-NEXT: [[TMP3:%.*]] = zext i48 [[TMP1]] to i6491; CHECK-NEXT: [[TMP4:%.*]] = zext i48 [[TMP2]] to i6492; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])93; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])94; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.ucmp.i32.i64(i64 [[TMP5]], i64 [[TMP6]])95; CHECK-NEXT: ret i32 [[TMP11]]96;97 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)98 ret i32 %call99}100 101define i32 @cmp7(ptr nocapture readonly %x, ptr nocapture readonly %y) {102; CHECK-LABEL: define i32 @cmp7(103; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {104; CHECK-NEXT: br label [[LOADBB:%.*]]105; CHECK: res_block:106; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]107; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]108; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]109; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1110; CHECK-NEXT: br label [[ENDBLOCK:%.*]]111; CHECK: loadbb:112; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[X]], align 1113; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[Y]], align 1114; CHECK-NEXT: [[TMP5]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])115; CHECK-NEXT: [[TMP6]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])116; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP5]], [[TMP6]]117; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]118; CHECK: loadbb1:119; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 3120; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 3121; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP8]], align 1122; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 1123; CHECK-NEXT: [[TMP12]] = call i32 @llvm.bswap.i32(i32 [[TMP10]])124; CHECK-NEXT: [[TMP13]] = call i32 @llvm.bswap.i32(i32 [[TMP11]])125; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP12]], [[TMP13]]126; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]127; CHECK: endblock:128; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]129; CHECK-NEXT: ret i32 [[PHI_RES]]130;131 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 7)132 ret i32 %call133}134 135define i32 @cmp8(ptr nocapture readonly %x, ptr nocapture readonly %y) {136; CHECK-LABEL: define i32 @cmp8(137; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {138; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1139; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1140; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])141; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])142; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.ucmp.i32.i64(i64 [[TMP3]], i64 [[TMP4]])143; CHECK-NEXT: ret i32 [[TMP9]]144;145 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 8)146 ret i32 %call147}148 149define i32 @cmp9(ptr nocapture readonly %x, ptr nocapture readonly %y) {150; CHECK-LABEL: define i32 @cmp9(151; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {152; CHECK-NEXT: br label [[LOADBB:%.*]]153; CHECK: res_block:154; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP5:%.*]], [[TMP6:%.*]]155; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1156; CHECK-NEXT: br label [[ENDBLOCK:%.*]]157; CHECK: loadbb:158; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1159; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1160; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])161; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])162; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]163; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]164; CHECK: loadbb1:165; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 8166; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 8167; CHECK-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP8]], align 1168; CHECK-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP9]], align 1169; CHECK-NEXT: [[TMP12:%.*]] = zext i8 [[TMP10]] to i32170; CHECK-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32171; CHECK-NEXT: [[TMP14:%.*]] = sub i32 [[TMP12]], [[TMP13]]172; CHECK-NEXT: br label [[ENDBLOCK]]173; CHECK: endblock:174; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP14]], [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]175; CHECK-NEXT: ret i32 [[PHI_RES]]176;177 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 9)178 ret i32 %call179}180 181define i32 @cmp10(ptr nocapture readonly %x, ptr nocapture readonly %y) {182; CHECK-LABEL: define i32 @cmp10(183; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {184; CHECK-NEXT: br label [[LOADBB:%.*]]185; CHECK: res_block:186; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1:%.*]] ]187; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]188; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]189; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1190; CHECK-NEXT: br label [[ENDBLOCK:%.*]]191; CHECK: loadbb:192; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1193; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1194; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])195; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])196; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]197; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]198; CHECK: loadbb1:199; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 8200; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 8201; CHECK-NEXT: [[TMP10:%.*]] = load i16, ptr [[TMP8]], align 1202; CHECK-NEXT: [[TMP11:%.*]] = load i16, ptr [[TMP9]], align 1203; CHECK-NEXT: [[TMP12:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP10]])204; CHECK-NEXT: [[TMP13:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP11]])205; CHECK-NEXT: [[TMP14]] = zext i16 [[TMP12]] to i64206; CHECK-NEXT: [[TMP15]] = zext i16 [[TMP13]] to i64207; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[TMP14]], [[TMP15]]208; CHECK-NEXT: br i1 [[TMP16]], label [[ENDBLOCK]], label [[RES_BLOCK]]209; CHECK: endblock:210; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]211; CHECK-NEXT: ret i32 [[PHI_RES]]212;213 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 10)214 ret i32 %call215}216 217define i32 @cmp11(ptr nocapture readonly %x, ptr nocapture readonly %y) {218; CHECK-LABEL: define i32 @cmp11(219; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {220; CHECK-NEXT: br label [[LOADBB:%.*]]221; CHECK: res_block:222; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]223; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]224; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]225; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1226; CHECK-NEXT: br label [[ENDBLOCK:%.*]]227; CHECK: loadbb:228; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1229; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1230; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])231; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])232; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]233; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]234; CHECK: loadbb1:235; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 3236; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 3237; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 1238; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1239; CHECK-NEXT: [[TMP12]] = call i64 @llvm.bswap.i64(i64 [[TMP10]])240; CHECK-NEXT: [[TMP13]] = call i64 @llvm.bswap.i64(i64 [[TMP11]])241; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP12]], [[TMP13]]242; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]243; CHECK: endblock:244; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]245; CHECK-NEXT: ret i32 [[PHI_RES]]246;247 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 11)248 ret i32 %call249}250 251define i32 @cmp12(ptr nocapture readonly %x, ptr nocapture readonly %y) {252; CHECK-LABEL: define i32 @cmp12(253; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {254; CHECK-NEXT: br label [[LOADBB:%.*]]255; CHECK: res_block:256; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1:%.*]] ]257; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]258; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]259; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1260; CHECK-NEXT: br label [[ENDBLOCK:%.*]]261; CHECK: loadbb:262; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1263; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1264; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])265; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])266; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]267; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]268; CHECK: loadbb1:269; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 8270; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 8271; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP8]], align 1272; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 1273; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP10]])274; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP11]])275; CHECK-NEXT: [[TMP14]] = zext i32 [[TMP12]] to i64276; CHECK-NEXT: [[TMP15]] = zext i32 [[TMP13]] to i64277; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[TMP14]], [[TMP15]]278; CHECK-NEXT: br i1 [[TMP16]], label [[ENDBLOCK]], label [[RES_BLOCK]]279; CHECK: endblock:280; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]281; CHECK-NEXT: ret i32 [[PHI_RES]]282;283 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 12)284 ret i32 %call285}286 287define i32 @cmp13(ptr nocapture readonly %x, ptr nocapture readonly %y) {288; CHECK-LABEL: define i32 @cmp13(289; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {290; CHECK-NEXT: br label [[LOADBB:%.*]]291; CHECK: res_block:292; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]293; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]294; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]295; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1296; CHECK-NEXT: br label [[ENDBLOCK:%.*]]297; CHECK: loadbb:298; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1299; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1300; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])301; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])302; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]303; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]304; CHECK: loadbb1:305; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 5306; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 5307; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 1308; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1309; CHECK-NEXT: [[TMP12]] = call i64 @llvm.bswap.i64(i64 [[TMP10]])310; CHECK-NEXT: [[TMP13]] = call i64 @llvm.bswap.i64(i64 [[TMP11]])311; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP12]], [[TMP13]]312; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]313; CHECK: endblock:314; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]315; CHECK-NEXT: ret i32 [[PHI_RES]]316;317 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 13)318 ret i32 %call319}320 321define i32 @cmp14(ptr nocapture readonly %x, ptr nocapture readonly %y) {322; CHECK-LABEL: define i32 @cmp14(323; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {324; CHECK-NEXT: br label [[LOADBB:%.*]]325; CHECK: res_block:326; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]327; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]328; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]329; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1330; CHECK-NEXT: br label [[ENDBLOCK:%.*]]331; CHECK: loadbb:332; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1333; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1334; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])335; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])336; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]337; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]338; CHECK: loadbb1:339; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 6340; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 6341; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 1342; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1343; CHECK-NEXT: [[TMP12]] = call i64 @llvm.bswap.i64(i64 [[TMP10]])344; CHECK-NEXT: [[TMP13]] = call i64 @llvm.bswap.i64(i64 [[TMP11]])345; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP12]], [[TMP13]]346; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]347; CHECK: endblock:348; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]349; CHECK-NEXT: ret i32 [[PHI_RES]]350;351 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 14)352 ret i32 %call353}354 355define i32 @cmp15(ptr nocapture readonly %x, ptr nocapture readonly %y) {356; CHECK-LABEL: define i32 @cmp15(357; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {358; CHECK-NEXT: br label [[LOADBB:%.*]]359; CHECK: res_block:360; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]361; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]362; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]363; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1364; CHECK-NEXT: br label [[ENDBLOCK:%.*]]365; CHECK: loadbb:366; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1367; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1368; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])369; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])370; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]371; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]372; CHECK: loadbb1:373; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 7374; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 7375; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 1376; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1377; CHECK-NEXT: [[TMP12]] = call i64 @llvm.bswap.i64(i64 [[TMP10]])378; CHECK-NEXT: [[TMP13]] = call i64 @llvm.bswap.i64(i64 [[TMP11]])379; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP12]], [[TMP13]]380; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]381; CHECK: endblock:382; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]383; CHECK-NEXT: ret i32 [[PHI_RES]]384;385 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 15)386 ret i32 %call387}388 389define i32 @cmp16(ptr nocapture readonly %x, ptr nocapture readonly %y) {390; CHECK-LABEL: define i32 @cmp16(391; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {392; CHECK-NEXT: br label [[LOADBB:%.*]]393; CHECK: res_block:394; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP5:%.*]], [[LOADBB]] ], [ [[TMP12:%.*]], [[LOADBB1:%.*]] ]395; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1]] ]396; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]397; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 -1, i32 1398; CHECK-NEXT: br label [[ENDBLOCK:%.*]]399; CHECK: loadbb:400; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[X]], align 1401; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[Y]], align 1402; CHECK-NEXT: [[TMP5]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])403; CHECK-NEXT: [[TMP6]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])404; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[TMP5]], [[TMP6]]405; CHECK-NEXT: br i1 [[TMP7]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]406; CHECK: loadbb1:407; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[X]], i64 8408; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Y]], i64 8409; CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 1410; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1411; CHECK-NEXT: [[TMP12]] = call i64 @llvm.bswap.i64(i64 [[TMP10]])412; CHECK-NEXT: [[TMP13]] = call i64 @llvm.bswap.i64(i64 [[TMP11]])413; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP12]], [[TMP13]]414; CHECK-NEXT: br i1 [[TMP14]], label [[ENDBLOCK]], label [[RES_BLOCK]]415; CHECK: endblock:416; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP2]], [[RES_BLOCK]] ]417; CHECK-NEXT: ret i32 [[PHI_RES]]418;419 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 16)420 ret i32 %call421}422 423define i32 @cmp_eq2(ptr nocapture readonly %x, ptr nocapture readonly %y) {424; CHECK-LABEL: define i32 @cmp_eq2(425; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {426; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[X]], align 1427; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[Y]], align 1428; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i16 [[TMP1]], [[TMP2]]429; CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32430; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP4]], 0431; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32432; CHECK-NEXT: ret i32 [[CONV]]433;434 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 2)435 %cmp = icmp eq i32 %call, 0436 %conv = zext i1 %cmp to i32437 ret i32 %conv438}439 440define i32 @cmp_eq3(ptr nocapture readonly %x, ptr nocapture readonly %y) {441; CHECK-LABEL: define i32 @cmp_eq3(442; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {443; CHECK-NEXT: br label [[LOADBB:%.*]]444; CHECK: res_block:445; CHECK-NEXT: br label [[ENDBLOCK:%.*]]446; CHECK: loadbb:447; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[X]], align 1448; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[Y]], align 1449; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i16 [[TMP1]], [[TMP2]]450; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]451; CHECK: loadbb1:452; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 2453; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 2454; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP4]], align 1455; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP5]], align 1456; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i8 [[TMP6]], [[TMP7]]457; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]458; CHECK: endblock:459; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]460; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0461; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32462; CHECK-NEXT: ret i32 [[CONV]]463;464 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 3)465 %cmp = icmp eq i32 %call, 0466 %conv = zext i1 %cmp to i32467 ret i32 %conv468}469 470define i32 @cmp_eq4(ptr nocapture readonly %x, ptr nocapture readonly %y) {471; CHECK-LABEL: define i32 @cmp_eq4(472; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {473; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 1474; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 1475; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]476; CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32477; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP4]], 0478; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32479; CHECK-NEXT: ret i32 [[CONV]]480;481 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 4)482 %cmp = icmp eq i32 %call, 0483 %conv = zext i1 %cmp to i32484 ret i32 %conv485}486 487define i32 @cmp_eq5(ptr nocapture readonly %x, ptr nocapture readonly %y) {488; CHECK-LABEL: define i32 @cmp_eq5(489; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {490; CHECK-NEXT: br label [[LOADBB:%.*]]491; CHECK: res_block:492; CHECK-NEXT: br label [[ENDBLOCK:%.*]]493; CHECK: loadbb:494; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 1495; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 1496; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]497; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]498; CHECK: loadbb1:499; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 4500; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 4501; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP4]], align 1502; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP5]], align 1503; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i8 [[TMP6]], [[TMP7]]504; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]505; CHECK: endblock:506; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]507; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0508; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32509; CHECK-NEXT: ret i32 [[CONV]]510;511 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 5)512 %cmp = icmp eq i32 %call, 0513 %conv = zext i1 %cmp to i32514 ret i32 %conv515}516 517define i32 @cmp_eq6(ptr nocapture readonly %x, ptr nocapture readonly %y) {518; CHECK-LABEL: define i32 @cmp_eq6(519; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {520; CHECK-NEXT: br label [[LOADBB:%.*]]521; CHECK: res_block:522; CHECK-NEXT: br label [[ENDBLOCK:%.*]]523; CHECK: loadbb:524; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 1525; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 1526; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]527; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]528; CHECK: loadbb1:529; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 4530; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 4531; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP4]], align 1532; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP5]], align 1533; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i16 [[TMP6]], [[TMP7]]534; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]535; CHECK: endblock:536; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]537; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0538; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32539; CHECK-NEXT: ret i32 [[CONV]]540;541 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)542 %cmp = icmp eq i32 %call, 0543 %conv = zext i1 %cmp to i32544 ret i32 %conv545}546 547define i32 @cmp_eq6_align4(ptr nocapture readonly align 4 %x, ptr nocapture readonly align 4 %y) {548; CHECK-LABEL: define i32 @cmp_eq6_align4(549; CHECK-SAME: ptr readonly align 4 captures(none) [[X:%.*]], ptr readonly align 4 captures(none) [[Y:%.*]]) {550; CHECK-NEXT: br label [[LOADBB:%.*]]551; CHECK: res_block:552; CHECK-NEXT: br label [[ENDBLOCK:%.*]]553; CHECK: loadbb:554; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4555; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 4556; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]557; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]558; CHECK: loadbb1:559; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 4560; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 4561; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP4]], align 4562; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP5]], align 4563; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i16 [[TMP6]], [[TMP7]]564; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]565; CHECK: endblock:566; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]567; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0568; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32569; CHECK-NEXT: ret i32 [[CONV]]570;571 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 6)572 %cmp = icmp eq i32 %call, 0573 %conv = zext i1 %cmp to i32574 ret i32 %conv575}576 577define i32 @cmp_eq7(ptr nocapture readonly %x, ptr nocapture readonly %y) {578; CHECK-LABEL: define i32 @cmp_eq7(579; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {580; CHECK-NEXT: br label [[LOADBB:%.*]]581; CHECK: res_block:582; CHECK-NEXT: br label [[ENDBLOCK:%.*]]583; CHECK: loadbb:584; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 1585; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[Y]], align 1586; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]587; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]588; CHECK: loadbb1:589; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 3590; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 3591; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 1592; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 1593; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP6]], [[TMP7]]594; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]595; CHECK: endblock:596; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]597; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0598; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32599; CHECK-NEXT: ret i32 [[CONV]]600;601 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 7)602 %cmp = icmp eq i32 %call, 0603 %conv = zext i1 %cmp to i32604 ret i32 %conv605}606 607define i32 @cmp_eq8(ptr nocapture readonly %x, ptr nocapture readonly %y) {608; CHECK-LABEL: define i32 @cmp_eq8(609; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {610; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1611; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1612; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]613; CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32614; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP4]], 0615; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32616; CHECK-NEXT: ret i32 [[CONV]]617;618 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 8)619 %cmp = icmp eq i32 %call, 0620 %conv = zext i1 %cmp to i32621 ret i32 %conv622}623 624define i32 @cmp_eq9(ptr nocapture readonly %x, ptr nocapture readonly %y) {625; CHECK-LABEL: define i32 @cmp_eq9(626; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {627; CHECK-NEXT: br label [[LOADBB:%.*]]628; CHECK: res_block:629; CHECK-NEXT: br label [[ENDBLOCK:%.*]]630; CHECK: loadbb:631; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1632; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1633; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]634; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]635; CHECK: loadbb1:636; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 8637; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 8638; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP4]], align 1639; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP5]], align 1640; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i8 [[TMP6]], [[TMP7]]641; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]642; CHECK: endblock:643; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]644; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0645; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32646; CHECK-NEXT: ret i32 [[CONV]]647;648 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 9)649 %cmp = icmp eq i32 %call, 0650 %conv = zext i1 %cmp to i32651 ret i32 %conv652}653 654define i32 @cmp_eq10(ptr nocapture readonly %x, ptr nocapture readonly %y) {655; CHECK-LABEL: define i32 @cmp_eq10(656; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {657; CHECK-NEXT: br label [[LOADBB:%.*]]658; CHECK: res_block:659; CHECK-NEXT: br label [[ENDBLOCK:%.*]]660; CHECK: loadbb:661; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1662; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1663; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]664; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]665; CHECK: loadbb1:666; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 8667; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 8668; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP4]], align 1669; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP5]], align 1670; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i16 [[TMP6]], [[TMP7]]671; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]672; CHECK: endblock:673; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]674; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0675; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32676; CHECK-NEXT: ret i32 [[CONV]]677;678 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 10)679 %cmp = icmp eq i32 %call, 0680 %conv = zext i1 %cmp to i32681 ret i32 %conv682}683 684define i32 @cmp_eq11(ptr nocapture readonly %x, ptr nocapture readonly %y) {685; CHECK-LABEL: define i32 @cmp_eq11(686; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {687; CHECK-NEXT: br label [[LOADBB:%.*]]688; CHECK: res_block:689; CHECK-NEXT: br label [[ENDBLOCK:%.*]]690; CHECK: loadbb:691; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1692; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1693; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]694; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]695; CHECK: loadbb1:696; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 3697; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 3698; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1699; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1700; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP6]], [[TMP7]]701; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]702; CHECK: endblock:703; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]704; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0705; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32706; CHECK-NEXT: ret i32 [[CONV]]707;708 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 11)709 %cmp = icmp eq i32 %call, 0710 %conv = zext i1 %cmp to i32711 ret i32 %conv712}713 714define i32 @cmp_eq12(ptr nocapture readonly %x, ptr nocapture readonly %y) {715; CHECK-LABEL: define i32 @cmp_eq12(716; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {717; CHECK-NEXT: br label [[LOADBB:%.*]]718; CHECK: res_block:719; CHECK-NEXT: br label [[ENDBLOCK:%.*]]720; CHECK: loadbb:721; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1722; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1723; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]724; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]725; CHECK: loadbb1:726; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 8727; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 8728; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 1729; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 1730; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP6]], [[TMP7]]731; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]732; CHECK: endblock:733; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]734; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0735; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32736; CHECK-NEXT: ret i32 [[CONV]]737;738 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 12)739 %cmp = icmp eq i32 %call, 0740 %conv = zext i1 %cmp to i32741 ret i32 %conv742}743 744define i32 @cmp_eq13(ptr nocapture readonly %x, ptr nocapture readonly %y) {745; CHECK-LABEL: define i32 @cmp_eq13(746; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {747; CHECK-NEXT: br label [[LOADBB:%.*]]748; CHECK: res_block:749; CHECK-NEXT: br label [[ENDBLOCK:%.*]]750; CHECK: loadbb:751; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1752; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1753; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]754; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]755; CHECK: loadbb1:756; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 5757; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 5758; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1759; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1760; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP6]], [[TMP7]]761; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]762; CHECK: endblock:763; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]764; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0765; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32766; CHECK-NEXT: ret i32 [[CONV]]767;768 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 13)769 %cmp = icmp eq i32 %call, 0770 %conv = zext i1 %cmp to i32771 ret i32 %conv772}773 774define i32 @cmp_eq14(ptr nocapture readonly %x, ptr nocapture readonly %y) {775; CHECK-LABEL: define i32 @cmp_eq14(776; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {777; CHECK-NEXT: br label [[LOADBB:%.*]]778; CHECK: res_block:779; CHECK-NEXT: br label [[ENDBLOCK:%.*]]780; CHECK: loadbb:781; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1782; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1783; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]784; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]785; CHECK: loadbb1:786; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 6787; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 6788; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1789; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1790; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP6]], [[TMP7]]791; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]792; CHECK: endblock:793; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]794; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0795; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32796; CHECK-NEXT: ret i32 [[CONV]]797;798 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 14)799 %cmp = icmp eq i32 %call, 0800 %conv = zext i1 %cmp to i32801 ret i32 %conv802}803 804define i32 @cmp_eq15(ptr nocapture readonly %x, ptr nocapture readonly %y) {805; CHECK-LABEL: define i32 @cmp_eq15(806; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {807; CHECK-NEXT: br label [[LOADBB:%.*]]808; CHECK: res_block:809; CHECK-NEXT: br label [[ENDBLOCK:%.*]]810; CHECK: loadbb:811; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1812; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1813; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]814; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]815; CHECK: loadbb1:816; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 7817; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 7818; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1819; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1820; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP6]], [[TMP7]]821; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]822; CHECK: endblock:823; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]824; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0825; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32826; CHECK-NEXT: ret i32 [[CONV]]827;828 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 15)829 %cmp = icmp eq i32 %call, 0830 %conv = zext i1 %cmp to i32831 ret i32 %conv832}833 834define i32 @cmp_eq16(ptr nocapture readonly %x, ptr nocapture readonly %y) {835; CHECK-LABEL: define i32 @cmp_eq16(836; CHECK-SAME: ptr readonly captures(none) [[X:%.*]], ptr readonly captures(none) [[Y:%.*]]) {837; CHECK-NEXT: br label [[LOADBB:%.*]]838; CHECK: res_block:839; CHECK-NEXT: br label [[ENDBLOCK:%.*]]840; CHECK: loadbb:841; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[X]], align 1842; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[Y]], align 1843; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]844; CHECK-NEXT: br i1 [[TMP3]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]845; CHECK: loadbb1:846; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[X]], i64 8847; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Y]], i64 8848; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1849; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1850; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i64 [[TMP6]], [[TMP7]]851; CHECK-NEXT: br i1 [[TMP8]], label [[RES_BLOCK]], label [[ENDBLOCK]]852; CHECK: endblock:853; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]854; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0855; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32856; CHECK-NEXT: ret i32 [[CONV]]857;858 %call = tail call i32 @memcmp(ptr %x, ptr %y, i64 16)859 %cmp = icmp eq i32 %call, 0860 %conv = zext i1 %cmp to i32861 ret i32 %conv862}863