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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=gvn -enable-load-pre -S | FileCheck %s3; RUN: opt < %s -aa-pipeline=basic-aa -passes=gvn -enable-load-pre -S | FileCheck %s4; RUN: opt < %s -aa-pipeline=basic-aa -passes="gvn<load-pre>" -enable-load-pre=false -S | FileCheck %s5 6target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"7 8define double @foo(i32 %stat, i32 %i, ptr %p) {9; CHECK-LABEL: @foo(10; CHECK-NEXT: entry:11; CHECK-NEXT: switch i32 [[STAT:%.*]], label [[SW_DEFAULT:%.*]] [12; CHECK-NEXT: i32 0, label [[SW_BB:%.*]]13; CHECK-NEXT: i32 1, label [[SW_BB]]14; CHECK-NEXT: i32 2, label [[ENTRY_SW_BB2_CRIT_EDGE:%.*]]15; CHECK-NEXT: ]16; CHECK: entry.sw.bb2_crit_edge:17; CHECK-NEXT: [[DOTPRE:%.*]] = load ptr, ptr [[P:%.*]], align 818; CHECK-NEXT: [[DOTPRE1:%.*]] = sext i32 [[I:%.*]] to i6419; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds double, ptr [[DOTPRE]], i64 [[DOTPRE1]]20; CHECK-NEXT: [[DOTPRE2:%.*]] = load double, ptr [[ARRAYIDX5_PHI_TRANS_INSERT]], align 821; CHECK-NEXT: br label [[SW_BB2:%.*]]22; CHECK: sw.bb:23; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i6424; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P]], align 825; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, ptr [[TMP0]], i64 [[IDXPROM]]26; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX1]], align 827; CHECK-NEXT: [[SUB:%.*]] = fsub double [[TMP1]], 1.000000e+0028; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[SUB]], 0.000000e+0029; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]30; CHECK: if.then:31; CHECK-NEXT: br label [[RETURN:%.*]]32; CHECK: if.end:33; CHECK-NEXT: br label [[SW_BB2]]34; CHECK: sw.bb2:35; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE2]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP1]], [[IF_END]] ]36; CHECK-NEXT: [[IDXPROM3_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[IDXPROM]], [[IF_END]] ]37; CHECK-NEXT: [[TMP3:%.*]] = phi ptr [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ]38; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 [[IDXPROM3_PRE_PHI]]39; CHECK-NEXT: [[SUB6:%.*]] = fsub double 3.000000e+00, [[TMP2]]40; CHECK-NEXT: store double [[SUB6]], ptr [[ARRAYIDX5]], align 841; CHECK-NEXT: br label [[RETURN]]42; CHECK: sw.default:43; CHECK-NEXT: br label [[RETURN]]44; CHECK: return:45; CHECK-NEXT: [[RETVAL_0:%.*]] = phi double [ 0.000000e+00, [[SW_DEFAULT]] ], [ [[SUB6]], [[SW_BB2]] ], [ [[SUB]], [[IF_THEN]] ]46; CHECK-NEXT: ret double [[RETVAL_0]]47;48entry:49 switch i32 %stat, label %sw.default [50 i32 0, label %sw.bb51 i32 1, label %sw.bb52 i32 2, label %sw.bb253 ]54 55sw.bb: ; preds = %entry, %entry56 %idxprom = sext i32 %i to i6457 %0 = load ptr, ptr %p, align 858 %arrayidx1 = getelementptr inbounds double, ptr %0, i64 %idxprom59 %1 = load double, ptr %arrayidx1, align 860 %sub = fsub double %1, 1.000000e+0061 %cmp = fcmp olt double %sub, 0.000000e+0062 br i1 %cmp, label %if.then, label %if.end63 64if.then: ; preds = %sw.bb65 br label %return66 67if.end: ; preds = %sw.bb68 br label %sw.bb269 70sw.bb2: ; preds = %if.end, %entry71 %idxprom3 = sext i32 %i to i6472 %2 = load ptr, ptr %p, align 873 %arrayidx5 = getelementptr inbounds double, ptr %2, i64 %idxprom374 %3 = load double, ptr %arrayidx5, align 875 %sub6 = fsub double 3.000000e+00, %376 store double %sub6, ptr %arrayidx577 br label %return78 79sw.default: ; preds = %entry80 br label %return81 82return: ; preds = %sw.default, %sw.bb2, %if.then83 %retval.0 = phi double [ 0.000000e+00, %sw.default ], [ %sub6, %sw.bb2 ], [ %sub, %if.then ]84 ret double %retval.085}86 87; The load causes the GEP's operands to be PREd earlier than normal. The88; resulting sext ends up in pre.dest and in the GVN system before that BB is89; actually processed. Make sure we can deal with the situation.90 91define void @test_shortcut_safe(i1 %tst, i32 %p1, ptr %a) {92; CHECK-LABEL: @test_shortcut_safe(93; CHECK-NEXT: br i1 [[TST:%.*]], label [[SEXT1:%.*]], label [[PRE_DEST:%.*]]94; CHECK: pre.dest:95; CHECK-NEXT: br label [[SEXT_USE:%.*]]96; CHECK: sext1:97; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[P1:%.*]] to i6498; CHECK-NEXT: br label [[SEXT_USE]]99; CHECK: sext.use:100; CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[P1]] to i64101; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM2]]102; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4103; CHECK-NEXT: tail call void @g(i32 [[VAL]])104; CHECK-NEXT: br label [[PRE_DEST]]105;106 107 br i1 %tst, label %sext1, label %pre.dest108 109pre.dest:110 br label %sext.use111 112sext1:113 %idxprom = sext i32 %p1 to i64114 br label %sext.use115 116sext.use:117 %idxprom2 = sext i32 %p1 to i64118 %arrayidx3 = getelementptr inbounds i32, ptr %a, i64 %idxprom2119 %val = load i32, ptr %arrayidx3, align 4120 tail call void (i32) @g(i32 %val)121 br label %pre.dest122}123 124declare void @g(i32)125