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1; RUN: opt < %s -passes='early-cse<memssa>,gvn-hoist' -earlycse-debug-hash -S | FileCheck %s2 3; Make sure opt won't crash and that this pair of4; instructions (load, icmp) are not hoisted.5; Although it is safe to hoist the loads from bb45 to6; bb41, gvn-hoist does not have appropriate mechanism7; to handle corner cases (see PR46874) when these instructions8; were hoisted.9; FIXME: Hoist loads from bb58 and bb45 to bb41.10 11@g_10 = external global i32, align 412@g_536 = external global ptr, align 813@g_1629 = external global ptr, align 814@g_963 = external global ptr, align 815@g_1276 = external global ptr, align 816 17;CHECK-LABEL: @func_2218 19define void @func_22(ptr %arg, ptr %arg1) {20bb:21 br label %bb1222 23bb12:24 %tmp3.0 = phi i32 [ undef, %bb ], [ %tmp40, %bb36 ]25 %tmp7.0 = phi i32 [ undef, %bb ], [ %spec.select, %bb36 ]26 %tmp14 = icmp eq i32 %tmp3.0, 627 br i1 %tmp14, label %bb41, label %bb1528 29bb15:30 %tmp183 = trunc i16 0 to i831 %tmp20 = load ptr, ptr @g_536, align 832 %tmp21 = load i8, ptr %tmp20, align 133 %tmp23 = or i8 %tmp21, %tmp18334 store i8 %tmp23, ptr %tmp20, align 135 %tmp5.i = icmp eq i8 %tmp23, 036 br i1 %tmp5.i, label %safe_div_func_uint8_t_u_u.exit, label %bb8.i37 38bb8.i:39 %0 = udiv i8 1, %tmp2340 br label %safe_div_func_uint8_t_u_u.exit41 42safe_div_func_uint8_t_u_u.exit:43 %tmp13.in.i = phi i8 [ %0, %bb8.i ], [ 1, %bb15 ]44 %tmp31 = icmp eq i8 %tmp13.in.i, 045 %spec.select = select i1 %tmp31, i32 %tmp7.0, i32 5346 %tmp35 = icmp eq i32 %spec.select, 047 br i1 %tmp35, label %bb36, label %bb4148 49bb36:50 %tmp38 = sext i32 %tmp3.0 to i6451 %tmp40 = trunc i64 %tmp38 to i3252 br label %bb1253 54;CHECK: bb41:55 56bb41:57 %tmp43 = load i32, ptr %arg, align 458 %tmp44 = icmp eq i32 %tmp43, 059 br i1 %tmp44, label %bb52, label %bb4560 61;CHECK: bb45:62;CHECK: %tmp47 = load i32, ptr %arg1, align 463;CHECK: %tmp48 = icmp eq i32 %tmp47, 064 65bb45:66 %tmp47 = load i32, ptr %arg1, align 467 %tmp48 = icmp eq i32 %tmp47, 068 br i1 %tmp48, label %bb50, label %bb6469 70bb50:71 %tmp51 = load volatile ptr, ptr @g_963, align 872 unreachable73 74bb52:75 %tmp8.0 = phi i32 [ undef, %bb41 ], [ %tmp57, %bb55 ]76 %tmp54 = icmp slt i32 %tmp8.0, 377 br i1 %tmp54, label %bb55, label %bb5878 79bb55:80 %tmp57 = add nsw i32 %tmp8.0, 181 br label %bb5282 83;CHECK: bb58:84;CHECK: %tmp60 = load i32, ptr %arg1, align 485;CHECK: %tmp61 = icmp eq i32 %tmp60, 086;CHECK: bb62:87;CHECK: load88;CHECK: bb64:89;CHECK: load90 91bb58:92 %tmp60 = load i32, ptr %arg1, align 493 %tmp61 = icmp eq i32 %tmp60, 094 br i1 %tmp61, label %bb62, label %bb6495 96bb62:97 %tmp63 = load volatile ptr, ptr @g_1276, align 898 unreachable99 100bb64:101 %tmp65 = load volatile ptr, ptr @g_1629, align 8102 unreachable103 104; uselistorder directives105 uselistorder i32 %spec.select, { 1, 0 }106 uselistorder ptr %arg1, { 1, 0 }107 uselistorder label %bb64, { 1, 0 }108 uselistorder label %bb52, { 1, 0 }109 uselistorder label %bb41, { 1, 0 }110 uselistorder label %safe_div_func_uint8_t_u_u.exit, { 1, 0 }111}112 113define zeroext i8 @safe_div_func_uint8_t_u_u(i8 zeroext %arg, i8 zeroext %arg1) {114bb:115 %tmp5 = icmp eq i8 %arg1, 0116 br i1 %tmp5, label %bb12, label %bb8117 118bb8:119 %0 = udiv i8 %arg, %arg1120 br label %bb12121 122bb12:123 %tmp13.in = phi i8 [ %0, %bb8 ], [ %arg, %bb ]124 ret i8 %tmp13.in125}126