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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call i32 @(test_single_bb_resolver|test_multi_bb_resolver|test_caller_feats_not_implied|test_non_fmv_caller|test_priority|test_alternative_names|test_unrelated_callers)" --version 42 3; REQUIRES: aarch64-registered-target4 5; RUN: opt --passes=globalopt -o - -S < %s | FileCheck %s6 7target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"8target triple = "aarch64-unknown-linux-gnu"9 10$test_single_bb_resolver.resolver = comdat any11$test_multi_bb_resolver.resolver = comdat any12$test_caller_feats_not_implied.resolver = comdat any13$test_non_fmv_caller.resolver = comdat any14$test_priority.resolver = comdat any15$test_alternative_names.resolver = comdat any16$test_unrelated_callers.resolver = comdat any17$caller1.resolver = comdat any18$caller2.resolver = comdat any19$caller3.resolver = comdat any20$caller6.resolver = comdat any21$caller7.resolver = comdat any22$caller8.resolver = comdat any23$caller9.resolver = comdat any24 25@__aarch64_cpu_features = external local_unnamed_addr global { i64 }26 27@test_single_bb_resolver = weak_odr ifunc i32 (), ptr @test_single_bb_resolver.resolver28@test_multi_bb_resolver = weak_odr ifunc i32 (), ptr @test_multi_bb_resolver.resolver29@test_caller_feats_not_implied = weak_odr ifunc i32 (), ptr @test_caller_feats_not_implied.resolver30@test_non_fmv_caller = weak_odr ifunc i32 (), ptr @test_non_fmv_caller.resolver31@test_priority = weak_odr ifunc i32 (), ptr @test_priority.resolver32@test_alternative_names = weak_odr ifunc i32 (), ptr @test_alternative_names.resolver33@test_unrelated_callers = weak_odr ifunc i32 (), ptr @test_unrelated_callers.resolver34@caller1 = weak_odr ifunc i32 (), ptr @caller1.resolver35@caller2 = weak_odr ifunc i32 (), ptr @caller2.resolver36@caller3 = weak_odr ifunc i32 (), ptr @caller3.resolver37@caller6 = weak_odr ifunc i32 (), ptr @caller6.resolver38@caller7 = weak_odr ifunc i32 (), ptr @caller7.resolver39@caller8 = weak_odr ifunc i32 (), ptr @caller8.resolver40@caller9 = weak_odr ifunc i32 (), ptr @caller9.resolver41 42declare void @__init_cpu_features_resolver() local_unnamed_addr43 44declare i32 @test_single_bb_resolver.default() #045declare i32 @test_single_bb_resolver._Msve() #146declare i32 @test_single_bb_resolver._Msve2() #247 48define weak_odr ptr @test_single_bb_resolver.resolver() comdat {49; CHECK-LABEL: define weak_odr ptr @test_single_bb_resolver.resolver() comdat {50resolver_entry:51 tail call void @__init_cpu_features_resolver()52 %0 = load i64, ptr @__aarch64_cpu_features, align 853 %1 = and i64 %0, 6979328435254 %2 = icmp eq i64 %1, 6979328435255 %3 = and i64 %0, 107380761656 %4 = icmp eq i64 %3, 107380761657 %test_single_bb_resolver._Msve.test_single_bb_resolver.default = select i1 %4, ptr @test_single_bb_resolver._Msve, ptr @test_single_bb_resolver.default58 %common.ret.op = select i1 %2, ptr @test_single_bb_resolver._Msve2, ptr %test_single_bb_resolver._Msve.test_single_bb_resolver.default59 ret ptr %common.ret.op60}61 62define i32 @caller1._Msve() #1 {63; CHECK-LABEL: define i32 @caller1._Msve(64; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {65; CHECK: [[CALL:%.*]] = tail call i32 @test_single_bb_resolver._Msve()66;67entry:68 %call = tail call i32 @test_single_bb_resolver()69 ret i32 %call70}71 72define i32 @caller1._Msve2() #2 {73; CHECK-LABEL: define i32 @caller1._Msve2(74; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {75; CHECK: [[CALL:%.*]] = tail call i32 @test_single_bb_resolver._Msve2()76;77entry:78 %call = tail call i32 @test_single_bb_resolver()79 ret i32 %call80}81 82define i32 @caller1.default() #0 {83; CHECK-LABEL: define i32 @caller1.default(84; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {85; CHECK: [[CALL:%.*]] = tail call i32 @test_single_bb_resolver.default()86;87entry:88 %call = tail call i32 @test_single_bb_resolver()89 ret i32 %call90}91 92define weak_odr ptr @caller1.resolver() comdat {93; CHECK-LABEL: define weak_odr ptr @caller1.resolver() comdat {94resolver_entry:95 tail call void @__init_cpu_features_resolver()96 %0 = load i64, ptr @__aarch64_cpu_features, align 897 %1 = and i64 %0, 6979328435298 %2 = icmp eq i64 %1, 6979328435299 %3 = and i64 %0, 1073807616100 %4 = icmp eq i64 %3, 1073807616101 %caller1._Msve.caller1.default = select i1 %4, ptr @caller1._Msve, ptr @caller1.default102 %common.ret.op = select i1 %2, ptr @caller1._Msve2, ptr %caller1._Msve.caller1.default103 ret ptr %common.ret.op104}105 106declare i32 @test_multi_bb_resolver._Mmops() #3107declare i32 @test_multi_bb_resolver._Msve2() #2108declare i32 @test_multi_bb_resolver._Msve() #1109declare i32 @test_multi_bb_resolver.default() #0110 111define weak_odr ptr @test_multi_bb_resolver.resolver() comdat {112; CHECK-LABEL: define weak_odr ptr @test_multi_bb_resolver.resolver() comdat {113resolver_entry:114 tail call void @__init_cpu_features_resolver()115 %0 = load i64, ptr @__aarch64_cpu_features, align 8116 %1 = and i64 %0, 576460752303423488117 %.not = icmp eq i64 %1, 0118 br i1 %.not, label %resolver_else, label %common.ret119 120common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry121 %common.ret.op = phi ptr [ @test_multi_bb_resolver._Mmops, %resolver_entry ], [ @test_multi_bb_resolver._Msve2, %resolver_else ], [ %test_multi_bb_resolver._Msve.test_multi_bb_resolver.default, %resolver_else2 ]122 ret ptr %common.ret.op123 124resolver_else: ; preds = %resolver_entry125 %2 = and i64 %0, 69793284352126 %3 = icmp eq i64 %2, 69793284352127 br i1 %3, label %common.ret, label %resolver_else2128 129resolver_else2: ; preds = %resolver_else130 %4 = and i64 %0, 1073807616131 %5 = icmp eq i64 %4, 1073807616132 %test_multi_bb_resolver._Msve.test_multi_bb_resolver.default = select i1 %5, ptr @test_multi_bb_resolver._Msve, ptr @test_multi_bb_resolver.default133 br label %common.ret134}135 136define i32 @caller2._MmopsMsve2() #4 {137; CHECK-LABEL: define i32 @caller2._MmopsMsve2(138; CHECK-SAME: ) #[[ATTR4:[0-9]+]] {139; CHECK: [[CALL:%.*]] = tail call i32 @test_multi_bb_resolver._Mmops()140;141entry:142 %call = tail call i32 @test_multi_bb_resolver()143 ret i32 %call144}145 146define i32 @caller2._Mmops() #3 {147; CHECK-LABEL: define i32 @caller2._Mmops(148; CHECK-SAME: ) #[[ATTR3:[0-9]+]] {149; CHECK: [[CALL:%.*]] = tail call i32 @test_multi_bb_resolver._Mmops()150;151entry:152 %call = tail call i32 @test_multi_bb_resolver()153 ret i32 %call154}155 156define i32 @caller2._Msve() #1 {157; CHECK-LABEL: define i32 @caller2._Msve(158; CHECK-SAME: ) #[[ATTR1]] {159; CHECK: [[CALL:%.*]] = tail call i32 @test_multi_bb_resolver()160;161entry:162 %call = tail call i32 @test_multi_bb_resolver()163 ret i32 %call164}165 166define i32 @caller2.default() #0 {167; CHECK-LABEL: define i32 @caller2.default(168; CHECK-SAME: ) #[[ATTR0]] {169; CHECK: [[CALL:%.*]] = tail call i32 @test_multi_bb_resolver.default()170;171entry:172 %call = tail call i32 @test_multi_bb_resolver()173 ret i32 %call174}175 176define weak_odr ptr @caller2.resolver() comdat {177; CHECK-LABEL: define weak_odr ptr @caller2.resolver() comdat {178resolver_entry:179 tail call void @__init_cpu_features_resolver()180 %0 = load i64, ptr @__aarch64_cpu_features, align 8181 %1 = and i64 %0, 576460822096707840182 %2 = icmp eq i64 %1, 576460822096707840183 br i1 %2, label %common.ret, label %resolver_else184 185common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry186 %common.ret.op = phi ptr [ @caller2._MmopsMsve2, %resolver_entry ], [ @caller2._Mmops, %resolver_else ], [ %caller2._Msve.caller2.default, %resolver_else2 ]187 ret ptr %common.ret.op188 189resolver_else: ; preds = %resolver_entry190 %3 = and i64 %0, 576460752303423488191 %.not = icmp eq i64 %3, 0192 br i1 %.not, label %resolver_else2, label %common.ret193 194resolver_else2: ; preds = %resolver_else195 %4 = and i64 %0, 1073807616196 %5 = icmp eq i64 %4, 1073807616197 %caller2._Msve.caller2.default = select i1 %5, ptr @caller2._Msve, ptr @caller2.default198 br label %common.ret199}200 201declare i32 @test_caller_feats_not_implied._Mmops() #3202declare i32 @test_caller_feats_not_implied._Msme() #5203declare i32 @test_caller_feats_not_implied._Msve() #1204declare i32 @test_caller_feats_not_implied.default() #0205 206define weak_odr ptr @test_caller_feats_not_implied.resolver() comdat {207; CHECK-LABEL: define weak_odr ptr @test_caller_feats_not_implied.resolver() comdat {208resolver_entry:209 tail call void @__init_cpu_features_resolver()210 %0 = load i64, ptr @__aarch64_cpu_features, align 8211 %1 = and i64 %0, 576460752303423488212 %.not = icmp eq i64 %1, 0213 br i1 %.not, label %resolver_else, label %common.ret214 215common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry216 %common.ret.op = phi ptr [ @test_caller_feats_not_implied._Mmops, %resolver_entry ], [ @test_caller_feats_not_implied._Msme, %resolver_else ], [ %test_caller_feats_not_implied._Msve.test_caller_feats_not_implied.default, %resolver_else2 ]217 ret ptr %common.ret.op218 219resolver_else: ; preds = %resolver_entry220 %2 = and i64 %0, 4398180795136221 %3 = icmp eq i64 %2, 4398180795136222 br i1 %3, label %common.ret, label %resolver_else2223 224resolver_else2: ; preds = %resolver_else225 %4 = and i64 %0, 1073807616226 %5 = icmp eq i64 %4, 1073807616227 %test_caller_feats_not_implied._Msve.test_caller_feats_not_implied.default = select i1 %5, ptr @test_caller_feats_not_implied._Msve, ptr @test_caller_feats_not_implied.default228 br label %common.ret229}230 231define i32 @caller3._Mmops() #3 {232; CHECK-LABEL: define i32 @caller3._Mmops(233; CHECK-SAME: ) #[[ATTR3]] {234; CHECK: [[CALL:%.*]] = tail call i32 @test_caller_feats_not_implied._Mmops()235;236entry:237 %call = tail call i32 @test_caller_feats_not_implied()238 ret i32 %call239}240 241define i32 @caller3._Msve() #1 {242; CHECK-LABEL: define i32 @caller3._Msve(243; CHECK-SAME: ) #[[ATTR1]] {244; CHECK: [[CALL:%.*]] = tail call i32 @test_caller_feats_not_implied()245;246entry:247 %call = tail call i32 @test_caller_feats_not_implied()248 ret i32 %call249}250 251define i32 @caller3.default() #0 {252; CHECK-LABEL: define i32 @caller3.default(253; CHECK-SAME: ) #[[ATTR0]] {254; CHECK: [[CALL:%.*]] = tail call i32 @test_caller_feats_not_implied()255;256entry:257 %call = tail call i32 @test_caller_feats_not_implied()258 ret i32 %call259}260 261define weak_odr ptr @caller3.resolver() comdat {262; CHECK-LABEL: define weak_odr ptr @caller3.resolver() comdat {263resolver_entry:264 tail call void @__init_cpu_features_resolver()265 %0 = load i64, ptr @__aarch64_cpu_features, align 8266 %1 = and i64 %0, 576460752303423488267 %.not = icmp eq i64 %1, 0268 %2 = and i64 %0, 1073807616269 %3 = icmp eq i64 %2, 1073807616270 %caller3._Msve.caller3.default = select i1 %3, ptr @caller3._Msve, ptr @caller3.default271 %common.ret.op = select i1 %.not, ptr %caller3._Msve.caller3.default, ptr @caller3._Mmops272 ret ptr %common.ret.op273}274 275declare i32 @test_non_fmv_caller._Maes() #6276declare i32 @test_non_fmv_caller._Msm4() #7277declare i32 @test_non_fmv_caller.default() #0278 279define weak_odr ptr @test_non_fmv_caller.resolver() comdat {280; CHECK-LABEL: define weak_odr ptr @test_non_fmv_caller.resolver() comdat {281resolver_entry:282 tail call void @__init_cpu_features_resolver()283 %0 = load i64, ptr @__aarch64_cpu_features, align 8284 %1 = and i64 %0, 33536285 %2 = icmp eq i64 %1, 33536286 %3 = and i64 %0, 800287 %4 = icmp eq i64 %3, 800288 %test_non_fmv_caller._Msm4.test_non_fmv_caller.default = select i1 %4, ptr @test_non_fmv_caller._Msm4, ptr @test_non_fmv_caller.default289 %common.ret.op = select i1 %2, ptr @test_non_fmv_caller._Maes, ptr %test_non_fmv_caller._Msm4.test_non_fmv_caller.default290 ret ptr %common.ret.op291}292 293define i32 @caller4() #8 {294; CHECK-LABEL: define i32 @caller4(295; CHECK-SAME: ) local_unnamed_addr #[[ATTR8:[0-9]+]] {296; CHECK: [[CALL:%.*]] = tail call i32 @test_non_fmv_caller._Maes()297;298entry:299 %call = tail call i32 @test_non_fmv_caller()300 ret i32 %call301}302 303define i32 @caller5() #9 {304; CHECK-LABEL: define i32 @caller5(305; CHECK-SAME: ) local_unnamed_addr #[[ATTR9:[0-9]+]] {306; CHECK: [[CALL:%.*]] = tail call i32 @test_non_fmv_caller()307;308entry:309 %call = tail call i32 @test_non_fmv_caller()310 ret i32 %call311}312 313declare i32 @test_priority._Msve2-sha3() #10314declare i32 @test_priority._McsscMssbs() #11315declare i32 @test_priority._MflagmMlseMrng() #12316declare i32 @test_priority.default() #0317 318define weak_odr ptr @test_priority.resolver() comdat {319; CHECK-LABEL: define weak_odr ptr @test_priority.resolver() comdat {320resolver_entry:321 tail call void @__init_cpu_features_resolver()322 %0 = load i64, ptr @__aarch64_cpu_features, align 8323 %1 = and i64 %0, 562949953423360324 %2 = icmp eq i64 %1, 562949953423360325 br i1 %2, label %common.ret, label %resolver_else326 327common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry328 %common.ret.op = phi ptr [ @test_priority._McsscMssbs, %resolver_entry ], [ @test_priority._Msve2-sha3, %resolver_else ], [ %test_priority._MflagmMlseMrng.test_priority.default, %resolver_else2 ]329 ret ptr %common.ret.op330 331resolver_else: ; preds = %resolver_entry332 %3 = and i64 %0, 1169304924928333 %4 = icmp eq i64 %3, 1169304924928334 br i1 %4, label %common.ret, label %resolver_else2335 336resolver_else2: ; preds = %resolver_else337 %5 = and i64 %0, 131338 %6 = icmp eq i64 %5, 131339 %test_priority._MflagmMlseMrng.test_priority.default = select i1 %6, ptr @test_priority._MflagmMlseMrng, ptr @test_priority.default340 br label %common.ret341}342 343define i32 @caller6._McsscMflagmMlseMrngMssbsMsve2-sha3() #13 {344; CHECK-LABEL: define i32 @caller6._McsscMflagmMlseMrngMssbsMsve2-sha3(345; CHECK-SAME: ) #[[ATTR13:[0-9]+]] {346; CHECK: [[CALL:%.*]] = tail call i32 @test_priority._McsscMssbs()347;348entry:349 %call = tail call i32 @test_priority()350 ret i32 %call351}352 353define i32 @caller6.default() #0 {354; CHECK-LABEL: define i32 @caller6.default(355; CHECK-SAME: ) #[[ATTR0]] {356; CHECK: [[CALL:%.*]] = tail call i32 @test_priority()357;358entry:359 %call = tail call i32 @test_priority()360 ret i32 %call361}362 363define weak_odr ptr @caller6.resolver() comdat {364; CHECK-LABEL: define weak_odr ptr @caller6.resolver() comdat {365resolver_entry:366 tail call void @__init_cpu_features_resolver()367 %0 = load i64, ptr @__aarch64_cpu_features, align 8368 %1 = and i64 %0, 564119258348419369 %2 = icmp eq i64 %1, 564119258348419370 %caller6._McsscMflagmMlseMrngMssbsMsve2-sha3.caller6.default = select i1 %2, ptr @caller6._McsscMflagmMlseMrngMssbsMsve2-sha3, ptr @caller6.default371 ret ptr %caller6._McsscMflagmMlseMrngMssbsMsve2-sha3.caller6.default372}373 374declare i32 @test_alternative_names._Mdpb2Mfrintts() #14375declare i32 @test_alternative_names._Mflagm2Mfrintts() #15376declare i32 @test_alternative_names._Mrcpc2() #16377declare i32 @test_alternative_names.default() #0378 379define weak_odr ptr @test_alternative_names.resolver() comdat {380; CHECK-LABEL: define weak_odr ptr @test_alternative_names.resolver() comdat {381resolver_entry:382 tail call void @__init_cpu_features_resolver()383 %0 = load i64, ptr @__aarch64_cpu_features, align 8384 %1 = and i64 %0, 17563904385 %2 = icmp eq i64 %1, 17563904386 br i1 %2, label %common.ret, label %resolver_else387 388common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry389 %common.ret.op = phi ptr [ @test_alternative_names._Mdpb2Mfrintts, %resolver_entry ], [ @test_alternative_names._Mflagm2Mfrintts, %resolver_else ], [ %test_alternative_names._Mrcpc2.test_alternative_names.default, %resolver_else2 ]390 ret ptr %common.ret.op391 392resolver_else: ; preds = %resolver_entry393 %3 = and i64 %0, 16777478394 %4 = icmp eq i64 %3, 16777478395 br i1 %4, label %common.ret, label %resolver_else2396 397resolver_else2: ; preds = %resolver_else398 %5 = and i64 %0, 12582912399 %6 = icmp eq i64 %5, 12582912400 %test_alternative_names._Mrcpc2.test_alternative_names.default = select i1 %6, ptr @test_alternative_names._Mrcpc2, ptr @test_alternative_names.default401 br label %common.ret402}403 404define i32 @caller7._Mdpb2Mfrintts() #14 {405; CHECK-LABEL: define i32 @caller7._Mdpb2Mfrintts(406; CHECK-SAME: ) #[[ATTR14:[0-9]+]] {407; CHECK: [[CALL:%.*]] = tail call i32 @test_alternative_names._Mdpb2Mfrintts()408;409entry:410 %call = tail call i32 @test_alternative_names()411 ret i32 %call412}413 414define i32 @caller7._Mfrintts() #17 {415; CHECK-LABEL: define i32 @caller7._Mfrintts(416; CHECK-SAME: ) #[[ATTR17:[0-9]+]] {417; CHECK: [[CALL:%.*]] = tail call i32 @test_alternative_names()418;419entry:420 %call = tail call i32 @test_alternative_names()421 ret i32 %call422}423 424define i32 @caller7._Mrcpc2() #16 {425; CHECK-LABEL: define i32 @caller7._Mrcpc2(426; CHECK-SAME: ) #[[ATTR16:[0-9]+]] {427; CHECK: [[CALL:%.*]] = tail call i32 @test_alternative_names._Mrcpc2()428;429entry:430 %call = tail call i32 @test_alternative_names()431 ret i32 %call432}433 434define i32 @caller7.default() #0 {435; CHECK-LABEL: define i32 @caller7.default(436; CHECK-SAME: ) #[[ATTR0]] {437; CHECK: [[CALL:%.*]] = tail call i32 @test_alternative_names.default()438;439entry:440 %call = tail call i32 @test_alternative_names()441 ret i32 %call442}443 444define weak_odr ptr @caller7.resolver() comdat {445; CHECK-LABEL: define weak_odr ptr @caller7.resolver() comdat {446resolver_entry:447 tail call void @__init_cpu_features_resolver()448 %0 = load i64, ptr @__aarch64_cpu_features, align 8449 %1 = and i64 %0, 17563904450 %2 = icmp eq i64 %1, 17563904451 br i1 %2, label %common.ret, label %resolver_else452 453common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry454 %common.ret.op = phi ptr [ @caller7._Mdpb2Mfrintts, %resolver_entry ], [ @caller7._Mfrintts, %resolver_else ], [ %caller7._Mrcpc2.caller7.default, %resolver_else2 ]455 ret ptr %common.ret.op456 457resolver_else: ; preds = %resolver_entry458 %3 = and i64 %0, 16777472459 %4 = icmp eq i64 %3, 16777472460 br i1 %4, label %common.ret, label %resolver_else2461 462resolver_else2: ; preds = %resolver_else463 %5 = and i64 %0, 12582912464 %6 = icmp eq i64 %5, 12582912465 %caller7._Mrcpc2.caller7.default = select i1 %6, ptr @caller7._Mrcpc2, ptr @caller7.default466 br label %common.ret467}468 469declare i32 @test_unrelated_callers._Mmops() #3470declare i32 @test_unrelated_callers._Msve2() #2471declare i32 @test_unrelated_callers._Msve() #1472declare i32 @test_unrelated_callers.default() #0473 474define weak_odr ptr @test_unrelated_callers.resolver() comdat {475; CHECK-LABEL: define weak_odr ptr @test_unrelated_callers.resolver() comdat {476resolver_entry:477 tail call void @__init_cpu_features_resolver()478 %0 = load i64, ptr @__aarch64_cpu_features, align 8479 %1 = and i64 %0, 576460752303423488480 %.not = icmp eq i64 %1, 0481 br i1 %.not, label %resolver_else, label %common.ret482 483common.ret: ; preds = %resolver_else2, %resolver_else, %resolver_entry484 %common.ret.op = phi ptr [ @test_unrelated_callers._Mmops, %resolver_entry ], [ @test_unrelated_callers._Msve2, %resolver_else ], [ %test_unrelated_callers._Msve.test_unrelated_callers.default, %resolver_else2 ]485 ret ptr %common.ret.op486 487resolver_else: ; preds = %resolver_entry488 %2 = and i64 %0, 69793284352489 %3 = icmp eq i64 %2, 69793284352490 br i1 %3, label %common.ret, label %resolver_else2491 492resolver_else2: ; preds = %resolver_else493 %4 = and i64 %0, 1073807616494 %5 = icmp eq i64 %4, 1073807616495 %test_unrelated_callers._Msve.test_unrelated_callers.default = select i1 %5, ptr @test_unrelated_callers._Msve, ptr @test_unrelated_callers.default496 br label %common.ret497}498 499define i32 @caller8._MmopsMsve2() #4 {500; CHECK-LABEL: define i32 @caller8._MmopsMsve2(501; CHECK-SAME: ) #[[ATTR4]] {502; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers._Mmops()503;504entry:505 %call = tail call i32 @test_unrelated_callers()506 ret i32 %call507}508 509define dso_local i32 @caller8._Msve2() #2 {510; CHECK-LABEL: define dso_local i32 @caller8._Msve2(511; CHECK-SAME: ) #[[ATTR2]] {512; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers()513;514entry:515 %call = tail call i32 @test_unrelated_callers()516 ret i32 %call517}518 519define i32 @caller8.default() #0 {520; CHECK-LABEL: define i32 @caller8.default(521; CHECK-SAME: ) #[[ATTR0]] {522; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers()523;524entry:525 %call = tail call i32 @test_unrelated_callers()526 ret i32 %call527}528 529define weak_odr ptr @caller8.resolver() comdat {530; CHECK-LABEL: define weak_odr ptr @caller8.resolver() comdat {531resolver_entry:532 tail call void @__init_cpu_features_resolver()533 %0 = load i64, ptr @__aarch64_cpu_features, align 8534 %1 = and i64 %0, 576460822096707840535 %2 = icmp eq i64 %1, 576460822096707840536 %3 = and i64 %0, 69793284352537 %4 = icmp eq i64 %3, 69793284352538 %caller8._Msve2.caller8.default = select i1 %4, ptr @caller8._Msve2, ptr @caller8.default539 %common.ret.op = select i1 %2, ptr @caller8._MmopsMsve2, ptr %caller8._Msve2.caller8.default540 ret ptr %common.ret.op541}542 543define i32 @caller9._Mmops() #3 {544; CHECK-LABEL: define i32 @caller9._Mmops(545; CHECK-SAME: ) #[[ATTR3]] {546; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers._Mmops()547;548entry:549 %call = tail call i32 @test_unrelated_callers()550 ret i32 %call551}552 553define i32 @caller9._Msve() #1 {554; CHECK-LABEL: define i32 @caller9._Msve(555; CHECK-SAME: ) #[[ATTR1]] {556entry:557 ret i32 1558}559 560define i32 @caller9.default() #0 {561; CHECK-LABEL: define i32 @caller9.default(562; CHECK-SAME: ) #[[ATTR0]] {563; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers.default()564;565entry:566 %call = tail call i32 @test_unrelated_callers()567 ret i32 %call568}569 570define weak_odr ptr @caller9.resolver() comdat {571; CHECK-LABEL: define weak_odr ptr @caller9.resolver() comdat {572resolver_entry:573 tail call void @__init_cpu_features_resolver()574 %0 = load i64, ptr @__aarch64_cpu_features, align 8575 %1 = and i64 %0, 576460752303423488576 %.not = icmp eq i64 %1, 0577 %2 = and i64 %0, 1073807616578 %3 = icmp eq i64 %2, 1073807616579 %caller9._Msve.caller9.default = select i1 %3, ptr @caller9._Msve, ptr @caller9.default580 %common.ret.op = select i1 %.not, ptr %caller9._Msve.caller9.default, ptr @caller9._Mmops581 ret ptr %common.ret.op582}583 584define i32 @caller10() #18 {585; CHECK-LABEL: define i32 @caller10(586; CHECK-SAME: ) local_unnamed_addr #[[ATTR18:[0-9]+]] {587; CHECK: [[CALL:%.*]] = tail call i32 @test_unrelated_callers._Mmops()588;589entry:590 %call = tail call i32 @test_unrelated_callers()591 ret i32 %call592}593 594attributes #0 = { "fmv-features" }595attributes #1 = { "fmv-features"="sve" }596attributes #2 = { "fmv-features"="sve2" }597attributes #3 = { "fmv-features"="mops" }598attributes #4 = { "fmv-features"="mops,sve2" }599attributes #5 = { "fmv-features"="sme" }600attributes #6 = { "fmv-features"="aes" }601attributes #7 = { "fmv-features"="sm4" }602attributes #8 = { "target-features"="+aes,+fp-armv8,+neon,+outline-atomics,+v8a" }603attributes #9 = { "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,+sm4" }604attributes #10 = { "fmv-features"="sve2-sha3" }605attributes #11 = { "fmv-features"="cssc,ssbs" }606attributes #12 = { "fmv-features"="flagm,lse,rng" }607attributes #13 = { "fmv-features"="cssc,flagm,lse,rng,ssbs,sve2-sha3" }608attributes #14 = { "fmv-features"="dpb2,frintts" }609attributes #15 = { "fmv-features"="flagm2,frintts" }610attributes #16 = { "fmv-features"="rcpc2" }611attributes #17 = { "fmv-features"="frintts" }612attributes #18 = { "target-features"="+fp-armv8,+mops,+neon,+outline-atomics,+sve,+v8a" }613