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1; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+lob,+mve.fp -disable-arm-loloops=true %s -o - | FileCheck %s --check-prefix=DISABLED2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+lob,+mve.fp %s -o - | FileCheck %s3 4; DISABLED-NOT: dls lr,5 6; CHECK-LABEL: test_target_specific:7; CHECK: mov.w lr, #508; CHECK-NOT: dls lr, lr9; CHECK-NOT: mov lr,10; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]:11; CHECK: le lr, [[LOOP_HEADER]]12; CHECK-NOT: b .13; CHECK: @ %exit14 15define i32 @test_target_specific(ptr %a, ptr %b) {16entry:17 br label %loop18loop:19 %acc = phi i32 [ 0, %entry ], [ %res, %loop ]20 %count = phi i32 [ 0, %entry ], [ %count.next, %loop ]21 %addr.a = getelementptr i32, ptr %a, i32 %count22 %addr.b = getelementptr i32, ptr %b, i32 %count23 %load.a = load i32, ptr %addr.a24 %load.b = load i32, ptr %addr.b25 %res = call i32 @llvm.arm.smlad(i32 %load.a, i32 %load.b, i32 %acc)26 %count.next = add nuw i32 %count, 227 %cmp = icmp ne i32 %count.next, 10028 br i1 %cmp, label %loop, label %exit29exit:30 ret i32 %res31}32 33; CHECK-LABEL: test_fabs:34; CHECK: mov.w lr, #10035; CHECK-NOT: dls lr, lr36; CHECK-NOT: mov lr,37; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]:38; CHECK-NOT: bl39; CHECK: le lr, [[LOOP_HEADER]]40; CHECK-NOT: b .41; CHECK: @ %exit42 43define float @test_fabs(ptr %a) {44entry:45 br label %loop46loop:47 %acc = phi float [ 0.0, %entry ], [ %res, %loop ]48 %count = phi i32 [ 0, %entry ], [ %count.next, %loop ]49 %addr.a = getelementptr float, ptr %a, i32 %count50 %load.a = load float, ptr %addr.a51 %abs = call float @llvm.fabs.f32(float %load.a)52 %res = fadd float %abs, %acc53 %count.next = add nuw i32 %count, 154 %cmp = icmp ne i32 %count.next, 10055 br i1 %cmp, label %loop, label %exit56exit:57 ret float %res58}59 60declare i32 @llvm.arm.smlad(i32, i32, i32)61declare float @llvm.fabs.f32(float)62