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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost -no-ir-sim-intrinsics < %s | FileCheck %s3 4; This test ensures that we do not outline vararg instructions or intrinsics, as5; they may cause inconsistencies when outlining.6 7declare void @llvm.va_start(ptr)8declare void @llvm.va_copy(ptr, ptr)9declare void @llvm.va_end(ptr)10 11define i32 @func1(i32 %a, double %b, ptr %v, ...) nounwind {12; CHECK-LABEL: @func1(13; CHECK-NEXT: entry:14; CHECK-NEXT: [[TMP_LOC:%.*]] = alloca i32, align 415; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 416; CHECK-NEXT: [[B_ADDR:%.*]] = alloca double, align 817; CHECK-NEXT: [[AP:%.*]] = alloca ptr, align 418; CHECK-NEXT: [[C:%.*]] = alloca i32, align 419; CHECK-NEXT: call void @outlined_ir_func_0(i32 [[A:%.*]], ptr [[A_ADDR]], double [[B:%.*]], ptr [[B_ADDR]])20; CHECK-NEXT: call void @llvm.va_start.p0(ptr [[AP]])21; CHECK-NEXT: [[TMP0:%.*]] = va_arg ptr [[AP]], i3222; CHECK-NEXT: call void @llvm.va_copy.p0(ptr [[V:%.*]], ptr [[AP]])23; CHECK-NEXT: call void @llvm.va_end.p0(ptr [[AP]])24; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP_LOC]])25; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[TMP0]], ptr [[C]], ptr [[TMP_LOC]])26; CHECK-NEXT: [[TMP_RELOAD:%.*]] = load i32, ptr [[TMP_LOC]], align 427; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP_LOC]])28; CHECK-NEXT: ret i32 [[TMP_RELOAD]]29;30entry:31 %a.addr = alloca i32, align 432 %b.addr = alloca double, align 833 %ap = alloca ptr, align 434 %c = alloca i32, align 435 store i32 %a, ptr %a.addr, align 436 store double %b, ptr %b.addr, align 837 call void @llvm.va_start(ptr %ap)38 %0 = va_arg ptr %ap, i3239 call void @llvm.va_copy(ptr %v, ptr %ap)40 call void @llvm.va_end(ptr %ap)41 store i32 %0, ptr %c, align 442 %tmp = load i32, ptr %c, align 443 ret i32 %tmp44}45 46define i32 @func2(i32 %a, double %b, ptr %v, ...) nounwind {47; CHECK-LABEL: @func2(48; CHECK-NEXT: entry:49; CHECK-NEXT: [[TMP_LOC:%.*]] = alloca i32, align 450; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 451; CHECK-NEXT: [[B_ADDR:%.*]] = alloca double, align 852; CHECK-NEXT: [[AP:%.*]] = alloca ptr, align 453; CHECK-NEXT: [[C:%.*]] = alloca i32, align 454; CHECK-NEXT: call void @outlined_ir_func_0(i32 [[A:%.*]], ptr [[A_ADDR]], double [[B:%.*]], ptr [[B_ADDR]])55; CHECK-NEXT: call void @llvm.va_start.p0(ptr [[AP]])56; CHECK-NEXT: [[TMP0:%.*]] = va_arg ptr [[AP]], i3257; CHECK-NEXT: call void @llvm.va_copy.p0(ptr [[V:%.*]], ptr [[AP]])58; CHECK-NEXT: call void @llvm.va_end.p0(ptr [[AP]])59; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[TMP_LOC]])60; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[TMP0]], ptr [[C]], ptr [[TMP_LOC]])61; CHECK-NEXT: [[TMP_RELOAD:%.*]] = load i32, ptr [[TMP_LOC]], align 462; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[TMP_LOC]])63; CHECK-NEXT: ret i32 [[TMP_RELOAD]]64;65entry:66 %a.addr = alloca i32, align 467 %b.addr = alloca double, align 868 %ap = alloca ptr, align 469 %c = alloca i32, align 470 store i32 %a, ptr %a.addr, align 471 store double %b, ptr %b.addr, align 872 call void @llvm.va_start(ptr %ap)73 %0 = va_arg ptr %ap, i3274 call void @llvm.va_copy(ptr %v, ptr %ap)75 call void @llvm.va_end(ptr %ap)76 store i32 %0, ptr %c, align 477 %tmp = load i32, ptr %c, align 478 ret i32 %tmp79}80