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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s3 4; Show that we do not outline when all of the phi nodes in the beginning5; block are included not in the region.6 7define void @function1(ptr %a, ptr %b) {8entry:9 %0 = alloca i32, align 410 %c = load i32, ptr %0, align 411 %y = add i32 %c, %c12 br label %test113dummy:14 ret void15test1:16 %1 = phi i32 [ %e, %test1 ], [ %y, %entry ]17 %2 = phi i32 [ %e, %test1 ], [ %y, %entry ]18 %e = load i32, ptr %0, align 419 %3 = add i32 %c, %c20 br i1 true, label %test, label %test121test:22 %d = load i32, ptr %0, align 423 br label %first24first:25 ret void26}27 28define void @function2(ptr %a, ptr %b) {29entry:30 %0 = alloca i32, align 431 %c = load i32, ptr %0, align 432 %y = mul i32 %c, %c33 br label %test134dummy:35 ret void36test1:37 %1 = phi i32 [ %e, %test1 ], [ %y, %entry ]38 %2 = phi i32 [ %y, %entry ], [ %e, %test1 ]39 %e = load i32, ptr %0, align 440 %3 = add i32 %c, %c41 br i1 true, label %test, label %test142test:43 %d = load i32, ptr %0, align 444 br label %first45first:46 ret void47}48; CHECK-LABEL: @function1(49; CHECK-NEXT: entry:50; CHECK-NEXT: [[E_LOC:%.*]] = alloca i32, align 451; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 452; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[TMP0]], align 453; CHECK-NEXT: [[Y:%.*]] = add i32 [[C]], [[C]]54; CHECK-NEXT: br label [[TEST1:%.*]]55; CHECK: dummy:56; CHECK-NEXT: ret void57; CHECK: test1:58; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[E_RELOAD:%.*]], [[TEST1]] ], [ [[Y]], [[ENTRY:%.*]] ]59; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[E_RELOAD]], [[TEST1]] ], [ [[Y]], [[ENTRY]] ]60; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[E_LOC]])61; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(ptr [[TMP0]], i32 [[C]], ptr [[E_LOC]])62; CHECK-NEXT: [[E_RELOAD]] = load i32, ptr [[E_LOC]], align 463; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[E_LOC]])64; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[TEST1]], label [[FIRST:%.*]]65; CHECK: first:66; CHECK-NEXT: ret void67;68;69; CHECK-LABEL: @function2(70; CHECK-NEXT: entry:71; CHECK-NEXT: [[E_LOC:%.*]] = alloca i32, align 472; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 473; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[TMP0]], align 474; CHECK-NEXT: [[Y:%.*]] = mul i32 [[C]], [[C]]75; CHECK-NEXT: br label [[TEST1:%.*]]76; CHECK: dummy:77; CHECK-NEXT: ret void78; CHECK: test1:79; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[E_RELOAD:%.*]], [[TEST1]] ], [ [[Y]], [[ENTRY:%.*]] ]80; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[Y]], [[ENTRY]] ], [ [[E_RELOAD]], [[TEST1]] ]81; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[E_LOC]])82; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(ptr [[TMP0]], i32 [[C]], ptr [[E_LOC]])83; CHECK-NEXT: [[E_RELOAD]] = load i32, ptr [[E_LOC]], align 484; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[E_LOC]])85; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[TEST1]], label [[FIRST:%.*]]86; CHECK: first:87; CHECK-NEXT: ret void88;89;90; CHECK: define internal i1 @outlined_ir_func_0(91; CHECK-NEXT: newFuncRoot:92; CHECK-NEXT: br label [[TEST1_TO_OUTLINE:%.*]]93; CHECK: test1_to_outline:94; CHECK-NEXT: [[E:%.*]] = load i32, ptr [[TMP0:%.*]], align 495; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP1:%.*]], [[TMP1]]96; CHECK-NEXT: br i1 true, label [[TEST:%.*]], label [[TEST1_EXITSTUB:%.*]]97; CHECK: test:98; CHECK-NEXT: [[D:%.*]] = load i32, ptr [[TMP0]], align 499; CHECK-NEXT: br label [[FIRST_EXITSTUB:%.*]]100; CHECK: test1.exitStub:101; CHECK-NEXT: store i32 [[E]], ptr [[TMP2:%.*]], align 4102; CHECK-NEXT: ret i1 true103; CHECK: first.exitStub:104; CHECK-NEXT: store i32 [[E]], ptr [[TMP2]], align 4105; CHECK-NEXT: ret i1 false106;107