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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s3 4; This has two compatible regions based on function attributes. We have5; attributes that should be transferred only if it is on all of the regions.6 7; This includes the attributes, no-nans-fp-math,8; no-signed-zeros-fp-math, less-precise-fpmad, and9; no-infs-fp-math. Only when each instance of similarity has these attributes10; can we say that the outlined function can have these attributes since that11; is the more general case for these attributes.12 13define void @outline_attrs1() #0 {14; CHECK-LABEL: @outline_attrs1(15; CHECK-NEXT: entry:16; CHECK-NEXT: [[A:%.*]] = alloca i32, align 417; CHECK-NEXT: [[B:%.*]] = alloca i32, align 418; CHECK-NEXT: [[C:%.*]] = alloca i32, align 419; CHECK-NEXT: call void @outlined_ir_func_1(ptr [[A]], ptr [[B]], ptr [[C]])20; CHECK-NEXT: ret void21;22entry:23 %a = alloca i32, align 424 %b = alloca i32, align 425 %c = alloca i32, align 426 store i32 2, ptr %a, align 427 store i32 3, ptr %b, align 428 store i32 4, ptr %c, align 429 %al = load i32, ptr %a30 %bl = load i32, ptr %b31 %cl = load i32, ptr %c32 ret void33}34 35define void @outline_attrs2() #0 {36; CHECK-LABEL: @outline_attrs2(37; CHECK-NEXT: entry:38; CHECK-NEXT: [[A:%.*]] = alloca i32, align 439; CHECK-NEXT: [[B:%.*]] = alloca i32, align 440; CHECK-NEXT: [[C:%.*]] = alloca i32, align 441; CHECK-NEXT: call void @outlined_ir_func_1(ptr [[A]], ptr [[B]], ptr [[C]])42; CHECK-NEXT: ret void43;44entry:45 %a = alloca i32, align 446 %b = alloca i32, align 447 %c = alloca i32, align 448 store i32 2, ptr %a, align 449 store i32 3, ptr %b, align 450 store i32 4, ptr %c, align 451 %al = load i32, ptr %a52 %bl = load i32, ptr %b53 %cl = load i32, ptr %c54 ret void55}56 57define void @outline_attrs3() #0 {58; CHECK-LABEL: @outline_attrs3(59; CHECK-NEXT: entry:60; CHECK-NEXT: [[A:%.*]] = alloca float, align 461; CHECK-NEXT: [[B:%.*]] = alloca float, align 462; CHECK-NEXT: [[C:%.*]] = alloca float, align 463; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])64; CHECK-NEXT: ret void65;66entry:67 %a = alloca float, align 468 %b = alloca float, align 469 %c = alloca float, align 470 store float 2.0, ptr %a, align 471 store float 3.0, ptr %b, align 472 store float 4.0, ptr %c, align 473 %al = load float, ptr %a74 %bl = load float, ptr %b75 %cl = load float, ptr %c76 %0 = fmul float %al, %bl77 ret void78}79 80define void @outline_attrs4() {81; CHECK-LABEL: @outline_attrs4(82; CHECK-NEXT: entry:83; CHECK-NEXT: [[A:%.*]] = alloca float, align 484; CHECK-NEXT: [[B:%.*]] = alloca float, align 485; CHECK-NEXT: [[C:%.*]] = alloca float, align 486; CHECK-NEXT: call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[C]])87; CHECK-NEXT: ret void88;89entry:90 %a = alloca float, align 491 %b = alloca float, align 492 %c = alloca float, align 493 store float 2.0, ptr %a, align 494 store float 3.0, ptr %b, align 495 store float 4.0, ptr %c, align 496 %al = load float, ptr %a97 %bl = load float, ptr %b98 %cl = load float, ptr %c99 %0 = fmul float %al, %bl100 ret void101}102 103attributes #0 = { "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "less-precise-fpmad"="true"104"no-infs-fp-math"="true"}105 106; CHECK: define internal void @outlined_ir_func_0(ptr [[ARG0:%.*]], ptr [[ARG1:%.*]], ptr [[ARG2:%.*]]) [[ATTR1:#[0-9]+]] {107; CHECK: entry_to_outline:108; CHECK-NEXT: store float 2.000000e+00, ptr [[ARG0]], align 4109; CHECK-NEXT: store float 3.000000e+00, ptr [[ARG1]], align 4110; CHECK-NEXT: store float 4.000000e+00, ptr [[ARG2]], align 4111; CHECK-NEXT: [[AL:%.*]] = load float, ptr [[ARG0]], align 4112; CHECK-NEXT: [[BL:%.*]] = load float, ptr [[ARG1]], align 4113; CHECK-NEXT: [[CL:%.*]] = load float, ptr [[ARG2]], align 4114 115; CHECK: define internal void @outlined_ir_func_1(ptr [[ARG0:%.*]], ptr [[ARG1:%.*]], ptr [[ARG2:%.*]]) [[ATTR:#[0-9]+]] {116; CHECK: entry_to_outline:117; CHECK-NEXT: store i32 2, ptr [[ARG0]], align 4118; CHECK-NEXT: store i32 3, ptr [[ARG1]], align 4119; CHECK-NEXT: store i32 4, ptr [[ARG2]], align 4120; CHECK-NEXT: [[AL:%.*]] = load i32, ptr [[ARG0]], align 4121; CHECK-NEXT: [[BL:%.*]] = load i32, ptr [[ARG1]], align 4122; CHECK-NEXT: [[CL:%.*]] = load i32, ptr [[ARG2]], align 4123 124 125; CHECK: attributes [[ATTR1]] = { minsize optsize "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" }126; CHECK: attributes [[ATTR]] = { minsize optsize "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" }127