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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s3 4; Here we have multiple exits, but the different sources, different outputs are5; needed, this checks that they are handled by separate switch statements.6 7define void @outline_outputs1() #0 {8entry:9 %output = alloca i32, align 410 %result = alloca i32, align 411 %output2 = alloca i32, align 412 %result2 = alloca i32, align 413 %a = alloca i32, align 414 %b = alloca i32, align 415 br label %block_216block_1:17 %a2 = alloca i32, align 418 %b2 = alloca i32, align 419 br label %block_220block_2:21 %a2val = load i32, ptr %a22 %b2val = load i32, ptr %b23 %add2 = add i32 2, %a2val24 %mul2 = mul i32 2, %b2val25 br label %block_526block_3:27 %aval = load i32, ptr %a28 %bval = load i32, ptr %b29 %add = add i32 2, %aval30 %mul = mul i32 2, %bval31 br label %block_432block_4:33 store i32 %add, ptr %output, align 434 store i32 %mul, ptr %result, align 435 br label %block_636block_5:37 store i32 %add2, ptr %output, align 438 store i32 %mul2, ptr %result, align 439 br label %block_740block_6:41 %div = udiv i32 %aval, %bval42 ret void43block_7:44 %sub = sub i32 %a2val, %b2val45 ret void46}47 48define void @outline_outputs2() #0 {49entry:50 %output = alloca i32, align 451 %result = alloca i32, align 452 %output2 = alloca i32, align 453 %result2 = alloca i32, align 454 %a = alloca i32, align 455 %b = alloca i32, align 456 br label %block_257block_1:58 %a2 = alloca i32, align 459 %b2 = alloca i32, align 460 br label %block_261block_2:62 %a2val = load i32, ptr %a63 %b2val = load i32, ptr %b64 %add2 = add i32 2, %a2val65 %mul2 = mul i32 2, %b2val66 br label %block_567block_3:68 %aval = load i32, ptr %a69 %bval = load i32, ptr %b70 %add = add i32 2, %aval71 %mul = mul i32 2, %bval72 br label %block_473block_4:74 store i32 %add, ptr %output, align 475 store i32 %mul, ptr %result, align 476 br label %block_777block_5:78 store i32 %add2, ptr %output, align 479 store i32 %mul2, ptr %result, align 480 br label %block_681block_6:82 %diff = sub i32 %a2val, %b2val83 ret void84block_7:85 %quot = udiv i32 %add, %mul86 ret void87}88; CHECK-LABEL: @outline_outputs1(89; CHECK-NEXT: entry:90; CHECK-NEXT: [[BVAL_LOC:%.*]] = alloca i32, align 491; CHECK-NEXT: [[AVAL_LOC:%.*]] = alloca i32, align 492; CHECK-NEXT: [[B2VAL_LOC:%.*]] = alloca i32, align 493; CHECK-NEXT: [[A2VAL_LOC:%.*]] = alloca i32, align 494; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 495; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 496; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 497; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 498; CHECK-NEXT: [[A:%.*]] = alloca i32, align 499; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4100; CHECK-NEXT: br label [[BLOCK_2:%.*]]101; CHECK: block_1:102; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 4103; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 4104; CHECK-NEXT: br label [[BLOCK_2]]105; CHECK: block_2:106; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[A2VAL_LOC]])107; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[B2VAL_LOC]])108; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[AVAL_LOC]])109; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[BVAL_LOC]])110; CHECK-NEXT: [[TMP0:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr [[A2VAL_LOC]], ptr [[B2VAL_LOC]], ptr [[AVAL_LOC]], ptr [[BVAL_LOC]], i32 0)111; CHECK-NEXT: [[A2VAL_RELOAD:%.*]] = load i32, ptr [[A2VAL_LOC]], align 4112; CHECK-NEXT: [[B2VAL_RELOAD:%.*]] = load i32, ptr [[B2VAL_LOC]], align 4113; CHECK-NEXT: [[AVAL_RELOAD:%.*]] = load i32, ptr [[AVAL_LOC]], align 4114; CHECK-NEXT: [[BVAL_RELOAD:%.*]] = load i32, ptr [[BVAL_LOC]], align 4115; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[A2VAL_LOC]])116; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[B2VAL_LOC]])117; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[AVAL_LOC]])118; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[BVAL_LOC]])119; CHECK-NEXT: br i1 [[TMP0]], label [[BLOCK_6:%.*]], label [[BLOCK_7:%.*]]120; CHECK: block_6:121; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AVAL_RELOAD]], [[BVAL_RELOAD]]122; CHECK-NEXT: ret void123; CHECK: block_7:124; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A2VAL_RELOAD]], [[B2VAL_RELOAD]]125; CHECK-NEXT: ret void126;127;128; CHECK-LABEL: @outline_outputs2(129; CHECK-NEXT: entry:130; CHECK-NEXT: [[MUL_LOC:%.*]] = alloca i32, align 4131; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4132; CHECK-NEXT: [[B2VAL_LOC:%.*]] = alloca i32, align 4133; CHECK-NEXT: [[A2VAL_LOC:%.*]] = alloca i32, align 4134; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4135; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4136; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 4137; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 4138; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4139; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4140; CHECK-NEXT: br label [[BLOCK_2:%.*]]141; CHECK: block_1:142; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 4143; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 4144; CHECK-NEXT: br label [[BLOCK_2]]145; CHECK: block_2:146; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[A2VAL_LOC]])147; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[B2VAL_LOC]])148; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[ADD_LOC]])149; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[MUL_LOC]])150; CHECK-NEXT: [[TMP0:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr [[A2VAL_LOC]], ptr [[B2VAL_LOC]], ptr [[ADD_LOC]], ptr [[MUL_LOC]], i32 1)151; CHECK-NEXT: [[A2VAL_RELOAD:%.*]] = load i32, ptr [[A2VAL_LOC]], align 4152; CHECK-NEXT: [[B2VAL_RELOAD:%.*]] = load i32, ptr [[B2VAL_LOC]], align 4153; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, ptr [[ADD_LOC]], align 4154; CHECK-NEXT: [[MUL_RELOAD:%.*]] = load i32, ptr [[MUL_LOC]], align 4155; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[A2VAL_LOC]])156; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[B2VAL_LOC]])157; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[ADD_LOC]])158; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[MUL_LOC]])159; CHECK-NEXT: br i1 [[TMP0]], label [[BLOCK_7:%.*]], label [[BLOCK_6:%.*]]160; CHECK: block_6:161; CHECK-NEXT: [[DIFF:%.*]] = sub i32 [[A2VAL_RELOAD]], [[B2VAL_RELOAD]]162; CHECK-NEXT: ret void163; CHECK: block_7:164; CHECK-NEXT: [[QUOT:%.*]] = udiv i32 [[ADD_RELOAD]], [[MUL_RELOAD]]165; CHECK-NEXT: ret void166;167;168; CHECK: define internal i1 @outlined_ir_func_0(169; CHECK-NEXT: newFuncRoot:170; CHECK-NEXT: br label [[BLOCK_2_TO_OUTLINE:%.*]]171; CHECK: block_2_to_outline:172; CHECK-NEXT: [[A2VAL:%.*]] = load i32, ptr [[TMP0:%.*]], align 4173; CHECK-NEXT: [[B2VAL:%.*]] = load i32, ptr [[TMP1:%.*]], align 4174; CHECK-NEXT: [[ADD2:%.*]] = add i32 2, [[A2VAL]]175; CHECK-NEXT: [[MUL2:%.*]] = mul i32 2, [[B2VAL]]176; CHECK-NEXT: br label [[BLOCK_5:%.*]]177; CHECK: block_3:178; CHECK-NEXT: [[AVAL:%.*]] = load i32, ptr [[TMP0]], align 4179; CHECK-NEXT: [[BVAL:%.*]] = load i32, ptr [[TMP1]], align 4180; CHECK-NEXT: [[ADD:%.*]] = add i32 2, [[AVAL]]181; CHECK-NEXT: [[MUL:%.*]] = mul i32 2, [[BVAL]]182; CHECK-NEXT: br label [[BLOCK_4:%.*]]183; CHECK: block_4:184; CHECK-NEXT: store i32 [[ADD]], ptr [[TMP2:%.*]], align 4185; CHECK-NEXT: store i32 [[MUL]], ptr [[TMP3:%.*]], align 4186; CHECK-NEXT: br label [[BLOCK_6_EXITSTUB:%.*]]187; CHECK: block_5:188; CHECK-NEXT: store i32 [[ADD2]], ptr [[TMP2]], align 4189; CHECK-NEXT: store i32 [[MUL2]], ptr [[TMP3]], align 4190; CHECK-NEXT: br label [[BLOCK_7_EXITSTUB:%.*]]191; CHECK: block_6.exitStub:192; CHECK-NEXT: switch i32 [[TMP8:%.*]], label [[FINAL_BLOCK_1:%.*]] [193; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_0_1:%.*]]194; CHECK-NEXT: i32 1, label [[OUTPUT_BLOCK_1_1:%.*]]195; CHECK-NEXT: ]196; CHECK: block_7.exitStub:197; CHECK-NEXT: switch i32 [[TMP8]], label [[FINAL_BLOCK_0:%.*]] [198; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_0_0:%.*]]199; CHECK-NEXT: i32 1, label [[OUTPUT_BLOCK_1_0:%.*]]200; CHECK-NEXT: ]201; CHECK: output_block_0_0:202; CHECK-NEXT: store i32 [[A2VAL]], ptr [[TMP4:%.*]], align 4203; CHECK-NEXT: store i32 [[B2VAL]], ptr [[TMP5:%.*]], align 4204; CHECK-NEXT: br label [[FINAL_BLOCK_0]]205; CHECK: output_block_0_1:206; CHECK-NEXT: store i32 [[AVAL]], ptr [[TMP6:%.*]], align 4207; CHECK-NEXT: store i32 [[BVAL]], ptr [[TMP7:%.*]], align 4208; CHECK-NEXT: br label [[FINAL_BLOCK_1]]209; CHECK: output_block_1_0:210; CHECK-NEXT: store i32 [[A2VAL]], ptr [[TMP4]], align 4211; CHECK-NEXT: store i32 [[B2VAL]], ptr [[TMP5]], align 4212; CHECK-NEXT: br label [[FINAL_BLOCK_0]]213; CHECK: output_block_1_1:214; CHECK-NEXT: store i32 [[ADD]], ptr [[TMP6]], align 4215; CHECK-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4216; CHECK-NEXT: br label [[FINAL_BLOCK_1]]217; CHECK: final_block_0:218; CHECK-NEXT: ret i1 false219; CHECK: final_block_1:220; CHECK-NEXT: ret i1 true221;222