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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs2; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s3 4; Here we have multiple exits, but different sources, and only one has an5; output set. We check to make sure that we do not generated extra output6; blocks or entries in the switch statement.7 8define void @outline_outputs1() #0 {9entry:10 %output = alloca i32, align 411 %result = alloca i32, align 412 %output2 = alloca i32, align 413 %result2 = alloca i32, align 414 %a = alloca i32, align 415 %b = alloca i32, align 416 br label %block_217block_1:18 %a2 = alloca i32, align 419 %b2 = alloca i32, align 420 br label %block_221block_2:22 %a2val = load i32, ptr %a23 %b2val = load i32, ptr %b24 %add2 = add i32 2, %a2val25 %mul2 = mul i32 2, %b2val26 br label %block_527block_3:28 %aval = load i32, ptr %a29 %bval = load i32, ptr %b30 %add = add i32 2, %aval31 %mul = mul i32 2, %bval32 br label %block_433block_4:34 store i32 %add, ptr %output, align 435 store i32 %mul, ptr %result, align 436 br label %block_637block_5:38 store i32 %add2, ptr %output, align 439 store i32 %mul2, ptr %result, align 440 br label %block_741block_6:42 ret void43block_7:44 ret void45}46 47define void @outline_outputs2() #0 {48entry:49 %output = alloca i32, align 450 %result = alloca i32, align 451 %output2 = alloca i32, align 452 %result2 = alloca i32, align 453 %a = alloca i32, align 454 %b = alloca i32, align 455 br label %block_256block_1:57 %a2 = alloca i32, align 458 %b2 = alloca i32, align 459 br label %block_260block_2:61 %a2val = load i32, ptr %a62 %b2val = load i32, ptr %b63 %add2 = add i32 2, %a2val64 %mul2 = mul i32 2, %b2val65 br label %block_566block_3:67 %aval = load i32, ptr %a68 %bval = load i32, ptr %b69 %add = add i32 2, %aval70 %mul = mul i32 2, %bval71 br label %block_472block_4:73 store i32 %add, ptr %output, align 474 store i32 %mul, ptr %result, align 475 br label %block_776block_5:77 store i32 %add2, ptr %output, align 478 store i32 %mul2, ptr %result, align 479 br label %block_680block_6:81 %diff = sub i32 %a2val, %b2val82 ret void83block_7:84 %quot = udiv i32 %add, %mul85 ret void86}87; CHECK-LABEL: @outline_outputs1(88; CHECK-NEXT: entry:89; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 490; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 491; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 492; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 493; CHECK-NEXT: [[A:%.*]] = alloca i32, align 494; CHECK-NEXT: [[B:%.*]] = alloca i32, align 495; CHECK-NEXT: br label [[BLOCK_2:%.*]]96; CHECK: block_1:97; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 498; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 499; CHECK-NEXT: br label [[BLOCK_2]]100; CHECK: block_2:101; CHECK-NEXT: [[TMP0:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr null, ptr null, ptr null, ptr null, i32 -1)102; CHECK-NEXT: br i1 [[TMP0]], label [[BLOCK_6:%.*]], label [[BLOCK_7:%.*]]103; CHECK: block_6:104; CHECK-NEXT: ret void105; CHECK: block_7:106; CHECK-NEXT: ret void107;108;109; CHECK-LABEL: @outline_outputs2(110; CHECK-NEXT: entry:111; CHECK-NEXT: [[MUL_LOC:%.*]] = alloca i32, align 4112; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4113; CHECK-NEXT: [[B2VAL_LOC:%.*]] = alloca i32, align 4114; CHECK-NEXT: [[A2VAL_LOC:%.*]] = alloca i32, align 4115; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4116; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4117; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 4118; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 4119; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4120; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4121; CHECK-NEXT: br label [[BLOCK_2:%.*]]122; CHECK: block_1:123; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 4124; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 4125; CHECK-NEXT: br label [[BLOCK_2]]126; CHECK: block_2:127; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[A2VAL_LOC]])128; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[B2VAL_LOC]])129; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[ADD_LOC]])130; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[MUL_LOC]])131; CHECK-NEXT: [[TMP0:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr [[A2VAL_LOC]], ptr [[B2VAL_LOC]], ptr [[ADD_LOC]], ptr [[MUL_LOC]], i32 0)132; CHECK-NEXT: [[A2VAL_RELOAD:%.*]] = load i32, ptr [[A2VAL_LOC]], align 4133; CHECK-NEXT: [[B2VAL_RELOAD:%.*]] = load i32, ptr [[B2VAL_LOC]], align 4134; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, ptr [[ADD_LOC]], align 4135; CHECK-NEXT: [[MUL_RELOAD:%.*]] = load i32, ptr [[MUL_LOC]], align 4136; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[A2VAL_LOC]])137; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[B2VAL_LOC]])138; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[ADD_LOC]])139; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[MUL_LOC]])140; CHECK-NEXT: br i1 [[TMP0]], label [[BLOCK_7:%.*]], label [[BLOCK_6:%.*]]141; CHECK: block_6:142; CHECK-NEXT: [[DIFF:%.*]] = sub i32 [[A2VAL_RELOAD]], [[B2VAL_RELOAD]]143; CHECK-NEXT: ret void144; CHECK: block_7:145; CHECK-NEXT: [[QUOT:%.*]] = udiv i32 [[ADD_RELOAD]], [[MUL_RELOAD]]146; CHECK-NEXT: ret void147;148;149; CHECK: define internal i1 @outlined_ir_func_0(150; CHECK-NEXT: newFuncRoot:151; CHECK-NEXT: br label [[BLOCK_2_TO_OUTLINE:%.*]]152; CHECK: block_2_to_outline:153; CHECK-NEXT: [[A2VAL:%.*]] = load i32, ptr [[TMP0:%.*]], align 4154; CHECK-NEXT: [[B2VAL:%.*]] = load i32, ptr [[TMP1:%.*]], align 4155; CHECK-NEXT: [[ADD2:%.*]] = add i32 2, [[A2VAL]]156; CHECK-NEXT: [[MUL2:%.*]] = mul i32 2, [[B2VAL]]157; CHECK-NEXT: br label [[BLOCK_5:%.*]]158; CHECK: block_3:159; CHECK-NEXT: [[AVAL:%.*]] = load i32, ptr [[TMP0]], align 4160; CHECK-NEXT: [[BVAL:%.*]] = load i32, ptr [[TMP1]], align 4161; CHECK-NEXT: [[ADD:%.*]] = add i32 2, [[AVAL]]162; CHECK-NEXT: [[MUL:%.*]] = mul i32 2, [[BVAL]]163; CHECK-NEXT: br label [[BLOCK_4:%.*]]164; CHECK: block_4:165; CHECK-NEXT: store i32 [[ADD]], ptr [[TMP2:%.*]], align 4166; CHECK-NEXT: store i32 [[MUL]], ptr [[TMP3:%.*]], align 4167; CHECK-NEXT: br label [[BLOCK_6_EXITSTUB:%.*]]168; CHECK: block_5:169; CHECK-NEXT: store i32 [[ADD2]], ptr [[TMP2]], align 4170; CHECK-NEXT: store i32 [[MUL2]], ptr [[TMP3]], align 4171; CHECK-NEXT: br label [[BLOCK_7_EXITSTUB:%.*]]172; CHECK: block_6.exitStub:173; CHECK-NEXT: switch i32 [[TMP8:%.*]], label [[FINAL_BLOCK_1:%.*]] [174; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_1_1:%.*]]175; CHECK-NEXT: ]176; CHECK: block_7.exitStub:177; CHECK-NEXT: switch i32 [[TMP8]], label [[FINAL_BLOCK_0:%.*]] [178; CHECK-NEXT: i32 0, label [[OUTPUT_BLOCK_1_0:%.*]]179; CHECK-NEXT: ]180; CHECK: output_block_1_0:181; CHECK-NEXT: store i32 [[A2VAL]], ptr [[TMP4:%.*]], align 4182; CHECK-NEXT: store i32 [[B2VAL]], ptr [[TMP5:%.*]], align 4183; CHECK-NEXT: br label [[FINAL_BLOCK_0]]184; CHECK: output_block_1_1:185; CHECK-NEXT: store i32 [[ADD]], ptr [[TMP6:%.*]], align 4186; CHECK-NEXT: store i32 [[MUL]], ptr [[TMP7:%.*]], align 4187; CHECK-NEXT: br label [[FINAL_BLOCK_1]]188; CHECK: final_block_0:189; CHECK-NEXT: ret i1 false190; CHECK: final_block_1:191; CHECK-NEXT: ret i1 true192;193