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1; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes=inline < %s | FileCheck %s2; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s3 4define i32 @func_default() #0 {5 ret i32 06}7 8define i32 @func_dx10_clamp_enabled() #1 {9 ret i32 010}11 12define i32 @func_dx10_clamp_disabled() #2 {13 ret i32 014}15 16; CHECK-LABEL: @default_call_default(17; CHECK-NEXT: ret i32 018define i32 @default_call_default() #0 {19 %call = call i32 @func_default()20 ret i32 %call21}22 23; CHECK-LABEL: @dx10_clamp_enabled_call_default(24; CHECK-NEXT: ret i32 025define i32 @dx10_clamp_enabled_call_default() #1 {26 %call = call i32 @func_default()27 ret i32 %call28}29 30; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_enabled(31; CHECK-NEXT: ret i32 032define i32 @dx10_clamp_enabled_call_dx10_clamp_enabled() #1 {33 %call = call i32 @func_dx10_clamp_enabled()34 ret i32 %call35}36 37; CHECK-LABEL: @dx10_clamp_enabled_call_dx10_clamp_disabled(38; CHECK-NEXT: call i32 @func_dx10_clamp_disabled()39define i32 @dx10_clamp_enabled_call_dx10_clamp_disabled() #1 {40 %call = call i32 @func_dx10_clamp_disabled()41 ret i32 %call42}43 44; CHECK-LABEL: @dx10_clamp_disabled_call_default(45; CHECK-NEXT: call i32 @func_default()46define i32 @dx10_clamp_disabled_call_default() #2 {47 %call = call i32 @func_default()48 ret i32 %call49}50 51; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_enabled(52; CHECK-NEXT: call i32 @func_dx10_clamp_enabled()53define i32 @dx10_clamp_disabled_call_dx10_clamp_enabled() #2 {54 %call = call i32 @func_dx10_clamp_enabled()55 ret i32 %call56}57 58; CHECK-LABEL: @dx10_clamp_disabled_call_dx10_clamp_disabled(59; CHECK-NEXT: ret i32 060define i32 @dx10_clamp_disabled_call_dx10_clamp_disabled() #2 {61 %call = call i32 @func_dx10_clamp_disabled()62 ret i32 %call63}64 65; Shader calling a compute function66; CHECK-LABEL: @amdgpu_ps_default_call_default(67; CHECK-NEXT: call i32 @func_default()68define amdgpu_ps i32 @amdgpu_ps_default_call_default() #0 {69 %call = call i32 @func_default()70 ret i32 %call71}72 73; Shader with dx10_clamp enabled calling a compute function. Default74; also implies ieee_mode, so this isn't inlinable.75; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_call_default(76; CHECK-NEXT: call i32 @func_default()77define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_call_default() #1 {78 %call = call i32 @func_default()79 ret i32 %call80}81 82; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_call_default(83; CHECK-NEXT: call i32 @func_default()84define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_call_default() #2 {85 %call = call i32 @func_default()86 ret i32 %call87}88 89; CHECK-LABEL: @amdgpu_ps_dx10_clamp_enabled_ieee_call_default(90; CHECK-NEXT: ret i32 091define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_enabled_ieee_call_default() #3 {92 %call = call i32 @func_default()93 ret i32 %call94}95 96; CHECK-LABEL: @amdgpu_ps_dx10_clamp_disabled_ieee_call_default(97; CHECK-NEXT: call i32 @func_default()98define amdgpu_ps i32 @amdgpu_ps_dx10_clamp_disabled_ieee_call_default() #4 {99 %call = call i32 @func_default()100 ret i32 %call101}102 103attributes #0 = { nounwind }104attributes #1 = { nounwind "amdgpu-dx10-clamp"="true" }105attributes #2 = { nounwind "amdgpu-dx10-clamp"="false" }106attributes #3 = { nounwind "amdgpu-dx10-clamp"="true" "amdgpu-ieee"="true" }107attributes #4 = { nounwind "amdgpu-dx10-clamp"="false" "amdgpu-ieee"="true" }108