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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature2; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -S -passes=inline | FileCheck %s3 4; Test for PR52660.5 6; This call should not get inlined, because it would make the callee_not_avx7; call ABI incompatible.8define void @caller_avx() "target-features"="+avx" {9; CHECK-LABEL: define {{[^@]+}}@caller_avx10; CHECK-SAME: () #[[ATTR0:[0-9]+]] {11; CHECK-NEXT: call void @caller_not_avx()12; CHECK-NEXT: ret void13;14 call void @caller_not_avx()15 ret void16}17 18define internal void @caller_not_avx() {19; CHECK-LABEL: define {{[^@]+}}@caller_not_avx() {20; CHECK-NEXT: [[TMP1:%.*]] = call i64 @callee_not_avx(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)21; CHECK-NEXT: ret void22;23 call i64 @callee_not_avx(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)24 ret void25}26 27define i64 @callee_not_avx(<4 x i64> %arg) noinline {28; CHECK-LABEL: define {{[^@]+}}@callee_not_avx29; CHECK-SAME: (<4 x i64> [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {30; CHECK-NEXT: [[V:%.*]] = extractelement <4 x i64> [[ARG]], i64 231; CHECK-NEXT: ret i64 [[V]]32;33 %v = extractelement <4 x i64> %arg, i64 234 ret i64 %v35}36 37; This call also shouldn't be inlined, as caller_not_avx2 is not ABI compatible.38define void @caller_avx2() "target-features"="+avx" {39; CHECK-LABEL: define {{[^@]+}}@caller_avx240; CHECK-SAME: () #[[ATTR0]] {41; CHECK-NEXT: call void @caller_not_avx2()42; CHECK-NEXT: ret void43;44 call void @caller_not_avx2()45 ret void46}47 48define internal void @caller_not_avx2() {49; CHECK-LABEL: define {{[^@]+}}@caller_not_avx2() {50; CHECK-NEXT: [[TMP1:%.*]] = call i64 @callee_unknown(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)51; CHECK-NEXT: ret void52;53 call i64 @callee_unknown(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)54 ret void55}56 57; Should be inlined, as caller_avx7 is ABI compatible. The fact that we don't58; know anything about callee_unknown doesn't matter, as it is the caller that59; determines the ABI as far as target features are concerned.60define void @caller_avx6() "target-features"="+avx" {61; CHECK-LABEL: define {{[^@]+}}@caller_avx662; CHECK-SAME: () #[[ATTR0]] {63; CHECK-NEXT: [[TMP1:%.*]] = call i64 @callee_unknown(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)64; CHECK-NEXT: ret void65;66 call void @caller_avx7()67 ret void68}69 70define void @caller_avx7() "target-features"="+avx" {71; CHECK-LABEL: define {{[^@]+}}@caller_avx772; CHECK-SAME: () #[[ATTR0]] {73; CHECK-NEXT: [[TMP1:%.*]] = call i64 @callee_unknown(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)74; CHECK-NEXT: ret void75;76 call i64 @callee_unknown(<4 x i64> <i64 0, i64 1, i64 2, i64 3>)77 ret void78}79 80declare i64 @callee_unknown(<4 x i64>)81 82; This call should get inlined, because we assume that intrinsics are always83; ABI compatible.84define void @caller_avx3() "target-features"="+avx" {85; CHECK-LABEL: define {{[^@]+}}@caller_avx386; CHECK-SAME: () #[[ATTR0]] {87; CHECK-NEXT: [[V_I:%.*]] = load <4 x i64>, ptr @g, align 3288; CHECK-NEXT: [[V2_I:%.*]] = call <4 x i64> @llvm.abs.v4i64(<4 x i64> [[V_I]], i1 false)89; CHECK-NEXT: store <4 x i64> [[V2_I]], ptr @g, align 3290; CHECK-NEXT: ret void91;92 call void @caller_not_avx3()93 ret void94}95 96@g = external global <4 x i64>97 98define internal void @caller_not_avx3() {99 %v = load <4 x i64>, ptr @g100 %v2 = call <4 x i64> @llvm.abs(<4 x i64> %v, i1 false)101 store <4 x i64> %v2, ptr @g102 ret void103}104 105; This call should get inlined, because only simple types are involved.106define void @caller_avx4() "target-features"="+avx" {107; CHECK-LABEL: define {{[^@]+}}@caller_avx4108; CHECK-SAME: () #[[ATTR0]] {109; CHECK-NEXT: [[TMP1:%.*]] = call i64 @caller_unknown_simple(i64 0)110; CHECK-NEXT: ret void111;112 call void @caller_not_avx4()113 ret void114}115 116define internal void @caller_not_avx4() {117 call i64 @caller_unknown_simple(i64 0)118 ret void119}120 121declare i64 @caller_unknown_simple(i64)122 123; This call should get inlined, because the callee only contains124; inline ASM, not real calls.125define <8 x i64> @caller_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #0 {126; CHECK-LABEL: define {{[^@]+}}@caller_inline_asm127; CHECK-SAME: (ptr [[P0:%.*]], i64 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR2:[0-9]+]] {128; CHECK-NEXT: [[SRC_I:%.*]] = load <8 x i64>, ptr [[P0]], align 64129; CHECK-NEXT: [[A_I:%.*]] = load <8 x i64>, ptr [[P1]], align 64130; CHECK-NEXT: [[B_I:%.*]] = load <8 x i64>, ptr [[P2]], align 64131; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 [[K]], <8 x i64> [[A_I]], <8 x i64> [[B_I]], <8 x i64> [[SRC_I]])132; CHECK-NEXT: ret <8 x i64> [[TMP1]]133;134 %call = call <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2)135 ret <8 x i64> %call136}137 138define internal <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #1 {139 %src = load <8 x i64>, ptr %p0, align 64140 %a = load <8 x i64>, ptr %p1, align 64141 %b = load <8 x i64>, ptr %p2, align 64142 %3 = tail call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 %k, <8 x i64> %a, <8 x i64> %b, <8 x i64> %src) #2143 ret <8 x i64> %3144}145 146attributes #0 = { "min-legal-vector-width"="512" "target-features"="+avx,+avx2,+avx512bw,+avx512dq,+avx512f,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" "tune-cpu"="generic" }147attributes #1 = { "min-legal-vector-width"="512" "target-features"="+avx,+avx2,+avx512bw,+avx512f,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" "tune-cpu"="generic" }148