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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=instcombine -mtriple aarch64 < %s | FileCheck %s3 4define <2 x float> @fcvtxn(<2 x double> %d1) {5; CHECK-LABEL: @fcvtxn(6; CHECK-NEXT: [[I:%.*]] = call <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double> [[D1:%.*]])7; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x float> [[I]], <2 x float> poison, <2 x i32> <i32 0, i32 poison>8; CHECK-NEXT: ret <2 x float> [[S]]9;10 %a = shufflevector <2 x double> %d1, <2 x double> undef, <2 x i32> <i32 0, i32 0>11 %i = call <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double> %a)12 %s = shufflevector <2 x float> %i, <2 x float> undef, <2 x i32> <i32 0, i32 undef>13 ret <2 x float> %s14}15 16define <4 x i16> @rshrn(<2 x i32> %d1, <2 x i32> %d2) {17; CHECK-LABEL: @rshrn(18; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>19; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> [[A]], i32 9)20; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>21; CHECK-NEXT: ret <4 x i16> [[S]]22;23 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>24 %i = call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> %a, i32 9)25 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>26 ret <4 x i16> %s27}28 29define <4 x i16> @sqrshrn(<2 x i32> %d1, <2 x i32> %d2) {30; CHECK-LABEL: @sqrshrn(31; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>32; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> [[A]], i32 9)33; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>34; CHECK-NEXT: ret <4 x i16> [[S]]35;36 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>37 %i = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> %a, i32 9)38 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>39 ret <4 x i16> %s40}41 42define <4 x i16> @sqrshrun(<2 x i32> %d1, <2 x i32> %d2) {43; CHECK-LABEL: @sqrshrun(44; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>45; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> [[A]], i32 9)46; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>47; CHECK-NEXT: ret <4 x i16> [[S]]48;49 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>50 %i = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> %a, i32 9)51 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>52 ret <4 x i16> %s53}54 55define <4 x i16> @sqshrn(<2 x i32> %d1, <2 x i32> %d2) {56; CHECK-LABEL: @sqshrn(57; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>58; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> [[A]], i32 9)59; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>60; CHECK-NEXT: ret <4 x i16> [[S]]61;62 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>63 %i = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %a, i32 9)64 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>65 ret <4 x i16> %s66}67 68define <4 x i16> @sqshrun(<2 x i32> %d1, <2 x i32> %d2) {69; CHECK-LABEL: @sqshrun(70; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>71; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> [[A]], i32 9)72; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>73; CHECK-NEXT: ret <4 x i16> [[S]]74;75 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>76 %i = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> %a, i32 9)77 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>78 ret <4 x i16> %s79}80 81define <4 x i16> @sqxtn(<2 x i32> %d1, <2 x i32> %d2) {82; CHECK-LABEL: @sqxtn(83; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>84; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> [[A]])85; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>86; CHECK-NEXT: ret <4 x i16> [[S]]87;88 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>89 %i = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %a)90 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>91 ret <4 x i16> %s92}93 94define <4 x i16> @sqxtun(<2 x i32> %d1, <2 x i32> %d2) {95; CHECK-LABEL: @sqxtun(96; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>97; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> [[A]])98; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>99; CHECK-NEXT: ret <4 x i16> [[S]]100;101 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>102 %i = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> %a)103 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>104 ret <4 x i16> %s105}106 107define <4 x i16> @uqrshrn(<2 x i32> %d1, <2 x i32> %d2) {108; CHECK-LABEL: @uqrshrn(109; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>110; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> [[A]], i32 9)111; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>112; CHECK-NEXT: ret <4 x i16> [[S]]113;114 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>115 %i = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> %a, i32 9)116 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>117 ret <4 x i16> %s118}119 120define <4 x i16> @uqshrn(<2 x i32> %d1, <2 x i32> %d2) {121; CHECK-LABEL: @uqshrn(122; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>123; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> [[A]], i32 9)124; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>125; CHECK-NEXT: ret <4 x i16> [[S]]126;127 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>128 %i = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> %a, i32 9)129 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>130 ret <4 x i16> %s131}132 133define <4 x i16> @uqxtn(<2 x i32> %d1, <2 x i32> %d2) {134; CHECK-LABEL: @uqxtn(135; CHECK-NEXT: [[A:%.*]] = shufflevector <2 x i32> [[D1:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>136; CHECK-NEXT: [[I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> [[A]])137; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i16> [[I]], <4 x i16> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>138; CHECK-NEXT: ret <4 x i16> [[S]]139;140 %a = shufflevector <2 x i32> %d1, <2 x i32> %d2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>141 %i = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> %a)142 %s = shufflevector <4 x i16> %i, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>143 ret <4 x i16> %s144}145 146declare <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double> %a)147declare <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32>, i32)148declare <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32>, i32)149declare <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32>, i32)150declare <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32>, i32)151declare <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32>, i32)152declare <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32>)153declare <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32>)154declare <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32>, i32)155declare <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32>, i32)156declare <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32>)157 158