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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=instcombine < %s | FileCheck %s3; ARM64 dmb intrinsics4 5target triple = "aarch64-unknown-linux-gnu"6 7declare void @llvm.aarch64.dmb(i32)8declare void @llvm.aarch64.dsb(i32)9declare void @clobber()10declare void @pure() memory(none) willreturn nounwind11declare i32 @llvm.ctlz.i32(i32, i1)12 13define void @simple() #0 {14; CHECK-LABEL: define void @simple() {15; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)16; CHECK-NEXT: ret void17;18 call void @llvm.aarch64.dmb(i32 10)19 call void @llvm.aarch64.dmb(i32 10)20 ret void21}22 23; dmb ish (0xb) is technically stronger than ishst (0xa) but we don't merge for now24define void @simple_nonmatching() #0 {25; CHECK-LABEL: define void @simple_nonmatching() {26; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)27; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 11)28; CHECK-NEXT: ret void29;30 call void @llvm.aarch64.dmb(i32 10)31 call void @llvm.aarch64.dmb(i32 11)32 ret void33}34 35define ptr @simple_safe_instruction(ptr %p) #0 {36; CHECK-LABEL: define ptr @simple_safe_instruction(37; CHECK-SAME: ptr [[P:%.*]]) {38; CHECK-NEXT: [[RES:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 839; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)40; CHECK-NEXT: ret ptr [[RES]]41;42 call void @llvm.aarch64.dmb(i32 10)43 %res = getelementptr inbounds i8, ptr %p, i32 844 call void @llvm.aarch64.dmb(i32 10)45 ret ptr %res46}47 48define i32 @simple_safe_intrinsic(i32 %n) #0 {49; CHECK-LABEL: define i32 @simple_safe_intrinsic(50; CHECK-SAME: i32 [[N:%.*]]) {51; CHECK-NEXT: [[RES:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[N]], i1 false)52; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)53; CHECK-NEXT: ret i32 [[RES]]54;55 call void @llvm.aarch64.dmb(i32 10)56 %res = call i32 @llvm.ctlz.i32(i32 %n, i1 false)57 call void @llvm.aarch64.dmb(i32 10)58 ret i32 %res59}60 61define void @simple_unsafe_intrinsic() #0 {62; CHECK-LABEL: define void @simple_unsafe_intrinsic() {63; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)64; CHECK-NEXT: call void @llvm.aarch64.dsb(i32 10)65; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)66; CHECK-NEXT: ret void67;68 call void @llvm.aarch64.dmb(i32 10)69 call void @llvm.aarch64.dsb(i32 10)70 call void @llvm.aarch64.dmb(i32 10)71 ret void72}73 74define void @simple_safe_unsafe_instruction(ptr %p) #0 {75; CHECK-LABEL: define void @simple_safe_unsafe_instruction(76; CHECK-SAME: ptr [[P:%.*]]) {77; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)78; CHECK-NEXT: store i32 42, ptr [[P]], align 479; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)80; CHECK-NEXT: ret void81;82 call void @llvm.aarch64.dmb(i32 10)83 store i32 42, ptr %p84 call void @llvm.aarch64.dmb(i32 10)85 ret void86}87 88define void @simple_safe_unsafe_call(ptr %p) #0 {89; CHECK-LABEL: define void @simple_safe_unsafe_call(90; CHECK-SAME: ptr [[P:%.*]]) {91; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)92; CHECK-NEXT: call void @clobber()93; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)94; CHECK-NEXT: ret void95;96 call void @llvm.aarch64.dmb(i32 10)97 call void @clobber()98 call void @llvm.aarch64.dmb(i32 10)99 ret void100}101 102define void @simple_safe_safe_call(ptr %p) #0 {103; CHECK-LABEL: define void @simple_safe_safe_call(104; CHECK-SAME: ptr [[P:%.*]]) {105; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)106; CHECK-NEXT: ret void107;108 call void @llvm.aarch64.dmb(i32 10)109 call void @pure()110 call void @llvm.aarch64.dmb(i32 10)111 ret void112}113 114define void @multiple_bbs1(i1 %f) #0 {115; CHECK-LABEL: define void @multiple_bbs1(116; CHECK-SAME: i1 [[F:%.*]]) {117; CHECK-NEXT: [[ENTRY:.*:]]118; CHECK-NEXT: br i1 [[F]], label %[[BB_T:.*]], label %[[BB_F:.*]]119; CHECK: [[BB_T]]:120; CHECK-NEXT: br label %[[EXIT:.*]]121; CHECK: [[BB_F]]:122; CHECK-NEXT: br label %[[EXIT]]123; CHECK: [[EXIT]]:124; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)125; CHECK-NEXT: ret void126;127entry:128 br i1 %f, label %bb_t, label %bb_f129bb_t:130 call void @llvm.aarch64.dmb(i32 10)131 br label %exit132bb_f:133 call void @llvm.aarch64.dmb(i32 10)134 br label %exit135exit:136 call void @llvm.aarch64.dmb(i32 10)137 ret void138}139 140define void @multiple_bbs2(i1 %f) #0 {141; CHECK-LABEL: define void @multiple_bbs2(142; CHECK-SAME: i1 [[F:%.*]]) {143; CHECK-NEXT: [[ENTRY:.*:]]144; CHECK-NEXT: br i1 [[F]], label %[[BB_T:.*]], label %[[BB_F:.*]]145; CHECK: [[BB_T]]:146; CHECK-NEXT: br label %[[EXIT:.*]]147; CHECK: [[BB_F]]:148; CHECK-NEXT: br label %[[EXIT]]149; CHECK: [[EXIT]]:150; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)151; CHECK-NEXT: ret void152;153entry:154 br i1 %f, label %bb_t, label %bb_f155bb_t:156 call void @llvm.aarch64.dmb(i32 10)157 br label %exit158bb_f:159 br label %exit160exit:161 call void @llvm.aarch64.dmb(i32 10)162 ret void163}164 165define void @multiple_bbs3(i1 %f, ptr %p) #0 {166; CHECK-LABEL: define void @multiple_bbs3(167; CHECK-SAME: i1 [[F:%.*]], ptr [[P:%.*]]) {168; CHECK-NEXT: [[ENTRY:.*:]]169; CHECK-NEXT: br i1 [[F]], label %[[BB_T:.*]], label %[[BB_F:.*]]170; CHECK: [[BB_T]]:171; CHECK-NEXT: br label %[[EXIT:.*]]172; CHECK: [[BB_F]]:173; CHECK-NEXT: store i32 42, ptr [[P]], align 4174; CHECK-NEXT: br label %[[EXIT]]175; CHECK: [[EXIT]]:176; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)177; CHECK-NEXT: ret void178;179entry:180 br i1 %f, label %bb_t, label %bb_f181bb_t:182 call void @llvm.aarch64.dmb(i32 10)183 br label %exit184bb_f:185 store i32 42, ptr %p186 br label %exit187exit:188 call void @llvm.aarch64.dmb(i32 10)189 ret void190}191 192define void @multiple_bbs_unsafe(i1 %f, ptr %p) #0 {193; CHECK-LABEL: define void @multiple_bbs_unsafe(194; CHECK-SAME: i1 [[F:%.*]], ptr [[P:%.*]]) {195; CHECK-NEXT: [[ENTRY:.*:]]196; CHECK-NEXT: br i1 [[F]], label %[[BB_T:.*]], label %[[BB_F:.*]]197; CHECK: [[BB_T]]:198; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)199; CHECK-NEXT: store i32 42, ptr [[P]], align 4200; CHECK-NEXT: br label %[[EXIT:.*]]201; CHECK: [[BB_F]]:202; CHECK-NEXT: br label %[[EXIT]]203; CHECK: [[EXIT]]:204; CHECK-NEXT: call void @llvm.aarch64.dmb(i32 10)205; CHECK-NEXT: ret void206;207entry:208 br i1 %f, label %bb_t, label %bb_f209bb_t:210 call void @llvm.aarch64.dmb(i32 10)211 store i32 42, ptr %p212 br label %exit213bb_f:214 call void @llvm.aarch64.dmb(i32 10)215 br label %exit216exit:217 call void @llvm.aarch64.dmb(i32 10)218 ret void219}220 221