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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt -S -passes=instcombine < %s | FileCheck %s3 4target triple = "aarch64"5 6define <vscale x 8 x i1> @reinterpret_test_h(<vscale x 8 x i1> %a) {7; CHECK-LABEL: define <vscale x 8 x i1> @reinterpret_test_h8; CHECK-SAME: (<vscale x 8 x i1> [[A:%.*]]) {9; CHECK-NEXT: ret <vscale x 8 x i1> [[A]]10;11 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %a)12 %2 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %1)13 ret <vscale x 8 x i1> %214}15 16; Reinterprets are not redundant because the second reinterpret zeros the17; lanes that don't exist within its input.18define <vscale x 16 x i1> @reinterpret_test_h_rev(<vscale x 16 x i1> %a) {19; CHECK-LABEL: define <vscale x 16 x i1> @reinterpret_test_h_rev20; CHECK-SAME: (<vscale x 16 x i1> [[A:%.*]]) {21; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[A]])22; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP1]])23; CHECK-NEXT: ret <vscale x 16 x i1> [[TMP2]]24;25 %1 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %a)26 %2 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %1)27 ret <vscale x 16 x i1> %228}29 30define <vscale x 4 x i1> @reinterpret_test_w(<vscale x 4 x i1> %a) {31; CHECK-LABEL: define <vscale x 4 x i1> @reinterpret_test_w32; CHECK-SAME: (<vscale x 4 x i1> [[A:%.*]]) {33; CHECK-NEXT: ret <vscale x 4 x i1> [[A]]34;35 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %a)36 %2 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %1)37 ret <vscale x 4 x i1> %238}39 40; Reinterprets are not redundant because the second reinterpret zeros the41; lanes that don't exist within its input.42define <vscale x 16 x i1> @reinterpret_test_w_rev(<vscale x 16 x i1> %a) {43; CHECK-LABEL: define <vscale x 16 x i1> @reinterpret_test_w_rev44; CHECK-SAME: (<vscale x 16 x i1> [[A:%.*]]) {45; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[A]])46; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP1]])47; CHECK-NEXT: ret <vscale x 16 x i1> [[TMP2]]48;49 %1 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %a)50 %2 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %1)51 ret <vscale x 16 x i1> %252}53 54define <vscale x 2 x i1> @reinterpret_test_d(<vscale x 2 x i1> %a) {55; CHECK-LABEL: define <vscale x 2 x i1> @reinterpret_test_d56; CHECK-SAME: (<vscale x 2 x i1> [[A:%.*]]) {57; CHECK-NEXT: ret <vscale x 2 x i1> [[A]]58;59 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)60 %2 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %1)61 ret <vscale x 2 x i1> %262}63 64; Reinterprets are not redundant because the second reinterpret zeros the65; lanes that don't exist within its input.66define <vscale x 16 x i1> @reinterpret_test_d_rev(<vscale x 16 x i1> %a) {67; CHECK-LABEL: define <vscale x 16 x i1> @reinterpret_test_d_rev68; CHECK-SAME: (<vscale x 16 x i1> [[A:%.*]]) {69; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[A]])70; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP1]])71; CHECK-NEXT: ret <vscale x 16 x i1> [[TMP2]]72;73 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %a)74 %2 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %1)75 ret <vscale x 16 x i1> %276}77 78define <vscale x 2 x i1> @reinterpret_test_full_chain(<vscale x 2 x i1> %a) {79; CHECK-LABEL: define <vscale x 2 x i1> @reinterpret_test_full_chain80; CHECK-SAME: (<vscale x 2 x i1> [[A:%.*]]) {81; CHECK-NEXT: ret <vscale x 2 x i1> [[A]]82;83 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)84 %2 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %1)85 %3 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %2)86 %4 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %3)87 %5 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %4)88 %6 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %5)89 ret <vscale x 2 x i1> %690}91 92; The last two reinterprets are not necessary, since they are doing the same93; work as the first two.94define <vscale x 4 x i1> @reinterpret_test_partial_chain(<vscale x 2 x i1> %a) {95; CHECK-LABEL: define <vscale x 4 x i1> @reinterpret_test_partial_chain96; CHECK-SAME: (<vscale x 2 x i1> [[A:%.*]]) {97; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[A]])98; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[TMP1]])99; CHECK-NEXT: ret <vscale x 4 x i1> [[TMP2]]100;101 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)102 %2 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %1)103 %3 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %2)104 %4 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %3)105 ret <vscale x 4 x i1> %4106}107 108; The chain cannot be reduced because of the second reinterpret, which causes109; zeroing.110define <vscale x 8 x i1> @reinterpret_test_irreducible_chain(<vscale x 8 x i1> %a) {111; CHECK-LABEL: define <vscale x 8 x i1> @reinterpret_test_irreducible_chain112; CHECK-SAME: (<vscale x 8 x i1> [[A:%.*]]) {113; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[A]])114; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[TMP1]])115; CHECK-NEXT: [[TMP3:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP2]])116; CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[TMP3]])117; CHECK-NEXT: ret <vscale x 8 x i1> [[TMP4]]118;119 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %a)120 %2 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %1)121 %3 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %2)122 %4 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %3)123 ret <vscale x 8 x i1> %4124}125 126; Here, the candidate list is larger than the number of instructions that we127; end up removing.128define <vscale x 4 x i1> @reinterpret_test_keep_some_candidates(<vscale x 8 x i1> %a) {129; CHECK-LABEL: define <vscale x 4 x i1> @reinterpret_test_keep_some_candidates130; CHECK-SAME: (<vscale x 8 x i1> [[A:%.*]]) {131; CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[A]])132; CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[TMP1]])133; CHECK-NEXT: ret <vscale x 4 x i1> [[TMP2]]134;135 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %a)136 %2 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %1)137 %3 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %2)138 %4 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %3)139 ret <vscale x 4 x i1> %4140}141 142define <vscale x 2 x i1> @reinterpret_reductions(i32 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b, <vscale x 2 x i1> %c) {143; CHECK-LABEL: define <vscale x 2 x i1> @reinterpret_reductions144; CHECK-SAME: (i32 [[COND:%.*]], <vscale x 2 x i1> [[A:%.*]], <vscale x 2 x i1> [[B:%.*]], <vscale x 2 x i1> [[C:%.*]]) {145; CHECK-NEXT: entry:146; CHECK-NEXT: switch i32 [[COND]], label [[BR_PHI_C:%.*]] [147; CHECK-NEXT: i32 43, label [[BR_PHI_A:%.*]]148; CHECK-NEXT: i32 45, label [[BR_PHI_B:%.*]]149; CHECK-NEXT: ]150; CHECK: br_phi_a:151; CHECK-NEXT: br label [[JOIN:%.*]]152; CHECK: br_phi_b:153; CHECK-NEXT: br label [[JOIN]]154; CHECK: br_phi_c:155; CHECK-NEXT: br label [[JOIN]]156; CHECK: join:157; CHECK-NEXT: [[PG1:%.*]] = phi <vscale x 2 x i1> [ [[A]], [[BR_PHI_A]] ], [ [[B]], [[BR_PHI_B]] ], [ [[C]], [[BR_PHI_C]] ]158; CHECK-NEXT: ret <vscale x 2 x i1> [[PG1]]159;160 161entry:162 switch i32 %cond, label %br_phi_c [163 i32 43, label %br_phi_a164 i32 45, label %br_phi_b165 ]166 167br_phi_a:168 %a1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)169 br label %join170 171br_phi_b:172 %b1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %b)173 br label %join174 175br_phi_c:176 %c1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %c)177 br label %join178 179join:180 %pg = phi <vscale x 16 x i1> [ %a1, %br_phi_a ], [ %b1, %br_phi_b ], [ %c1, %br_phi_c ]181 %pg1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)182 ret <vscale x 2 x i1> %pg1183}184 185; No transform as the reinterprets are converting from different types (nxv2i1 & nxv4i1)186; As the incoming values to the phi must all be the same type, we cannot remove the reinterprets.187define <vscale x 2 x i1> @reinterpret_reductions_1(i32 %cond, <vscale x 2 x i1> %a, <vscale x 4 x i1> %b, <vscale x 2 x i1> %c) {188; CHECK-LABEL: define <vscale x 2 x i1> @reinterpret_reductions_1189; CHECK-SAME: (i32 [[COND:%.*]], <vscale x 2 x i1> [[A:%.*]], <vscale x 4 x i1> [[B:%.*]], <vscale x 2 x i1> [[C:%.*]]) {190; CHECK-NEXT: entry:191; CHECK-NEXT: switch i32 [[COND]], label [[BR_PHI_C:%.*]] [192; CHECK-NEXT: i32 43, label [[BR_PHI_A:%.*]]193; CHECK-NEXT: i32 45, label [[BR_PHI_B:%.*]]194; CHECK-NEXT: ]195; CHECK: br_phi_a:196; CHECK-NEXT: [[A1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[A]])197; CHECK-NEXT: br label [[JOIN:%.*]]198; CHECK: br_phi_b:199; CHECK-NEXT: [[B1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[B]])200; CHECK-NEXT: br label [[JOIN]]201; CHECK: br_phi_c:202; CHECK-NEXT: [[C1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[C]])203; CHECK-NEXT: br label [[JOIN]]204; CHECK: join:205; CHECK-NEXT: [[PG:%.*]] = phi <vscale x 16 x i1> [ [[A1]], [[BR_PHI_A]] ], [ [[B1]], [[BR_PHI_B]] ], [ [[C1]], [[BR_PHI_C]] ]206; CHECK-NEXT: [[PG1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])207; CHECK-NEXT: ret <vscale x 2 x i1> [[PG1]]208;209 210entry:211 switch i32 %cond, label %br_phi_c [212 i32 43, label %br_phi_a213 i32 45, label %br_phi_b214 ]215 216br_phi_a:217 %a1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)218 br label %join219 220br_phi_b:221 %b1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %b)222 br label %join223 224br_phi_c:225 %c1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %c)226 br label %join227 228join:229 %pg = phi <vscale x 16 x i1> [ %a1, %br_phi_a ], [ %b1, %br_phi_b ], [ %c1, %br_phi_c ]230 %pg1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)231 ret <vscale x 2 x i1> %pg1232}233 234; No transform. Similar to the the test above, but here only two of the arguments need to235; be converted to svbool.236define <vscale x 2 x i1> @reinterpret_reductions_2(i32 %cond, <vscale x 2 x i1> %a, <vscale x 16 x i1> %b, <vscale x 2 x i1> %c) {237; CHECK-LABEL: define <vscale x 2 x i1> @reinterpret_reductions_2238; CHECK-SAME: (i32 [[COND:%.*]], <vscale x 2 x i1> [[A:%.*]], <vscale x 16 x i1> [[B:%.*]], <vscale x 2 x i1> [[C:%.*]]) {239; CHECK-NEXT: entry:240; CHECK-NEXT: switch i32 [[COND]], label [[BR_PHI_C:%.*]] [241; CHECK-NEXT: i32 43, label [[BR_PHI_A:%.*]]242; CHECK-NEXT: i32 45, label [[BR_PHI_B:%.*]]243; CHECK-NEXT: ]244; CHECK: br_phi_a:245; CHECK-NEXT: [[A1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[A]])246; CHECK-NEXT: br label [[JOIN:%.*]]247; CHECK: br_phi_b:248; CHECK-NEXT: br label [[JOIN]]249; CHECK: br_phi_c:250; CHECK-NEXT: [[C1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[C]])251; CHECK-NEXT: br label [[JOIN]]252; CHECK: join:253; CHECK-NEXT: [[PG:%.*]] = phi <vscale x 16 x i1> [ [[A1]], [[BR_PHI_A]] ], [ [[B]], [[BR_PHI_B]] ], [ [[C1]], [[BR_PHI_C]] ]254; CHECK-NEXT: [[PG1:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG]])255; CHECK-NEXT: ret <vscale x 2 x i1> [[PG1]]256;257 258entry:259 switch i32 %cond, label %br_phi_c [260 i32 43, label %br_phi_a261 i32 45, label %br_phi_b262 ]263 264br_phi_a:265 %a1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)266 br label %join267 268br_phi_b:269 br label %join270 271br_phi_c:272 %c1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %c)273 br label %join274 275join:276 %pg = phi <vscale x 16 x i1> [ %a1, %br_phi_a ], [ %b, %br_phi_b ], [ %c1, %br_phi_c ]277 %pg1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)278 ret <vscale x 2 x i1> %pg1279}280 281; Similar to reinterpret_reductions but the reinterprets remain because the282; original phi cannot be removed (i.e. prefer reinterprets over multiple phis).283define <vscale x 16 x i1> @reinterpret_reductions3(i32 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b, <vscale x 2 x i1> %c) {284; CHECK-LABEL: define <vscale x 16 x i1> @reinterpret_reductions3285; CHECK-SAME: (i32 [[COND:%.*]], <vscale x 2 x i1> [[A:%.*]], <vscale x 2 x i1> [[B:%.*]], <vscale x 2 x i1> [[C:%.*]]) {286; CHECK-NEXT: entry:287; CHECK-NEXT: switch i32 [[COND]], label [[BR_PHI_C:%.*]] [288; CHECK-NEXT: i32 43, label [[BR_PHI_A:%.*]]289; CHECK-NEXT: i32 45, label [[BR_PHI_B:%.*]]290; CHECK-NEXT: ]291; CHECK: br_phi_a:292; CHECK-NEXT: [[A1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[A]])293; CHECK-NEXT: br label [[JOIN:%.*]]294; CHECK: br_phi_b:295; CHECK-NEXT: [[B1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[B]])296; CHECK-NEXT: br label [[JOIN]]297; CHECK: br_phi_c:298; CHECK-NEXT: [[C1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[C]])299; CHECK-NEXT: br label [[JOIN]]300; CHECK: join:301; CHECK-NEXT: [[PG:%.*]] = phi <vscale x 16 x i1> [ [[A1]], [[BR_PHI_A]] ], [ [[B1]], [[BR_PHI_B]] ], [ [[C1]], [[BR_PHI_C]] ]302; CHECK-NEXT: ret <vscale x 16 x i1> [[PG]]303;304 305entry:306 switch i32 %cond, label %br_phi_c [307 i32 43, label %br_phi_a308 i32 45, label %br_phi_b309 ]310 311br_phi_a:312 %a1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %a)313 br label %join314 315br_phi_b:316 %b1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %b)317 br label %join318 319br_phi_c:320 %c1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %c)321 br label %join322 323join:324 %pg = phi <vscale x 16 x i1> [ %a1, %br_phi_a ], [ %b1, %br_phi_b ], [ %c1, %br_phi_c ]325 %pg1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)326 ret <vscale x 16 x i1> %pg327}328 329define void @phi_insert_point(<vscale x 4 x i1> %arg, ptr %p) {330; CHECK-LABEL: define void @phi_insert_point331; CHECK-SAME: (<vscale x 4 x i1> [[ARG:%.*]], ptr [[P:%.*]]) {332; CHECK-NEXT: entry:333; CHECK-NEXT: br label [[FOR_BODY:%.*]]334; CHECK: for.body:335; CHECK-NEXT: [[CONVERT:%.*]] = phi <vscale x 4 x i1> [ [[ARG]], [[ENTRY:%.*]] ], [ zeroinitializer, [[FOR_BODY]] ]336; CHECK-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IDX_NEXT:%.*]], [[FOR_BODY]] ]337; CHECK-NEXT: [[IDX_EXT:%.*]] = ashr i64 [[IDX]], 1338; CHECK-NEXT: store <vscale x 4 x i1> [[CONVERT]], ptr [[P]], align 1339; CHECK-NEXT: [[IDX_NEXT]] = or i64 [[IDX_EXT]], 1340; CHECK-NEXT: br label [[FOR_BODY]]341;342entry:343 %init = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %arg)344 br label %for.body345 346for.body:347 %phi = phi <vscale x 16 x i1> [ %init, %entry ], [ %phi.next, %for.body ]348 %idx = phi i64 [ 0, %entry ], [ %idx.next, %for.body ]349 %idx.ext = ashr i64 %idx, 1350 %convert = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %phi)351 store <vscale x 4 x i1> %convert, ptr %p352 %idx.next = or i64 %idx.ext, 1353 %phi.next = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> zeroinitializer)354 br label %for.body355}356 357declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1>)358declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1>)359declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1>)360declare <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1>)361declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1>)362declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)363 364attributes #0 = { "target-features"="+sve" }365