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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=instcombine < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define <vscale x 2 x i1> @whilelo_nxv2i1.i32(i32 %a, i32 %b) {7; CHECK-LABEL: define <vscale x 2 x i1> @whilelo_nxv2i1.i32(8; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {9; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32 [[A]], i32 [[B]])10; CHECK-NEXT: ret <vscale x 2 x i1> [[MASK]]11;12 %mask = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 %a, i32 %b)13 ret <vscale x 2 x i1> %mask14}15 16define <vscale x 4 x i1> @whilelo_nxv4i1.i32(i32 %a, i32 %b) {17; CHECK-LABEL: define <vscale x 4 x i1> @whilelo_nxv4i1.i32(18; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {19; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 [[A]], i32 [[B]])20; CHECK-NEXT: ret <vscale x 4 x i1> [[MASK]]21;22 %mask = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 %a, i32 %b)23 ret <vscale x 4 x i1> %mask24}25 26define <vscale x 8 x i1> @whilelo_nxv8i1.i32(i32 %a, i32 %b) {27; CHECK-LABEL: define <vscale x 8 x i1> @whilelo_nxv8i1.i32(28; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {29; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i32(i32 [[A]], i32 [[B]])30; CHECK-NEXT: ret <vscale x 8 x i1> [[MASK]]31;32 %mask = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 %a, i32 %b)33 ret <vscale x 8 x i1> %mask34}35 36define <vscale x 16 x i1> @whilelo_nxv16i1.i32(i32 %a, i32 %b) {37; CHECK-LABEL: define <vscale x 16 x i1> @whilelo_nxv16i1.i32(38; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {39; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i32(i32 [[A]], i32 [[B]])40; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]41;42 %mask = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 %a, i32 %b)43 ret <vscale x 16 x i1> %mask44}45 46define <vscale x 2 x i1> @whilelo_nxv2i1.i64(i64 %a, i64 %b) {47; CHECK-LABEL: define <vscale x 2 x i1> @whilelo_nxv2i1.i64(48; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {49; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[A]], i64 [[B]])50; CHECK-NEXT: ret <vscale x 2 x i1> [[MASK]]51;52 %mask = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 %a, i64 %b)53 ret <vscale x 2 x i1> %mask54}55 56define <vscale x 4 x i1> @whilelo_nxv4i1.i64(i64 %a, i64 %b) {57; CHECK-LABEL: define <vscale x 4 x i1> @whilelo_nxv4i1.i64(58; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {59; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 [[A]], i64 [[B]])60; CHECK-NEXT: ret <vscale x 4 x i1> [[MASK]]61;62 %mask = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 %a, i64 %b)63 ret <vscale x 4 x i1> %mask64}65 66define <vscale x 8 x i1> @whilelo_nxv8i1.i64(i64 %a, i64 %b) {67; CHECK-LABEL: define <vscale x 8 x i1> @whilelo_nxv8i1.i64(68; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {69; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 8 x i1> @llvm.get.active.lane.mask.nxv8i1.i64(i64 [[A]], i64 [[B]])70; CHECK-NEXT: ret <vscale x 8 x i1> [[MASK]]71;72 %mask = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 %a, i64 %b)73 ret <vscale x 8 x i1> %mask74}75 76define <vscale x 16 x i1> @whilelo_nxv16i1.i64(i64 %a, i64 %b) {77; CHECK-LABEL: define <vscale x 16 x i1> @whilelo_nxv16i1.i64(78; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {79; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 [[A]], i64 [[B]])80; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]81;82 %mask = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 %a, i64 %b)83 ret <vscale x 16 x i1> %mask84}85 86define <vscale x 16 x i1> @whilelo_nxv16i1.i64_const() {87; CHECK-LABEL: define <vscale x 16 x i1> @whilelo_nxv16i1.i64_const() {88; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 16)89; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]90;91 %mask = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 0, i64 16)92 ret <vscale x 16 x i1> %mask93}94 95define <vscale x 16 x i1> @whilelo_nxv16i1.i32_const() {96; CHECK-LABEL: define <vscale x 16 x i1> @whilelo_nxv16i1.i32_const() {97; CHECK-NEXT: [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i32(i32 0, i32 16)98; CHECK-NEXT: ret <vscale x 16 x i1> [[MASK]]99;100 %mask = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 0, i32 16)101 ret <vscale x 16 x i1> %mask102}103