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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=instcombine -S -o - %s | FileCheck %s3; REQUIRES: amdgpu-registered-target4 5target triple = "amdgcn-amd-amdhsa"6 7%anon = type { i32, [8 x ptr], ptr }8 9define void @foo(ptr addrspace(4) byref(%anon) align 8 %0) {10; CHECK-LABEL: @foo(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr addrspace(4) [[TMP0:%.*]], align 813; CHECK-NEXT: br label [[FOR_COND10:%.*]]14; CHECK: for.cond10:15; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 816; CHECK-NEXT: store i64 [[TMP2]], ptr addrspace(1) null, align 817; CHECK-NEXT: br label [[FOR_COND10]]18;19entry:20 %coerce = alloca %anon, addrspace(5)21 call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) %coerce, ptr addrspace(4) %0, i64 0, i1 false)22 %asc = addrspacecast ptr addrspace(5) %coerce to ptr23 %load = load ptr, ptr addrspace(5) %coerce24 %retval.0.i = select i1 false, ptr %asc, ptr %load25 br label %for.cond1026 27for.cond10: ; preds = %for.cond10, %entry28 %load.0 = load i64, ptr %retval.0.i29 store i64 %load.0, ptr addrspace(1) null30 br label %for.cond1031}32 33declare void @llvm.memcpy.p5.p4.i64(ptr addrspace(5), ptr addrspace(4), i64, i1 immarg)34