53 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=instcombine < %s | FileCheck %s3; ARM AES intrinsic variants4 5define <16 x i8> @combineXorAeseZeroARM(<16 x i8> %data, <16 x i8> %key) {6; CHECK-LABEL: define <16 x i8> @combineXorAeseZeroARM(7; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {8; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> [[DATA]], <16 x i8> [[KEY]])9; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]10;11 %data.xor = xor <16 x i8> %data, %key12 %data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> zeroinitializer)13 ret <16 x i8> %data.aes14}15 16define <16 x i8> @combineXorAeseNonZeroARM(<16 x i8> %data, <16 x i8> %key) {17; CHECK-LABEL: define <16 x i8> @combineXorAeseNonZeroARM(18; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {19; CHECK-NEXT: [[DATA_XOR:%.*]] = xor <16 x i8> [[DATA]], [[KEY]]20; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> [[DATA_XOR]], <16 x i8> splat (i8 -1))21; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]22;23 %data.xor = xor <16 x i8> %data, %key24 %data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)25 ret <16 x i8> %data.aes26}27 28define <16 x i8> @combineXorAesdZeroARM(<16 x i8> %data, <16 x i8> %key) {29; CHECK-LABEL: define <16 x i8> @combineXorAesdZeroARM(30; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {31; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> [[DATA]], <16 x i8> [[KEY]])32; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]33;34 %data.xor = xor <16 x i8> %data, %key35 %data.aes = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %data.xor, <16 x i8> zeroinitializer)36 ret <16 x i8> %data.aes37}38 39define <16 x i8> @combineXorAesdNonZeroARM(<16 x i8> %data, <16 x i8> %key) {40; CHECK-LABEL: define <16 x i8> @combineXorAesdNonZeroARM(41; CHECK-SAME: <16 x i8> [[DATA:%.*]], <16 x i8> [[KEY:%.*]]) {42; CHECK-NEXT: [[DATA_XOR:%.*]] = xor <16 x i8> [[DATA]], [[KEY]]43; CHECK-NEXT: [[DATA_AES:%.*]] = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> [[DATA_XOR]], <16 x i8> splat (i8 -1))44; CHECK-NEXT: ret <16 x i8> [[DATA_AES]]45;46 %data.xor = xor <16 x i8> %data, %key47 %data.aes = tail call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %data.xor, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)48 ret <16 x i8> %data.aes49}50 51declare <16 x i8> @llvm.arm.neon.aese(<16 x i8>, <16 x i8>) #052declare <16 x i8> @llvm.arm.neon.aesd(<16 x i8>, <16 x i8>) #053