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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"4 5define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) {6; CHECK-LABEL: @test_round_sd(7; CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> [[A:%.*]], <2 x double> [[B:%.*]], i32 10)8; CHECK-NEXT:    ret <2 x double> [[TMP1]]9;10  %1 = insertelement <2 x double> %a, double 1.000000e+00, i32 011  %2 = insertelement <2 x double> %b, double 2.000000e+00, i32 112  %3 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %2, i32 10)13  ret <2 x double> %314}15 16define double @test_round_sd_0(double %a, double %b) {17; CHECK-LABEL: @test_round_sd_0(18; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 019; CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10)20; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 021; CHECK-NEXT:    ret double [[TMP3]]22;23  %1 = insertelement <2 x double> undef, double %a, i32 024  %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 125  %3 = insertelement <2 x double> undef, double %b, i32 026  %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 127  %5 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %2, <2 x double> %4, i32 10)28  %6 = extractelement <2 x double> %5, i32 029  ret double %630}31 32define double @test_round_sd_1(double %a, double %b) {33; CHECK-LABEL: @test_round_sd_1(34; CHECK-NEXT:    ret double 1.000000e+0035;36  %1 = insertelement <2 x double> undef, double %a, i32 037  %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 138  %3 = insertelement <2 x double> undef, double %b, i32 039  %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 140  %5 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %2, <2 x double> %4, i32 10)41  %6 = extractelement <2 x double> %5, i32 142  ret double %643}44 45define double @test_round_sd_2(double %a) {46; CHECK-LABEL: @test_round_sd_2(47; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 048; CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10)49; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 050; CHECK-NEXT:    ret double [[TMP3]]51;52  %1 = insertelement <2 x double> zeroinitializer, double %a, i32 053  %2 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %1, i32 10)54  %3 = extractelement <2 x double> %2, i32 055  ret double %356}57 58define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) {59; CHECK-LABEL: @test_round_ss(60; CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float poison, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> [[B:%.*]], i32 10)61; CHECK-NEXT:    ret <4 x float> [[TMP1]]62;63  %1 = insertelement <4 x float> %a, float 1.000000e+00, i32 164  %2 = insertelement <4 x float> %1, float 2.000000e+00, i32 265  %3 = insertelement <4 x float> %2, float 3.000000e+00, i32 366  %4 = insertelement <4 x float> %b, float 1.000000e+00, i32 167  %5 = insertelement <4 x float> %4, float 2.000000e+00, i32 268  %6 = insertelement <4 x float> %5, float 3.000000e+00, i32 369  %7 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %3, <4 x float> %6, i32 10)70  ret <4 x float> %771}72 73define float @test_round_ss_0(float %a, float %b) {74; CHECK-LABEL: @test_round_ss_0(75; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 076; CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10)77; CHECK-NEXT:    [[R:%.*]] = extractelement <4 x float> [[TMP2]], i64 078; CHECK-NEXT:    ret float [[R]]79;80  %1 = insertelement <4 x float> undef, float %a, i32 081  %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 182  %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 283  %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 384  %5 = insertelement <4 x float> undef, float %b, i32 085  %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 186  %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 287  %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 388  %9 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %4, <4 x float> %8, i32 10)89  %r = extractelement <4 x float> %9, i32 090  ret float %r91}92 93define float @test_round_ss_2(float %a, float %b) {94; CHECK-LABEL: @test_round_ss_2(95; CHECK-NEXT:    ret float 2.000000e+0096;97  %1 = insertelement <4 x float> undef, float %a, i32 098  %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 199  %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2100  %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3101  %5 = insertelement <4 x float> undef, float %b, i32 0102  %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1103  %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2104  %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3105  %9 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %4, <4 x float> %8, i32 10)106  %r = extractelement <4 x float> %9, i32 2107  ret float %r108}109 110define float @test_round_ss_3(float %a) {111; CHECK-LABEL: @test_round_ss_3(112; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0113; CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10)114; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0115; CHECK-NEXT:    ret float [[TMP3]]116;117  %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0118  %2 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %1, <4 x float> %1, i32 10)119  %3 = extractelement <4 x float> %2, i32 0120  ret float %3121}122 123declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone124declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone125