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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s3 4;5; vXi646;7 8define <2 x i64> @shuffle_vpermv3_v2i64(<2 x i64> %x0, <2 x i64> %x1) {9; CHECK-LABEL: define <2 x i64> @shuffle_vpermv3_v2i64(10; CHECK-SAME: <2 x i64> [[X0:%.*]], <2 x i64> [[X1:%.*]]) {11; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i64> [[X0]], <2 x i64> [[X1]], <2 x i32> <i32 2, i32 0>12; CHECK-NEXT: ret <2 x i64> [[R]]13;14 %r = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> %x0, <2 x i64> <i64 2, i64 0>, <2 x i64> %x1)15 ret <2 x i64> %r16}17 18define <2 x i64> @shuffle_vpermv3_v2i64_unary(<2 x i64> %x0) {19; CHECK-LABEL: define <2 x i64> @shuffle_vpermv3_v2i64_unary(20; CHECK-SAME: <2 x i64> [[X0:%.*]]) {21; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x i64> [[X0]], <2 x i64> poison, <2 x i32> zeroinitializer22; CHECK-NEXT: ret <2 x i64> [[R]]23;24 %r = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> %x0, <2 x i64> <i64 2, i64 0>, <2 x i64> %x0)25 ret <2 x i64> %r26}27 28define <2 x i64> @shuffle_vpermv3_v2i64_demandedbits(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %m) {29; CHECK-LABEL: define <2 x i64> @shuffle_vpermv3_v2i64_demandedbits(30; CHECK-SAME: <2 x i64> [[X0:%.*]], <2 x i64> [[X1:%.*]], <2 x i64> [[M:%.*]]) {31; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> [[X0]], <2 x i64> [[M]], <2 x i64> [[X1]])32; CHECK-NEXT: ret <2 x i64> [[R]]33;34 %t = or <2 x i64> %m, <i64 0, i64 4>35 %r = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> %x0, <2 x i64> %t, <2 x i64> %x1)36 ret <2 x i64> %r37}38 39define <2 x i64> @shuffle_vpermv3_v2i64_demandedbits_negative(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %m) {40; CHECK-LABEL: define <2 x i64> @shuffle_vpermv3_v2i64_demandedbits_negative(41; CHECK-SAME: <2 x i64> [[X0:%.*]], <2 x i64> [[X1:%.*]], <2 x i64> [[M:%.*]]) {42; CHECK-NEXT: [[T:%.*]] = or <2 x i64> [[M]], <i64 0, i64 2>43; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> [[X0]], <2 x i64> [[T]], <2 x i64> [[X1]])44; CHECK-NEXT: ret <2 x i64> [[R]]45;46 %t = or <2 x i64> %m, <i64 0, i64 2>47 %r = call <2 x i64> @llvm.x86.avx512.vpermi2var.q.128(<2 x i64> %x0, <2 x i64> %t, <2 x i64> %x1)48 ret <2 x i64> %r49}50 51define <4 x i64> @shuffle_vpermv3_v4i64(<4 x i64> %x0, <4 x i64> %x1) {52; CHECK-LABEL: define <4 x i64> @shuffle_vpermv3_v4i64(53; CHECK-SAME: <4 x i64> [[X0:%.*]], <4 x i64> [[X1:%.*]]) {54; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i64> [[X0]], <4 x i64> [[X1]], <4 x i32> <i32 7, i32 2, i32 6, i32 0>55; CHECK-NEXT: ret <4 x i64> [[R]]56;57 %r = call <4 x i64> @llvm.x86.avx512.vpermi2var.q.256(<4 x i64> %x0, <4 x i64> <i64 7, i64 2, i64 6, i64 0>, <4 x i64> %x1)58 ret <4 x i64> %r59}60 61define <4 x i64> @shuffle_vpermv3_v4i64_unary(<4 x i64> %x0) {62; CHECK-LABEL: define <4 x i64> @shuffle_vpermv3_v4i64_unary(63; CHECK-SAME: <4 x i64> [[X0:%.*]]) {64; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i64> [[X0]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 2, i32 0>65; CHECK-NEXT: ret <4 x i64> [[R]]66;67 %r = call <4 x i64> @llvm.x86.avx512.vpermi2var.q.256(<4 x i64> %x0, <4 x i64> <i64 7, i64 2, i64 6, i64 0>, <4 x i64> %x0)68 ret <4 x i64> %r69}70 71define <4 x i64> @shuffle_vpermv3_v4i64_demandedbits(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %m) {72; CHECK-LABEL: define <4 x i64> @shuffle_vpermv3_v4i64_demandedbits(73; CHECK-SAME: <4 x i64> [[X0:%.*]], <4 x i64> [[X1:%.*]], <4 x i64> [[M:%.*]]) {74; CHECK-NEXT: [[R:%.*]] = call <4 x i64> @llvm.x86.avx512.vpermi2var.q.256(<4 x i64> [[X0]], <4 x i64> [[M]], <4 x i64> [[X1]])75; CHECK-NEXT: ret <4 x i64> [[R]]76;77 %t = or <4 x i64> %m, <i64 0, i64 8, i64 16, i64 32>78 %r = call <4 x i64> @llvm.x86.avx512.vpermi2var.q.256(<4 x i64> %x0, <4 x i64> %t, <4 x i64> %x1)79 ret <4 x i64> %r80}81 82define <8 x i64> @shuffle_vpermv3_v8i64(<8 x i64> %x0, <8 x i64> %x1) {83; CHECK-LABEL: define <8 x i64> @shuffle_vpermv3_v8i64(84; CHECK-SAME: <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]]) {85; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i64> [[X0]], <8 x i64> [[X1]], <8 x i32> <i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>86; CHECK-NEXT: ret <8 x i64> [[R]]87;88 %r = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> <i64 8, i64 6, i64 10, i64 4, i64 12, i64 2, i64 14, i64 0>, <8 x i64> %x1)89 ret <8 x i64> %r90}91 92define <8 x i64> @shuffle_vpermv3_v8i64_unary(<8 x i64> %x0) {93; CHECK-LABEL: define <8 x i64> @shuffle_vpermv3_v8i64_unary(94; CHECK-SAME: <8 x i64> [[X0:%.*]]) {95; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i64> [[X0]], <8 x i64> poison, <8 x i32> <i32 0, i32 6, i32 2, i32 4, i32 4, i32 2, i32 6, i32 0>96; CHECK-NEXT: ret <8 x i64> [[R]]97;98 %r = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> <i64 8, i64 6, i64 10, i64 4, i64 12, i64 2, i64 14, i64 0>, <8 x i64> %x0)99 ret <8 x i64> %r100}101 102define <8 x i64> @shuffle_vpermv3_v8i64_demandedbits(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %m) {103; CHECK-LABEL: define <8 x i64> @shuffle_vpermv3_v8i64_demandedbits(104; CHECK-SAME: <8 x i64> [[X0:%.*]], <8 x i64> [[X1:%.*]], <8 x i64> [[M:%.*]]) {105; CHECK-NEXT: [[R:%.*]] = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> [[X0]], <8 x i64> [[M]], <8 x i64> [[X1]])106; CHECK-NEXT: ret <8 x i64> [[R]]107;108 %t = or <8 x i64> %m, <i64 0, i64 16, i64 32, i64 64, i64 256, i64 512, i64 1024, i64 -16>109 %r = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %t, <8 x i64> %x1)110 ret <8 x i64> %r111}112 113;114; vXi32115;116 117define <4 x i32> @shuffle_vpermv3_v4i32(<4 x i32> %x0, <4 x i32> %x1) {118; CHECK-LABEL: define <4 x i32> @shuffle_vpermv3_v4i32(119; CHECK-SAME: <4 x i32> [[X0:%.*]], <4 x i32> [[X1:%.*]]) {120; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[X0]], <4 x i32> [[X1]], <4 x i32> <i32 7, i32 2, i32 6, i32 0>121; CHECK-NEXT: ret <4 x i32> [[R]]122;123 %r = call <4 x i32> @llvm.x86.avx512.vpermi2var.d.128(<4 x i32> %x0, <4 x i32> <i32 7, i32 2, i32 6, i32 0>, <4 x i32> %x1)124 ret <4 x i32> %r125}126 127define <4 x i32> @shuffle_vpermv3_v4i32_unary(<4 x i32> %x0) {128; CHECK-LABEL: define <4 x i32> @shuffle_vpermv3_v4i32_unary(129; CHECK-SAME: <4 x i32> [[X0:%.*]]) {130; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[X0]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 2, i32 0>131; CHECK-NEXT: ret <4 x i32> [[R]]132;133 %r = call <4 x i32> @llvm.x86.avx512.vpermi2var.d.128(<4 x i32> %x0, <4 x i32> <i32 7, i32 2, i32 6, i32 0>, <4 x i32> %x0)134 ret <4 x i32> %r135}136 137define <4 x i32> @shuffle_vpermv3_v4i32_demandedbits(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %m) {138; CHECK-LABEL: define <4 x i32> @shuffle_vpermv3_v4i32_demandedbits(139; CHECK-SAME: <4 x i32> [[X0:%.*]], <4 x i32> [[X1:%.*]], <4 x i32> [[M:%.*]]) {140; CHECK-NEXT: [[R:%.*]] = call <4 x i32> @llvm.x86.avx512.vpermi2var.d.128(<4 x i32> [[X0]], <4 x i32> [[M]], <4 x i32> [[X1]])141; CHECK-NEXT: ret <4 x i32> [[R]]142;143 %t = or <4 x i32> %m, <i32 0, i32 8, i32 16, i32 32>144 %r = call <4 x i32> @llvm.x86.avx512.vpermi2var.d.128(<4 x i32> %x0, <4 x i32> %t, <4 x i32> %x1)145 ret <4 x i32> %r146}147 148define <8 x i32> @shuffle_vpermv3_v8i32(<8 x i32> %x0, <8 x i32> %x1) {149; CHECK-LABEL: define <8 x i32> @shuffle_vpermv3_v8i32(150; CHECK-SAME: <8 x i32> [[X0:%.*]], <8 x i32> [[X1:%.*]]) {151; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i32> [[X0]], <8 x i32> [[X1]], <8 x i32> <i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>152; CHECK-NEXT: ret <8 x i32> [[R]]153;154 %r = call <8 x i32> @llvm.x86.avx512.vpermi2var.d.256(<8 x i32> %x0, <8 x i32> <i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>, <8 x i32> %x1)155 ret <8 x i32> %r156}157 158define <8 x i32> @shuffle_vpermv3_v8i32_unary(<8 x i32> %x0) {159; CHECK-LABEL: define <8 x i32> @shuffle_vpermv3_v8i32_unary(160; CHECK-SAME: <8 x i32> [[X0:%.*]]) {161; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i32> [[X0]], <8 x i32> poison, <8 x i32> <i32 0, i32 6, i32 2, i32 4, i32 4, i32 2, i32 6, i32 0>162; CHECK-NEXT: ret <8 x i32> [[R]]163;164 %r = call <8 x i32> @llvm.x86.avx512.vpermi2var.d.256(<8 x i32> %x0, <8 x i32> <i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>, <8 x i32> %x0)165 ret <8 x i32> %r166}167 168define <8 x i32> @shuffle_vpermv3_v8i32_demandedbits(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %m) {169; CHECK-LABEL: define <8 x i32> @shuffle_vpermv3_v8i32_demandedbits(170; CHECK-SAME: <8 x i32> [[X0:%.*]], <8 x i32> [[X1:%.*]], <8 x i32> [[M:%.*]]) {171; CHECK-NEXT: [[R:%.*]] = call <8 x i32> @llvm.x86.avx512.vpermi2var.d.256(<8 x i32> [[X0]], <8 x i32> [[M]], <8 x i32> [[X1]])172; CHECK-NEXT: ret <8 x i32> [[R]]173;174 %t = or <8 x i32> %m, <i32 0, i32 16, i32 32, i32 64, i32 256, i32 512, i32 -16, i32 -32>175 %r = call <8 x i32> @llvm.x86.avx512.vpermi2var.d.256(<8 x i32> %x0, <8 x i32> %t, <8 x i32> %x1)176 ret <8 x i32> %r177}178 179define <16 x i32> @shuffle_vpermv3_v16i32(<16 x i32> %x0, <16 x i32> %x1) {180; CHECK-LABEL: define <16 x i32> @shuffle_vpermv3_v16i32(181; CHECK-SAME: <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]]) {182; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i32> [[X0]], <16 x i32> [[X1]], <16 x i32> <i32 16, i32 14, i32 18, i32 12, i32 20, i32 10, i32 22, i32 8, i32 24, i32 6, i32 26, i32 4, i32 28, i32 2, i32 30, i32 0>183; CHECK-NEXT: ret <16 x i32> [[R]]184;185 %r = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> <i32 16, i32 14, i32 18, i32 12, i32 20, i32 10, i32 22, i32 8, i32 24, i32 6, i32 26, i32 4, i32 28, i32 2, i32 30, i32 0>, <16 x i32> %x1)186 ret <16 x i32> %r187}188 189define <16 x i32> @shuffle_vpermv3_v16i32_unary(<16 x i32> %x0) {190; CHECK-LABEL: define <16 x i32> @shuffle_vpermv3_v16i32_unary(191; CHECK-SAME: <16 x i32> [[X0:%.*]]) {192; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i32> [[X0]], <16 x i32> poison, <16 x i32> <i32 0, i32 14, i32 2, i32 12, i32 4, i32 10, i32 6, i32 8, i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>193; CHECK-NEXT: ret <16 x i32> [[R]]194;195 %r = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> <i32 16, i32 14, i32 18, i32 12, i32 20, i32 10, i32 22, i32 8, i32 24, i32 6, i32 26, i32 4, i32 28, i32 2, i32 30, i32 0>, <16 x i32> %x0)196 ret <16 x i32> %r197}198 199define <16 x i32> @shuffle_vpermv3_v16i32_demandedbits(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %m) {200; CHECK-LABEL: define <16 x i32> @shuffle_vpermv3_v16i32_demandedbits(201; CHECK-SAME: <16 x i32> [[X0:%.*]], <16 x i32> [[X1:%.*]], <16 x i32> [[M:%.*]]) {202; CHECK-NEXT: [[R:%.*]] = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> [[X0]], <16 x i32> [[M]], <16 x i32> [[X1]])203; CHECK-NEXT: ret <16 x i32> [[R]]204;205 %t = or <16 x i32> %m, <i32 0, i32 32, i32 64, i32 256, i32 512, i32 1024, i32 2048, i32 4096, i32 8192, i32 -32, i32 -64, i32 -128, i32 -256, i32 -512, i32 -1024, i32 -2048>206 %r = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %t, <16 x i32> %x1)207 ret <16 x i32> %r208}209 210;211; vXi16212;213 214define <8 x i16> @shuffle_vpermv3_v8i16(<8 x i16> %x0, <8 x i16> %x1) {215; CHECK-LABEL: define <8 x i16> @shuffle_vpermv3_v8i16(216; CHECK-SAME: <8 x i16> [[X0:%.*]], <8 x i16> [[X1:%.*]]) {217; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[X0]], <8 x i16> [[X1]], <8 x i32> <i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>218; CHECK-NEXT: ret <8 x i16> [[R]]219;220 %r = call <8 x i16> @llvm.x86.avx512.vpermi2var.hi.128(<8 x i16> %x0, <8 x i16> <i16 8, i16 6, i16 10, i16 4, i16 12, i16 2, i16 14, i16 0>, <8 x i16> %x1)221 ret <8 x i16> %r222}223 224define <8 x i16> @shuffle_vpermv3_v8i16_unary(<8 x i16> %x0) {225; CHECK-LABEL: define <8 x i16> @shuffle_vpermv3_v8i16_unary(226; CHECK-SAME: <8 x i16> [[X0:%.*]]) {227; CHECK-NEXT: [[R:%.*]] = shufflevector <8 x i16> [[X0]], <8 x i16> poison, <8 x i32> <i32 0, i32 6, i32 2, i32 4, i32 4, i32 2, i32 6, i32 0>228; CHECK-NEXT: ret <8 x i16> [[R]]229;230 %r = call <8 x i16> @llvm.x86.avx512.vpermi2var.hi.128(<8 x i16> %x0, <8 x i16> <i16 8, i16 6, i16 10, i16 4, i16 12, i16 2, i16 14, i16 0>, <8 x i16> %x0)231 ret <8 x i16> %r232}233 234define <8 x i16> @shuffle_vpermv3_v8i16_demandedbits(<8 x i16> %x0, <8 x i16> %x1, <8 x i16> %m) {235; CHECK-LABEL: define <8 x i16> @shuffle_vpermv3_v8i16_demandedbits(236; CHECK-SAME: <8 x i16> [[X0:%.*]], <8 x i16> [[X1:%.*]], <8 x i16> [[M:%.*]]) {237; CHECK-NEXT: [[R:%.*]] = call <8 x i16> @llvm.x86.avx512.vpermi2var.hi.128(<8 x i16> [[X0]], <8 x i16> [[M]], <8 x i16> [[X1]])238; CHECK-NEXT: ret <8 x i16> [[R]]239;240 %t = or <8 x i16> %m, <i16 0, i16 16, i16 32, i16 64, i16 256, i16 512, i16 -16, i16 -32>241 %r = call <8 x i16> @llvm.x86.avx512.vpermi2var.hi.128(<8 x i16> %x0, <8 x i16> %t, <8 x i16> %x1)242 ret <8 x i16> %r243}244 245define <16 x i16> @shuffle_vpermv3_v16i16(<16 x i16> %x0, <16 x i16> %x1) {246; CHECK-LABEL: define <16 x i16> @shuffle_vpermv3_v16i16(247; CHECK-SAME: <16 x i16> [[X0:%.*]], <16 x i16> [[X1:%.*]]) {248; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i16> [[X0]], <16 x i16> [[X1]], <16 x i32> <i32 16, i32 14, i32 18, i32 12, i32 20, i32 10, i32 22, i32 8, i32 24, i32 6, i32 26, i32 4, i32 28, i32 2, i32 30, i32 0>249; CHECK-NEXT: ret <16 x i16> [[R]]250;251 %r = call <16 x i16> @llvm.x86.avx512.vpermi2var.hi.256(<16 x i16> %x0, <16 x i16> <i16 16, i16 14, i16 18, i16 12, i16 20, i16 10, i16 22, i16 8, i16 24, i16 6, i16 26, i16 4, i16 28, i16 2, i16 30, i16 0>, <16 x i16> %x1)252 ret <16 x i16> %r253}254 255define <16 x i16> @shuffle_vpermv3_v16i16_unary(<16 x i16> %x0) {256; CHECK-LABEL: define <16 x i16> @shuffle_vpermv3_v16i16_unary(257; CHECK-SAME: <16 x i16> [[X0:%.*]]) {258; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i16> [[X0]], <16 x i16> poison, <16 x i32> <i32 0, i32 14, i32 2, i32 12, i32 4, i32 10, i32 6, i32 8, i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>259; CHECK-NEXT: ret <16 x i16> [[R]]260;261 %r = call <16 x i16> @llvm.x86.avx512.vpermi2var.hi.256(<16 x i16> %x0, <16 x i16> <i16 16, i16 14, i16 18, i16 12, i16 20, i16 10, i16 22, i16 8, i16 24, i16 6, i16 26, i16 4, i16 28, i16 2, i16 30, i16 0>, <16 x i16> %x0)262 ret <16 x i16> %r263}264 265define <16 x i16> @shuffle_vpermv3_v16i16_demandedbits(<16 x i16> %x0, <16 x i16> %x1, <16 x i16> %m) {266; CHECK-LABEL: define <16 x i16> @shuffle_vpermv3_v16i16_demandedbits(267; CHECK-SAME: <16 x i16> [[X0:%.*]], <16 x i16> [[X1:%.*]], <16 x i16> [[M:%.*]]) {268; CHECK-NEXT: [[R:%.*]] = call <16 x i16> @llvm.x86.avx512.vpermi2var.hi.256(<16 x i16> [[X0]], <16 x i16> [[M]], <16 x i16> [[X1]])269; CHECK-NEXT: ret <16 x i16> [[R]]270;271 %t = or <16 x i16> %m, <i16 0, i16 32, i16 64, i16 256, i16 512, i16 1024, i16 2048, i16 4096, i16 -32, i16 -64, i16 -128, i16 -256, i16 -512, i16 -1024, i16 -2048, i16 -4096>272 %r = call <16 x i16> @llvm.x86.avx512.vpermi2var.hi.256(<16 x i16> %x0, <16 x i16> %t, <16 x i16> %x1)273 ret <16 x i16> %r274}275 276define <32 x i16> @shuffle_vpermv3_v32i16(<32 x i16> %x0, <32 x i16> %x1) {277; CHECK-LABEL: define <32 x i16> @shuffle_vpermv3_v32i16(278; CHECK-SAME: <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]]) {279; CHECK-NEXT: [[R:%.*]] = shufflevector <32 x i16> [[X0]], <32 x i16> [[X1]], <32 x i32> <i32 33, i32 17, i32 35, i32 19, i32 37, i32 21, i32 39, i32 23, i32 41, i32 25, i32 43, i32 27, i32 45, i32 29, i32 47, i32 31, i32 49, i32 14, i32 51, i32 12, i32 53, i32 10, i32 55, i32 8, i32 57, i32 6, i32 59, i32 4, i32 61, i32 2, i32 63, i32 0>280; CHECK-NEXT: ret <32 x i16> [[R]]281;282 %r = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> <i16 33, i16 17, i16 35, i16 19, i16 37, i16 21, i16 39, i16 23, i16 41, i16 25, i16 43, i16 27, i16 45, i16 29, i16 47, i16 31, i16 49, i16 14, i16 51, i16 12, i16 53, i16 10, i16 55, i16 8, i16 57, i16 6, i16 59, i16 4, i16 61, i16 2, i16 63, i16 0>, <32 x i16> %x1)283 ret <32 x i16> %r284}285 286define <32 x i16> @shuffle_vpermv3_v32i16_unary(<32 x i16> %x0) {287; CHECK-LABEL: define <32 x i16> @shuffle_vpermv3_v32i16_unary(288; CHECK-SAME: <32 x i16> [[X0:%.*]]) {289; CHECK-NEXT: [[R:%.*]] = shufflevector <32 x i16> [[X0]], <32 x i16> poison, <32 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 17, i32 14, i32 19, i32 12, i32 21, i32 10, i32 23, i32 8, i32 25, i32 6, i32 27, i32 4, i32 29, i32 2, i32 31, i32 0>290; CHECK-NEXT: ret <32 x i16> [[R]]291;292 %r = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> <i16 33, i16 17, i16 35, i16 19, i16 37, i16 21, i16 39, i16 23, i16 41, i16 25, i16 43, i16 27, i16 45, i16 29, i16 47, i16 31, i16 49, i16 14, i16 51, i16 12, i16 53, i16 10, i16 55, i16 8, i16 57, i16 6, i16 59, i16 4, i16 61, i16 2, i16 63, i16 0>, <32 x i16> %x0)293 ret <32 x i16> %r294}295 296define <32 x i16> @shuffle_vpermv3_v32i16_demandedbits(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %m) {297; CHECK-LABEL: define <32 x i16> @shuffle_vpermv3_v32i16_demandedbits(298; CHECK-SAME: <32 x i16> [[X0:%.*]], <32 x i16> [[X1:%.*]], <32 x i16> [[M:%.*]]) {299; CHECK-NEXT: [[R:%.*]] = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> [[X0]], <32 x i16> [[M]], <32 x i16> [[X1]])300; CHECK-NEXT: ret <32 x i16> [[R]]301;302 %t = or <32 x i16> %m, <i16 0, i16 64, i16 128, i16 256, i16 512, i16 1024, i16 2048, i16 4096, i16 0, i16 -64, i16 -128, i16 -256, i16 -512, i16 -1024, i16 -2048, i16 -4096, i16 0, i16 64, i16 128, i16 256, i16 512, i16 1024, i16 2048, i16 4096, i16 0, i16 -64, i16 -128, i16 -256, i16 -512, i16 -1024, i16 -2048, i16 -4096>303 %r = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> %t, <32 x i16> %x1)304 ret <32 x i16> %r305}306 307;308; vXi8309;310 311define <16 x i8> @shuffle_vpermv3_v16i8(<16 x i8> %x0, <16 x i8> %x1) {312; CHECK-LABEL: define <16 x i8> @shuffle_vpermv3_v16i8(313; CHECK-SAME: <16 x i8> [[X0:%.*]], <16 x i8> [[X1:%.*]]) {314; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i8> [[X0]], <16 x i8> [[X1]], <16 x i32> <i32 16, i32 14, i32 18, i32 12, i32 20, i32 10, i32 22, i32 8, i32 24, i32 6, i32 26, i32 4, i32 28, i32 2, i32 30, i32 0>315; CHECK-NEXT: ret <16 x i8> [[R]]316;317 %r = call <16 x i8> @llvm.x86.avx512.vpermi2var.qi.128(<16 x i8> %x0, <16 x i8> <i8 16, i8 14, i8 18, i8 12, i8 20, i8 10, i8 22, i8 8, i8 24, i8 6, i8 26, i8 4, i8 28, i8 2, i8 30, i8 0>, <16 x i8> %x1)318 ret <16 x i8> %r319}320 321define <16 x i8> @shuffle_vpermv3_v16i8_unary(<16 x i8> %x0) {322; CHECK-LABEL: define <16 x i8> @shuffle_vpermv3_v16i8_unary(323; CHECK-SAME: <16 x i8> [[X0:%.*]]) {324; CHECK-NEXT: [[R:%.*]] = shufflevector <16 x i8> [[X0]], <16 x i8> poison, <16 x i32> <i32 0, i32 14, i32 2, i32 12, i32 4, i32 10, i32 6, i32 8, i32 8, i32 6, i32 10, i32 4, i32 12, i32 2, i32 14, i32 0>325; CHECK-NEXT: ret <16 x i8> [[R]]326;327 %r = call <16 x i8> @llvm.x86.avx512.vpermi2var.qi.128(<16 x i8> %x0, <16 x i8> <i8 16, i8 14, i8 18, i8 12, i8 20, i8 10, i8 22, i8 8, i8 24, i8 6, i8 26, i8 4, i8 28, i8 2, i8 30, i8 0>, <16 x i8> %x0)328 ret <16 x i8> %r329}330 331define <16 x i8> @shuffle_vpermv3_v16i8_demandedbits(<16 x i8> %x0, <16 x i8> %x1, <16 x i8> %m) {332; CHECK-LABEL: define <16 x i8> @shuffle_vpermv3_v16i8_demandedbits(333; CHECK-SAME: <16 x i8> [[X0:%.*]], <16 x i8> [[X1:%.*]], <16 x i8> [[M:%.*]]) {334; CHECK-NEXT: [[R:%.*]] = call <16 x i8> @llvm.x86.avx512.vpermi2var.qi.128(<16 x i8> [[X0]], <16 x i8> [[M]], <16 x i8> [[X1]])335; CHECK-NEXT: ret <16 x i8> [[R]]336;337 %t = or <16 x i8> %m, <i8 0, i8 32, i8 64, i8 128, i8 0, i8 -32, i8 -64, i8 -128, i8 0, i8 32, i8 64, i8 128, i8 0, i8 -32, i8 -64, i8 -128>338 %r = call <16 x i8> @llvm.x86.avx512.vpermi2var.qi.128(<16 x i8> %x0, <16 x i8> %t, <16 x i8> %x1)339 ret <16 x i8> %r340}341 342define <32 x i8> @shuffle_vpermv3_v32i8(<32 x i8> %x0, <32 x i8> %x1) {343; CHECK-LABEL: define <32 x i8> @shuffle_vpermv3_v32i8(344; CHECK-SAME: <32 x i8> [[X0:%.*]], <32 x i8> [[X1:%.*]]) {345; CHECK-NEXT: [[R:%.*]] = shufflevector <32 x i8> [[X0]], <32 x i8> [[X1]], <32 x i32> <i32 33, i32 17, i32 35, i32 19, i32 37, i32 21, i32 39, i32 23, i32 41, i32 25, i32 43, i32 27, i32 45, i32 29, i32 47, i32 31, i32 49, i32 14, i32 51, i32 12, i32 53, i32 10, i32 55, i32 8, i32 57, i32 6, i32 59, i32 4, i32 61, i32 2, i32 63, i32 0>346; CHECK-NEXT: ret <32 x i8> [[R]]347;348 %r = call <32 x i8> @llvm.x86.avx512.vpermi2var.qi.256(<32 x i8> %x0, <32 x i8> <i8 33, i8 17, i8 35, i8 19, i8 37, i8 21, i8 39, i8 23, i8 41, i8 25, i8 43, i8 27, i8 45, i8 29, i8 47, i8 31, i8 49, i8 14, i8 51, i8 12, i8 53, i8 10, i8 55, i8 8, i8 57, i8 6, i8 59, i8 4, i8 61, i8 2, i8 63, i8 0>, <32 x i8> %x1)349 ret <32 x i8> %r350}351 352define <32 x i8> @shuffle_vpermv3_v32i8_unary(<32 x i8> %x0) {353; CHECK-LABEL: define <32 x i8> @shuffle_vpermv3_v32i8_unary(354; CHECK-SAME: <32 x i8> [[X0:%.*]]) {355; CHECK-NEXT: [[R:%.*]] = shufflevector <32 x i8> [[X0]], <32 x i8> poison, <32 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31, i32 17, i32 14, i32 19, i32 12, i32 21, i32 10, i32 23, i32 8, i32 25, i32 6, i32 27, i32 4, i32 29, i32 2, i32 31, i32 0>356; CHECK-NEXT: ret <32 x i8> [[R]]357;358 %r = call <32 x i8> @llvm.x86.avx512.vpermi2var.qi.256(<32 x i8> %x0, <32 x i8> <i8 33, i8 17, i8 35, i8 19, i8 37, i8 21, i8 39, i8 23, i8 41, i8 25, i8 43, i8 27, i8 45, i8 29, i8 47, i8 31, i8 49, i8 14, i8 51, i8 12, i8 53, i8 10, i8 55, i8 8, i8 57, i8 6, i8 59, i8 4, i8 61, i8 2, i8 63, i8 0>, <32 x i8> %x0)359 ret <32 x i8> %r360}361 362define <32 x i8> @shuffle_vpermv3_v32i8_demandedbits(<32 x i8> %x0, <32 x i8> %x1, <32 x i8> %m) {363; CHECK-LABEL: define <32 x i8> @shuffle_vpermv3_v32i8_demandedbits(364; CHECK-SAME: <32 x i8> [[X0:%.*]], <32 x i8> [[X1:%.*]], <32 x i8> [[M:%.*]]) {365; CHECK-NEXT: [[R:%.*]] = call <32 x i8> @llvm.x86.avx512.vpermi2var.qi.256(<32 x i8> [[X0]], <32 x i8> [[M]], <32 x i8> [[X1]])366; CHECK-NEXT: ret <32 x i8> [[R]]367;368 %t = or <32 x i8> %m, <i8 0, i8 0, i8 64, i8 128, i8 0, i8 0, i8 -64, i8 -128, i8 0, i8 0, i8 64, i8 128, i8 0, i8 0, i8 -64, i8 -128, i8 0, i8 0, i8 64, i8 128, i8 0, i8 0, i8 -64, i8 -128, i8 0, i8 0, i8 64, i8 128, i8 0, i8 0, i8 -64, i8 -128>369 %r = call <32 x i8> @llvm.x86.avx512.vpermi2var.qi.256(<32 x i8> %x0, <32 x i8> %t, <32 x i8> %x1)370 ret <32 x i8> %r371}372 373define <64 x i8> @shuffle_vpermv3_v64i8(<64 x i8> %x0, <64 x i8> %x1) {374; CHECK-LABEL: define <64 x i8> @shuffle_vpermv3_v64i8(375; CHECK-SAME: <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]]) {376; CHECK-NEXT: [[R:%.*]] = shufflevector <64 x i8> [[X0]], <64 x i8> [[X1]], <64 x i32> <i32 0, i32 127, i32 126, i32 125, i32 124, i32 123, i32 122, i32 121, i32 120, i32 119, i32 118, i32 115, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>377; CHECK-NEXT: ret <64 x i8> [[R]]378;379 %r = call <64 x i8> @llvm.x86.avx512.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> <i8 128, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121, i8 120, i8 119, i8 118, i8 115, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <64 x i8> %x1)380 ret <64 x i8> %r381}382 383define <64 x i8> @shuffle_vpermv3_v64i8_unary(<64 x i8> %x0) {384; CHECK-LABEL: define <64 x i8> @shuffle_vpermv3_v64i8_unary(385; CHECK-SAME: <64 x i8> [[X0:%.*]]) {386; CHECK-NEXT: [[R:%.*]] = shufflevector <64 x i8> [[X0]], <64 x i8> poison, <64 x i32> <i32 0, i32 63, i32 62, i32 61, i32 60, i32 59, i32 58, i32 57, i32 56, i32 55, i32 54, i32 51, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>387; CHECK-NEXT: ret <64 x i8> [[R]]388;389 %r = call <64 x i8> @llvm.x86.avx512.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> <i8 128, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121, i8 120, i8 119, i8 118, i8 115, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <64 x i8> %x0)390 ret <64 x i8> %r391}392 393define <64 x i8> @shuffle_vpermv3_v64i8_demandedbits(<64 x i8> %x0, <64 x i8> %x1, <64 x i8> %m) {394; CHECK-LABEL: define <64 x i8> @shuffle_vpermv3_v64i8_demandedbits(395; CHECK-SAME: <64 x i8> [[X0:%.*]], <64 x i8> [[X1:%.*]], <64 x i8> [[M:%.*]]) {396; CHECK-NEXT: [[R:%.*]] = call <64 x i8> @llvm.x86.avx512.vpermi2var.qi.512(<64 x i8> [[X0]], <64 x i8> [[M]], <64 x i8> [[X1]])397; CHECK-NEXT: ret <64 x i8> [[R]]398;399 %t = or <64 x i8> %m, <i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128, i8 0, i8 128, i8 0, i8 -128>400 %r = call <64 x i8> @llvm.x86.avx512.vpermi2var.qi.512(<64 x i8> %x0, <64 x i8> %t, <64 x i8> %x1)401 ret <64 x i8> %r402}403