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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare void @use(i1)5declare void @use32(i32)6 7define i1 @PR1817_1(i32 %X) {8; CHECK-LABEL: @PR1817_1(9; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X:%.*]], 1010; CHECK-NEXT: ret i1 [[B]]11;12 %A = icmp slt i32 %X, 1013 %B = icmp ult i32 %X, 1014 %C = and i1 %A, %B15 ret i1 %C16}17 18define i1 @PR1817_1_logical(i32 %X) {19; CHECK-LABEL: @PR1817_1_logical(20; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X:%.*]], 1021; CHECK-NEXT: ret i1 [[B]]22;23 %A = icmp slt i32 %X, 1024 %B = icmp ult i32 %X, 1025 %C = select i1 %A, i1 %B, i1 false26 ret i1 %C27}28 29define i1 @PR1817_2(i32 %X) {30; CHECK-LABEL: @PR1817_2(31; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 1032; CHECK-NEXT: ret i1 [[A]]33;34 %A = icmp slt i32 %X, 1035 %B = icmp ult i32 %X, 1036 %C = or i1 %A, %B37 ret i1 %C38}39 40define i1 @PR1817_2_logical(i32 %X) {41; CHECK-LABEL: @PR1817_2_logical(42; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 1043; CHECK-NEXT: ret i1 [[A]]44;45 %A = icmp slt i32 %X, 1046 %B = icmp ult i32 %X, 1047 %C = select i1 %A, i1 true, i1 %B48 ret i1 %C49}50 51define i1 @PR2330(i32 %a, i32 %b) {52; CHECK-LABEL: @PR2330(53; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[B:%.*]], [[A:%.*]]54; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], 855; CHECK-NEXT: ret i1 [[AND]]56;57 %cmp1 = icmp ult i32 %a, 858 %cmp2 = icmp ult i32 %b, 859 %and = and i1 %cmp2, %cmp160 ret i1 %and61}62 63define i1 @PR2330_logical(i32 %a, i32 %b) {64; CHECK-LABEL: @PR2330_logical(65; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], 866; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 867; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP2]], i1 [[CMP1]], i1 false68; CHECK-NEXT: ret i1 [[AND]]69;70 %cmp1 = icmp ult i32 %a, 871 %cmp2 = icmp ult i32 %b, 872 %and = select i1 %cmp2, i1 %cmp1, i1 false73 ret i1 %and74}75 76; if LHSC and RHSC differ only by one bit:77; (X == C1 || X == C2) -> (X & ~(C1 ^ C2)) == C1 (C1 has 1 less set bit)78; PR14708: https://bugs.llvm.org/show_bug.cgi?id=1470879 80define i1 @or_eq_with_one_bit_diff_constants1(i32 %x) {81; CHECK-LABEL: @or_eq_with_one_bit_diff_constants1(82; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -283; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 5084; CHECK-NEXT: ret i1 [[OR]]85;86 %cmp1 = icmp eq i32 %x, 5087 %cmp2 = icmp eq i32 %x, 5188 %or = or i1 %cmp1, %cmp289 ret i1 %or90}91 92define i1 @or_eq_with_one_bit_diff_constants1_logical(i32 %x) {93; CHECK-LABEL: @or_eq_with_one_bit_diff_constants1_logical(94; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -295; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 5096; CHECK-NEXT: ret i1 [[OR]]97;98 %cmp1 = icmp eq i32 %x, 5099 %cmp2 = icmp eq i32 %x, 51100 %or = select i1 %cmp1, i1 true, i1 %cmp2101 ret i1 %or102}103 104; (X != C1 && X != C2) -> (X & ~(C1 ^ C2)) != C1 (C1 has 1 less set bit)105 106define i1 @and_ne_with_one_bit_diff_constants1(i32 %x) {107; CHECK-LABEL: @and_ne_with_one_bit_diff_constants1(108; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -52109; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2110; CHECK-NEXT: ret i1 [[AND]]111;112 %cmp1 = icmp ne i32 %x, 51113 %cmp2 = icmp ne i32 %x, 50114 %and = and i1 %cmp1, %cmp2115 ret i1 %and116}117 118define i1 @and_ne_with_one_bit_diff_constants1_logical(i32 %x) {119; CHECK-LABEL: @and_ne_with_one_bit_diff_constants1_logical(120; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -52121; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2122; CHECK-NEXT: ret i1 [[AND]]123;124 %cmp1 = icmp ne i32 %x, 51125 %cmp2 = icmp ne i32 %x, 50126 %and = select i1 %cmp1, i1 %cmp2, i1 false127 ret i1 %and128}129 130; The constants are not necessarily off-by-one, just off-by-one-bit.131 132define i1 @or_eq_with_one_bit_diff_constants2(i32 %x) {133; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2(134; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -33135; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 65136; CHECK-NEXT: ret i1 [[OR]]137;138 %cmp1 = icmp eq i32 %x, 97139 %cmp2 = icmp eq i32 %x, 65140 %or = or i1 %cmp1, %cmp2141 ret i1 %or142}143 144define i1 @or_eq_with_one_bit_diff_constants2_logical(i32 %x) {145; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2_logical(146; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -33147; CHECK-NEXT: [[OR:%.*]] = icmp eq i32 [[TMP1]], 65148; CHECK-NEXT: ret i1 [[OR]]149;150 %cmp1 = icmp eq i32 %x, 97151 %cmp2 = icmp eq i32 %x, 65152 %or = select i1 %cmp1, i1 true, i1 %cmp2153 ret i1 %or154}155 156define i1 @and_ne_with_one_bit_diff_constants2(i19 %x) {157; CHECK-LABEL: @and_ne_with_one_bit_diff_constants2(158; CHECK-NEXT: [[TMP1:%.*]] = and i19 [[X:%.*]], -129159; CHECK-NEXT: [[AND:%.*]] = icmp ne i19 [[TMP1]], 65160; CHECK-NEXT: ret i1 [[AND]]161;162 %cmp1 = icmp ne i19 %x, 65163 %cmp2 = icmp ne i19 %x, 193164 %and = and i1 %cmp1, %cmp2165 ret i1 %and166}167 168define i1 @and_ne_with_one_bit_diff_constants2_logical(i19 %x) {169; CHECK-LABEL: @and_ne_with_one_bit_diff_constants2_logical(170; CHECK-NEXT: [[TMP1:%.*]] = and i19 [[X:%.*]], -129171; CHECK-NEXT: [[AND:%.*]] = icmp ne i19 [[TMP1]], 65172; CHECK-NEXT: ret i1 [[AND]]173;174 %cmp1 = icmp ne i19 %x, 65175 %cmp2 = icmp ne i19 %x, 193176 %and = select i1 %cmp1, i1 %cmp2, i1 false177 ret i1 %and178}179 180; Make sure the constants are treated as unsigned when comparing them.181 182define i1 @or_eq_with_one_bit_diff_constants3(i8 %x) {183; CHECK-LABEL: @or_eq_with_one_bit_diff_constants3(184; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127185; CHECK-NEXT: [[OR:%.*]] = icmp eq i8 [[TMP1]], 126186; CHECK-NEXT: ret i1 [[OR]]187;188 %cmp1 = icmp eq i8 %x, 254189 %cmp2 = icmp eq i8 %x, 126190 %or = or i1 %cmp1, %cmp2191 ret i1 %or192}193 194define i1 @or_eq_with_one_bit_diff_constants3_logical(i8 %x) {195; CHECK-LABEL: @or_eq_with_one_bit_diff_constants3_logical(196; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127197; CHECK-NEXT: [[OR:%.*]] = icmp eq i8 [[TMP1]], 126198; CHECK-NEXT: ret i1 [[OR]]199;200 %cmp1 = icmp eq i8 %x, 254201 %cmp2 = icmp eq i8 %x, 126202 %or = select i1 %cmp1, i1 true, i1 %cmp2203 ret i1 %or204}205 206define i1 @and_ne_with_one_bit_diff_constants3(i8 %x) {207; CHECK-LABEL: @and_ne_with_one_bit_diff_constants3(208; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127209; CHECK-NEXT: [[AND:%.*]] = icmp ne i8 [[TMP1]], 65210; CHECK-NEXT: ret i1 [[AND]]211;212 %cmp1 = icmp ne i8 %x, 65213 %cmp2 = icmp ne i8 %x, 193214 %and = and i1 %cmp1, %cmp2215 ret i1 %and216}217 218define i1 @and_ne_with_one_bit_diff_constants3_logical(i8 %x) {219; CHECK-LABEL: @and_ne_with_one_bit_diff_constants3_logical(220; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], 127221; CHECK-NEXT: [[AND:%.*]] = icmp ne i8 [[TMP1]], 65222; CHECK-NEXT: ret i1 [[AND]]223;224 %cmp1 = icmp ne i8 %x, 65225 %cmp2 = icmp ne i8 %x, 193226 %and = select i1 %cmp1, i1 %cmp2, i1 false227 ret i1 %and228}229 230; Use an 'add' to eliminate an icmp if the constants are off-by-one (not off-by-one-bit).231; (X == 13 | X == 14) -> X-13 <u 2232 233define i1 @or_eq_with_diff_one(i8 %x) {234; CHECK-LABEL: @or_eq_with_diff_one(235; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -13236; CHECK-NEXT: [[OR:%.*]] = icmp ult i8 [[TMP1]], 2237; CHECK-NEXT: ret i1 [[OR]]238;239 %cmp1 = icmp eq i8 %x, 13240 %cmp2 = icmp eq i8 %x, 14241 %or = or i1 %cmp1, %cmp2242 ret i1 %or243}244 245define i1 @or_eq_with_diff_one_logical(i8 %x) {246; CHECK-LABEL: @or_eq_with_diff_one_logical(247; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -13248; CHECK-NEXT: [[OR:%.*]] = icmp ult i8 [[TMP1]], 2249; CHECK-NEXT: ret i1 [[OR]]250;251 %cmp1 = icmp eq i8 %x, 13252 %cmp2 = icmp eq i8 %x, 14253 %or = select i1 %cmp1, i1 true, i1 %cmp2254 ret i1 %or255}256 257; (X != 40 | X != 39) -> X-39 >u 1258 259define i1 @and_ne_with_diff_one(i32 %x) {260; CHECK-LABEL: @and_ne_with_diff_one(261; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -41262; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2263; CHECK-NEXT: ret i1 [[AND]]264;265 %cmp1 = icmp ne i32 %x, 40266 %cmp2 = icmp ne i32 %x, 39267 %and = and i1 %cmp1, %cmp2268 ret i1 %and269}270 271define i1 @and_ne_with_diff_one_logical(i32 %x) {272; CHECK-LABEL: @and_ne_with_diff_one_logical(273; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -41274; CHECK-NEXT: [[AND:%.*]] = icmp ult i32 [[TMP1]], -2275; CHECK-NEXT: ret i1 [[AND]]276;277 %cmp1 = icmp ne i32 %x, 40278 %cmp2 = icmp ne i32 %x, 39279 %and = select i1 %cmp1, i1 %cmp2, i1 false280 ret i1 %and281}282 283; Make sure the constants are treated as signed when comparing them.284; PR32524: https://bugs.llvm.org/show_bug.cgi?id=32524285 286define i1 @or_eq_with_diff_one_signed(i32 %x) {287; CHECK-LABEL: @or_eq_with_diff_one_signed(288; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1289; CHECK-NEXT: [[OR:%.*]] = icmp ult i32 [[TMP1]], 2290; CHECK-NEXT: ret i1 [[OR]]291;292 %cmp1 = icmp eq i32 %x, 0293 %cmp2 = icmp eq i32 %x, -1294 %or = or i1 %cmp1, %cmp2295 ret i1 %or296}297 298define i1 @or_eq_with_diff_one_signed_logical(i32 %x) {299; CHECK-LABEL: @or_eq_with_diff_one_signed_logical(300; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1301; CHECK-NEXT: [[OR:%.*]] = icmp ult i32 [[TMP1]], 2302; CHECK-NEXT: ret i1 [[OR]]303;304 %cmp1 = icmp eq i32 %x, 0305 %cmp2 = icmp eq i32 %x, -1306 %or = select i1 %cmp1, i1 true, i1 %cmp2307 ret i1 %or308}309 310define i1 @and_ne_with_diff_one_signed(i64 %x) {311; CHECK-LABEL: @and_ne_with_diff_one_signed(312; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -1313; CHECK-NEXT: [[AND:%.*]] = icmp ult i64 [[TMP1]], -2314; CHECK-NEXT: ret i1 [[AND]]315;316 %cmp1 = icmp ne i64 %x, -1317 %cmp2 = icmp ne i64 %x, 0318 %and = and i1 %cmp1, %cmp2319 ret i1 %and320}321 322define i1 @and_ne_with_diff_one_signed_logical(i64 %x) {323; CHECK-LABEL: @and_ne_with_diff_one_signed_logical(324; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -1325; CHECK-NEXT: [[AND:%.*]] = icmp ult i64 [[TMP1]], -2326; CHECK-NEXT: ret i1 [[AND]]327;328 %cmp1 = icmp ne i64 %x, -1329 %cmp2 = icmp ne i64 %x, 0330 %and = select i1 %cmp1, i1 %cmp2, i1 false331 ret i1 %and332}333 334; Vectors with splat constants get the same folds.335 336define <2 x i1> @or_eq_with_one_bit_diff_constants2_splatvec(<2 x i32> %x) {337; CHECK-LABEL: @or_eq_with_one_bit_diff_constants2_splatvec(338; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -33)339; CHECK-NEXT: [[OR:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 65)340; CHECK-NEXT: ret <2 x i1> [[OR]]341;342 %cmp1 = icmp eq <2 x i32> %x, <i32 97, i32 97>343 %cmp2 = icmp eq <2 x i32> %x, <i32 65, i32 65>344 %or = or <2 x i1> %cmp1, %cmp2345 ret <2 x i1> %or346}347 348define <2 x i1> @and_ne_with_diff_one_splatvec(<2 x i32> %x) {349; CHECK-LABEL: @and_ne_with_diff_one_splatvec(350; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], splat (i32 -41)351; CHECK-NEXT: [[AND:%.*]] = icmp ult <2 x i32> [[TMP1]], splat (i32 -2)352; CHECK-NEXT: ret <2 x i1> [[AND]]353;354 %cmp1 = icmp ne <2 x i32> %x, <i32 40, i32 40>355 %cmp2 = icmp ne <2 x i32> %x, <i32 39, i32 39>356 %and = and <2 x i1> %cmp1, %cmp2357 ret <2 x i1> %and358}359 360; This is a fuzzer-generated test that would assert because361; we'd get into foldAndOfICmps() without running InstSimplify362; on an 'and' that should have been killed. It's not obvious363; why, but removing anything hides the bug, hence the long test.364 365define void @simplify_before_foldAndOfICmps(ptr %p) {366; CHECK-LABEL: @simplify_before_foldAndOfICmps(367; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1368; CHECK-NEXT: store ptr null, ptr [[P]], align 8369; CHECK-NEXT: ret void370;371 %A8 = alloca i16372 %L7 = load i16, ptr %A8373 %G21 = getelementptr i16, ptr %A8, i8 -1374 %B11 = udiv i16 %L7, -1375 %G4 = getelementptr i16, ptr %A8, i16 %B11376 %L2 = load i16, ptr %G4377 %L = load i16, ptr %G4378 %B23 = mul i16 %B11, %B11379 %L4 = load i16, ptr %A8380 %B21 = sdiv i16 %L7, %L4381 %B7 = sub i16 0, %B21382 %B18 = mul i16 %B23, %B7383 %C10 = icmp ugt i16 %L, %B11384 %B20 = and i16 %L7, %L2385 %B1 = mul i1 %C10, true386 %C5 = icmp sle i16 %B21, %L387 %C11 = icmp ule i16 %B21, %L388 %C7 = icmp slt i16 %B20, 0389 %B29 = srem i16 %L4, %B18390 %B15 = add i1 %C7, %C10391 %B19 = add i1 %C11, %B15392 %C6 = icmp sge i1 %C11, %B19393 %B33 = or i16 %B29, %L4394 %C13 = icmp uge i1 %C5, %B1395 %C3 = icmp ult i1 %C13, %C6396 store i16 undef, ptr %G21397 %C18 = icmp ule i1 %C10, %C7398 %G26 = getelementptr i1, ptr null, i1 %C3399 store i16 %B33, ptr %p400 store i1 %C18, ptr %p401 store ptr %G26, ptr %p402 ret void403}404 405define void @simplify_before_foldAndOfICmps2(ptr %p, ptr %A8) "instcombine-no-verify-fixpoint" {406; CHECK-LABEL: @simplify_before_foldAndOfICmps2(407; CHECK-NEXT: [[L7:%.*]] = load i16, ptr [[A8:%.*]], align 2408; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[L7]], -1409; CHECK-NEXT: [[B11:%.*]] = zext i1 [[TMP1]] to i16410; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i64411; CHECK-NEXT: [[G4:%.*]] = getelementptr i16, ptr [[A8]], i64 [[TMP2]]412; CHECK-NEXT: [[L2:%.*]] = load i16, ptr [[G4]], align 2413; CHECK-NEXT: [[L4:%.*]] = load i16, ptr [[A8]], align 2414; CHECK-NEXT: [[B21:%.*]] = sdiv i16 [[L7]], [[L4]]415; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP1]], i16 [[B21]], i16 0416; CHECK-NEXT: [[B18:%.*]] = sub i16 0, [[TMP5]]417; CHECK-NEXT: [[C11:%.*]] = icmp ugt i16 [[L2]], [[B11]]418; CHECK-NEXT: [[B20:%.*]] = and i16 [[L7]], [[L2]]419; CHECK-NEXT: [[C5:%.*]] = icmp sgt i16 [[B21]], [[L2]]420; CHECK-NEXT: [[C12:%.*]] = icmp ule i16 [[B21]], [[L2]]421; CHECK-NEXT: [[C10:%.*]] = icmp slt i16 [[B20]], 0422; CHECK-NEXT: [[B29:%.*]] = srem i16 [[L4]], [[B18]]423; CHECK-NEXT: [[B15:%.*]] = xor i1 [[C10]], [[C11]]424; CHECK-NEXT: [[TMP6:%.*]] = and i1 [[C12]], [[B15]]425; CHECK-NEXT: [[C6:%.*]] = xor i1 [[TMP6]], true426; CHECK-NEXT: [[B33:%.*]] = or i16 [[B29]], [[L4]]427; CHECK-NEXT: [[C3:%.*]] = and i1 [[C5]], [[C6]]428; CHECK-NEXT: [[C4:%.*]] = and i1 [[C3]], [[C11]]429; CHECK-NEXT: [[TMP4:%.*]] = xor i1 [[C11]], true430; CHECK-NEXT: [[C18:%.*]] = or i1 [[C10]], [[TMP4]]431; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[C4]] to i64432; CHECK-NEXT: [[G26:%.*]] = getelementptr i1, ptr null, i64 [[TMP3]]433; CHECK-NEXT: store i16 [[B33]], ptr [[P:%.*]], align 2434; CHECK-NEXT: store i1 [[C18]], ptr [[P]], align 1435; CHECK-NEXT: store ptr [[G26]], ptr [[P]], align 8436; CHECK-NEXT: ret void437;438 %L7 = load i16, ptr %A8439 %G21 = getelementptr i16, ptr %A8, i8 -1440 %B11 = udiv i16 %L7, -1441 %G4 = getelementptr i16, ptr %A8, i16 %B11442 %L2 = load i16, ptr %G4443 %L = load i16, ptr %G4444 %B23 = mul i16 %B11, %B11445 %L4 = load i16, ptr %A8446 %B21 = sdiv i16 %L7, %L4447 %B7 = sub i16 0, %B21448 %B18 = mul i16 %B23, %B7449 %C10 = icmp ugt i16 %L, %B11450 %B20 = and i16 %L7, %L2451 %B1 = mul i1 %C10, true452 %C5 = icmp sle i16 %B21, %L453 %C11 = icmp ule i16 %B21, %L454 %C7 = icmp slt i16 %B20, 0455 %B29 = srem i16 %L4, %B18456 %B15 = add i1 %C7, %C10457 %B19 = add i1 %C11, %B15458 %C6 = icmp sge i1 %C11, %B19459 %B33 = or i16 %B29, %L4460 %C13 = icmp uge i1 %C5, %B1461 %C3 = icmp ult i1 %C13, %C6462 store i16 undef, ptr %G21463 %C18 = icmp ule i1 %C10, %C7464 %G26 = getelementptr i1, ptr null, i1 %C3465 store i16 %B33, ptr %p466 store i1 %C18, ptr %p467 store ptr %G26, ptr %p468 ret void469}470 471define i1 @PR42691_1(i32 %x) {472; CHECK-LABEL: @PR42691_1(473; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], 2147483646474; CHECK-NEXT: ret i1 [[C]]475;476 %c1 = icmp slt i32 %x, 0477 %c2 = icmp eq i32 %x, 2147483647478 %c = or i1 %c1, %c2479 ret i1 %c480}481 482define i1 @PR42691_1_logical(i32 %x) {483; CHECK-LABEL: @PR42691_1_logical(484; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], 2147483646485; CHECK-NEXT: ret i1 [[C]]486;487 %c1 = icmp slt i32 %x, 0488 %c2 = icmp eq i32 %x, 2147483647489 %c = select i1 %c1, i1 true, i1 %c2490 ret i1 %c491}492 493define i1 @PR42691_2(i32 %x) {494; CHECK-LABEL: @PR42691_2(495; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -2496; CHECK-NEXT: ret i1 [[C]]497;498 %c1 = icmp ult i32 %x, 2147483648499 %c2 = icmp eq i32 %x, 4294967295500 %c = or i1 %c1, %c2501 ret i1 %c502}503 504define i1 @PR42691_2_logical(i32 %x) {505; CHECK-LABEL: @PR42691_2_logical(506; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -2507; CHECK-NEXT: ret i1 [[C]]508;509 %c1 = icmp ult i32 %x, 2147483648510 %c2 = icmp eq i32 %x, 4294967295511 %c = select i1 %c1, i1 true, i1 %c2512 ret i1 %c513}514 515define i1 @PR42691_3(i32 %x) {516; CHECK-LABEL: @PR42691_3(517; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], -2147483647518; CHECK-NEXT: ret i1 [[C]]519;520 %c1 = icmp sge i32 %x, 0521 %c2 = icmp eq i32 %x, -2147483648522 %c = or i1 %c1, %c2523 ret i1 %c524}525 526define i1 @PR42691_3_logical(i32 %x) {527; CHECK-LABEL: @PR42691_3_logical(528; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], -2147483647529; CHECK-NEXT: ret i1 [[C]]530;531 %c1 = icmp sge i32 %x, 0532 %c2 = icmp eq i32 %x, -2147483648533 %c = select i1 %c1, i1 true, i1 %c2534 ret i1 %c535}536 537define i1 @PR42691_4(i32 %x) {538; CHECK-LABEL: @PR42691_4(539; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 1540; CHECK-NEXT: ret i1 [[C]]541;542 %c1 = icmp uge i32 %x, 2147483648543 %c2 = icmp eq i32 %x, 0544 %c = or i1 %c1, %c2545 ret i1 %c546}547 548define i1 @PR42691_4_logical(i32 %x) {549; CHECK-LABEL: @PR42691_4_logical(550; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 1551; CHECK-NEXT: ret i1 [[C]]552;553 %c1 = icmp uge i32 %x, 2147483648554 %c2 = icmp eq i32 %x, 0555 %c = select i1 %c1, i1 true, i1 %c2556 ret i1 %c557}558 559define i1 @PR42691_5(i32 %x) {560; CHECK-LABEL: @PR42691_5(561; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -2147483647562; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646563; CHECK-NEXT: ret i1 [[C]]564;565 %c1 = icmp slt i32 %x, 1566 %c2 = icmp eq i32 %x, 2147483647567 %c = or i1 %c1, %c2568 ret i1 %c569}570 571define i1 @PR42691_5_logical(i32 %x) {572; CHECK-LABEL: @PR42691_5_logical(573; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -2147483647574; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646575; CHECK-NEXT: ret i1 [[C]]576;577 %c1 = icmp slt i32 %x, 1578 %c2 = icmp eq i32 %x, 2147483647579 %c = select i1 %c1, i1 true, i1 %c2580 ret i1 %c581}582 583define i1 @PR42691_6(i32 %x) {584; CHECK-LABEL: @PR42691_6(585; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1586; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646587; CHECK-NEXT: ret i1 [[C]]588;589 %c1 = icmp ult i32 %x, 2147483649590 %c2 = icmp eq i32 %x, 4294967295591 %c = or i1 %c1, %c2592 ret i1 %c593}594 595define i1 @PR42691_6_logical(i32 %x) {596; CHECK-LABEL: @PR42691_6_logical(597; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1598; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483646599; CHECK-NEXT: ret i1 [[C]]600;601 %c1 = icmp ult i32 %x, 2147483649602 %c2 = icmp eq i32 %x, 4294967295603 %c = select i1 %c1, i1 true, i1 %c2604 ret i1 %c605}606 607define i1 @PR42691_7(i32 %x) {608; CHECK-LABEL: @PR42691_7(609; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1610; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0611; CHECK-NEXT: ret i1 [[C]]612;613 %c1 = icmp uge i32 %x, 2147483649614 %c2 = icmp eq i32 %x, 0615 %c = or i1 %c1, %c2616 ret i1 %c617}618 619define i1 @PR42691_7_logical(i32 %x) {620; CHECK-LABEL: @PR42691_7_logical(621; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1622; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0623; CHECK-NEXT: ret i1 [[C]]624;625 %c1 = icmp uge i32 %x, 2147483649626 %c2 = icmp eq i32 %x, 0627 %c = select i1 %c1, i1 true, i1 %c2628 ret i1 %c629}630 631define i1 @PR42691_8(i32 %x) {632; CHECK-LABEL: @PR42691_8(633; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647634; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483635635; CHECK-NEXT: ret i1 [[C]]636;637 %c1 = icmp slt i32 %x, 14638 %c2 = icmp ne i32 %x, -2147483648639 %c = and i1 %c1, %c2640 ret i1 %c641}642 643define i1 @PR42691_8_logical(i32 %x) {644; CHECK-LABEL: @PR42691_8_logical(645; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647646; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -2147483635647; CHECK-NEXT: ret i1 [[C]]648;649 %c1 = icmp slt i32 %x, 14650 %c2 = icmp ne i32 %x, -2147483648651 %c = select i1 %c1, i1 %c2, i1 false652 ret i1 %c653}654 655define i1 @PR42691_9(i32 %x) {656; CHECK-LABEL: @PR42691_9(657; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14658; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 2147483633659; CHECK-NEXT: ret i1 [[C]]660;661 %c1 = icmp sgt i32 %x, 13662 %c2 = icmp ne i32 %x, 2147483647663 %c = and i1 %c1, %c2664 ret i1 %c665}666 667define i1 @PR42691_9_logical(i32 %x) {668; CHECK-LABEL: @PR42691_9_logical(669; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14670; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 2147483633671; CHECK-NEXT: ret i1 [[C]]672;673 %c1 = icmp sgt i32 %x, 13674 %c2 = icmp ne i32 %x, 2147483647675 %c = select i1 %c1, i1 %c2, i1 false676 ret i1 %c677}678 679define i1 @PR42691_10(i32 %x) {680; CHECK-LABEL: @PR42691_10(681; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14682; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -15683; CHECK-NEXT: ret i1 [[C]]684;685 %c1 = icmp ugt i32 %x, 13686 %c2 = icmp ne i32 %x, 4294967295687 %c = and i1 %c1, %c2688 ret i1 %c689}690 691define i1 @PR42691_10_logical(i32 %x) {692; CHECK-LABEL: @PR42691_10_logical(693; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14694; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -15695; CHECK-NEXT: ret i1 [[C]]696;697 %c1 = icmp ugt i32 %x, 13698 %c2 = icmp ne i32 %x, 4294967295699 %c = select i1 %c1, i1 %c2, i1 false700 ret i1 %c701}702 703define i1 @substitute_constant_and_eq_eq(i8 %x, i8 %y) {704; CHECK-LABEL: @substitute_constant_and_eq_eq(705; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42706; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42707; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]708; CHECK-NEXT: ret i1 [[R]]709;710 %c1 = icmp eq i8 %x, 42711 %c2 = icmp eq i8 %x, %y712 %r = and i1 %c1, %c2713 ret i1 %r714}715 716define i1 @substitute_constant_and_eq_eq_logical(i8 %x, i8 %y) {717; CHECK-LABEL: @substitute_constant_and_eq_eq_logical(718; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42719; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42720; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 [[TMP1]], i1 false721; CHECK-NEXT: ret i1 [[R]]722;723 %c1 = icmp eq i8 %x, 42724 %c2 = icmp eq i8 %x, %y725 %r = select i1 %c1, i1 %c2, i1 false726 ret i1 %r727}728 729define i1 @substitute_constant_and_eq_eq_commute(i8 %x, i8 %y) {730; CHECK-LABEL: @substitute_constant_and_eq_eq_commute(731; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42732; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42733; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]734; CHECK-NEXT: ret i1 [[R]]735;736 %c1 = icmp eq i8 %x, 42737 %c2 = icmp eq i8 %x, %y738 %r = and i1 %c2, %c1739 ret i1 %r740}741 742define i1 @substitute_constant_and_eq_eq_commute_logical(i8 %x, i8 %y) {743; CHECK-LABEL: @substitute_constant_and_eq_eq_commute_logical(744; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42745; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42746; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]747; CHECK-NEXT: ret i1 [[R]]748;749 %c1 = icmp eq i8 %x, 42750 %c2 = icmp eq i8 %x, %y751 %r = select i1 %c2, i1 %c1, i1 false752 ret i1 %r753}754 755define i1 @substitute_constant_and_eq_ugt_swap(i8 %x, i8 %y) {756; CHECK-LABEL: @substitute_constant_and_eq_ugt_swap(757; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42758; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Y:%.*]], 42759; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]760; CHECK-NEXT: ret i1 [[R]]761;762 %c1 = icmp eq i8 %x, 42763 %c2 = icmp ugt i8 %y, %x764 %r = and i1 %c2, %c1765 ret i1 %r766}767 768define i1 @substitute_constant_and_eq_ugt_swap_logical(i8 %x, i8 %y) {769; CHECK-LABEL: @substitute_constant_and_eq_ugt_swap_logical(770; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42771; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Y:%.*]], 42772; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]773; CHECK-NEXT: ret i1 [[R]]774;775 %c1 = icmp eq i8 %x, 42776 %c2 = icmp ugt i8 %y, %x777 %r = select i1 %c2, i1 %c1, i1 false778 ret i1 %r779}780 781define <2 x i1> @substitute_constant_and_eq_ne_vec(<2 x i8> %x, <2 x i8> %y) {782; CHECK-LABEL: @substitute_constant_and_eq_ne_vec(783; CHECK-NEXT: [[C1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 42, i8 97>784; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 42, i8 97>785; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C1]], [[TMP1]]786; CHECK-NEXT: ret <2 x i1> [[R]]787;788 %c1 = icmp eq <2 x i8> %x, <i8 42, i8 97>789 %c2 = icmp ne <2 x i8> %x, %y790 %r = and <2 x i1> %c1, %c2791 ret <2 x i1> %r792}793 794define <2 x i1> @substitute_constant_and_eq_ne_vec_logical(<2 x i8> %x, <2 x i8> %y) {795; CHECK-LABEL: @substitute_constant_and_eq_ne_vec_logical(796; CHECK-NEXT: [[C1:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 42, i8 97>797; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 42, i8 97>798; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C1]], <2 x i1> [[TMP1]], <2 x i1> zeroinitializer799; CHECK-NEXT: ret <2 x i1> [[R]]800;801 %c1 = icmp eq <2 x i8> %x, <i8 42, i8 97>802 %c2 = icmp ne <2 x i8> %x, %y803 %r = select <2 x i1> %c1, <2 x i1> %c2, <2 x i1> zeroinitializer804 ret <2 x i1> %r805}806 807define i1 @substitute_constant_and_eq_sgt_use(i8 %x, i8 %y) {808; CHECK-LABEL: @substitute_constant_and_eq_sgt_use(809; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42810; CHECK-NEXT: call void @use(i1 [[C1]])811; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 42812; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]813; CHECK-NEXT: ret i1 [[R]]814;815 %c1 = icmp eq i8 %x, 42816 call void @use(i1 %c1)817 %c2 = icmp sgt i8 %x, %y818 %r = and i1 %c2, %c1819 ret i1 %r820}821 822define i1 @substitute_constant_and_eq_sgt_use_logical(i8 %x, i8 %y) {823; CHECK-LABEL: @substitute_constant_and_eq_sgt_use_logical(824; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42825; CHECK-NEXT: call void @use(i1 [[C1]])826; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 42827; CHECK-NEXT: [[R:%.*]] = and i1 [[C1]], [[TMP1]]828; CHECK-NEXT: ret i1 [[R]]829;830 %c1 = icmp eq i8 %x, 42831 call void @use(i1 %c1)832 %c2 = icmp sgt i8 %x, %y833 %r = select i1 %c2, i1 %c1, i1 false834 ret i1 %r835}836 837; Negative test - extra use838 839define i1 @substitute_constant_and_eq_sgt_use2(i8 %x, i8 %y) {840; CHECK-LABEL: @substitute_constant_and_eq_sgt_use2(841; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42842; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X]], [[Y:%.*]]843; CHECK-NEXT: call void @use(i1 [[C2]])844; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]845; CHECK-NEXT: ret i1 [[R]]846;847 %c1 = icmp eq i8 %x, 42848 %c2 = icmp sgt i8 %x, %y849 call void @use(i1 %c2)850 %r = and i1 %c2, %c1851 ret i1 %r852}853 854define i1 @substitute_constant_and_eq_sgt_use2_logical(i8 %x, i8 %y) {855; CHECK-LABEL: @substitute_constant_and_eq_sgt_use2_logical(856; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42857; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X]], [[Y:%.*]]858; CHECK-NEXT: call void @use(i1 [[C2]])859; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]860; CHECK-NEXT: ret i1 [[R]]861;862 %c1 = icmp eq i8 %x, 42863 %c2 = icmp sgt i8 %x, %y864 call void @use(i1 %c2)865 %r = select i1 %c2, i1 %c1, i1 false866 ret i1 %r867}868 869; Extra use does not prevent transform if the expression simplifies:870; X == MAX && X < Y --> false871 872define i1 @slt_and_max(i8 %x, i8 %y) {873; CHECK-LABEL: @slt_and_max(874; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]875; CHECK-NEXT: call void @use(i1 [[C2]])876; CHECK-NEXT: ret i1 false877;878 %c1 = icmp eq i8 %x, 127879 %c2 = icmp slt i8 %x, %y880 call void @use(i1 %c2)881 %r = and i1 %c2, %c1882 ret i1 %r883}884 885define i1 @slt_and_max_logical(i8 %x, i8 %y) {886; CHECK-LABEL: @slt_and_max_logical(887; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]888; CHECK-NEXT: call void @use(i1 [[C2]])889; CHECK-NEXT: ret i1 false890;891 %c1 = icmp eq i8 %x, 127892 %c2 = icmp slt i8 %x, %y893 call void @use(i1 %c2)894 %r = select i1 %c2, i1 %c1, i1 false895 ret i1 %r896}897 898; Extra use does not prevent transform if the expression simplifies:899; X == MAX && X >= Y --> X == MAX900 901define i1 @sge_and_max(i8 %x, i8 %y) {902; CHECK-LABEL: @sge_and_max(903; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 127904; CHECK-NEXT: [[C2:%.*]] = icmp sge i8 [[X]], [[Y:%.*]]905; CHECK-NEXT: call void @use(i1 [[C2]])906; CHECK-NEXT: ret i1 [[C1]]907;908 %c1 = icmp eq i8 %x, 127909 %c2 = icmp sge i8 %x, %y910 call void @use(i1 %c2)911 %r = and i1 %c2, %c1912 ret i1 %r913}914 915define i1 @sge_and_max_logical(i8 %x, i8 %y) {916; CHECK-LABEL: @sge_and_max_logical(917; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 127918; CHECK-NEXT: [[C2:%.*]] = icmp sge i8 [[X]], [[Y:%.*]]919; CHECK-NEXT: call void @use(i1 [[C2]])920; CHECK-NEXT: ret i1 [[C1]]921;922 %c1 = icmp eq i8 %x, 127923 %c2 = icmp sge i8 %x, %y924 call void @use(i1 %c2)925 %r = select i1 %c2, i1 %c1, i1 false926 ret i1 %r927}928 929define i1 @substitute_constant_and_ne_ugt_swap(i8 %x, i8 %y) {930; CHECK-LABEL: @substitute_constant_and_ne_ugt_swap(931; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42932; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[Y:%.*]], [[X]]933; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]934; CHECK-NEXT: ret i1 [[R]]935;936 %c1 = icmp ne i8 %x, 42937 %c2 = icmp ugt i8 %y, %x938 %r = and i1 %c2, %c1939 ret i1 %r940}941 942define i1 @substitute_constant_and_ne_ugt_swap_logical(i8 %x, i8 %y) {943; CHECK-LABEL: @substitute_constant_and_ne_ugt_swap_logical(944; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42945; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[Y:%.*]], [[X]]946; CHECK-NEXT: [[R:%.*]] = and i1 [[C2]], [[C1]]947; CHECK-NEXT: ret i1 [[R]]948;949 %c1 = icmp ne i8 %x, 42950 %c2 = icmp ugt i8 %y, %x951 %r = select i1 %c2, i1 %c1, i1 false952 ret i1 %r953}954 955define i1 @substitute_constant_or_ne_swap_sle(i8 %x, i8 %y) {956; CHECK-LABEL: @substitute_constant_or_ne_swap_sle(957; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42958; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43959; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]960; CHECK-NEXT: ret i1 [[R]]961;962 %c1 = icmp ne i8 %x, 42963 %c2 = icmp sle i8 %y, %x964 %r = or i1 %c1, %c2965 ret i1 %r966}967 968define i1 @substitute_constant_or_ne_swap_sle_logical(i8 %x, i8 %y) {969; CHECK-LABEL: @substitute_constant_or_ne_swap_sle_logical(970; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42971; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43972; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP1]]973; CHECK-NEXT: ret i1 [[R]]974;975 %c1 = icmp ne i8 %x, 42976 %c2 = icmp sle i8 %y, %x977 %r = select i1 %c1, i1 true, i1 %c2978 ret i1 %r979}980 981define i1 @substitute_constant_or_ne_uge_commute(i8 %x, i8 %y) {982; CHECK-LABEL: @substitute_constant_or_ne_uge_commute(983; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42984; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[Y:%.*]], 43985; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]986; CHECK-NEXT: ret i1 [[R]]987;988 %c1 = icmp ne i8 %x, 42989 %c2 = icmp uge i8 %x, %y990 %r = or i1 %c2, %c1991 ret i1 %r992}993 994define i1 @substitute_constant_or_ne_uge_commute_logical(i8 %x, i8 %y) {995; CHECK-LABEL: @substitute_constant_or_ne_uge_commute_logical(996; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42997; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[Y:%.*]], 43998; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]999; CHECK-NEXT: ret i1 [[R]]1000;1001 %c1 = icmp ne i8 %x, 421002 %c2 = icmp uge i8 %x, %y1003 %r = select i1 %c2, i1 true, i1 %c11004 ret i1 %r1005}1006 1007; Negative test - not safe to substitute vector constant with undef element1008 1009define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_undef(<2 x i8> %x, <2 x i8> %y) {1010; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_undef(1011; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 undef>1012; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], [[X]]1013; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C1]], [[C2]]1014; CHECK-NEXT: ret <2 x i1> [[R]]1015;1016 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 undef>1017 %c2 = icmp slt <2 x i8> %y, %x1018 %r = or <2 x i1> %c1, %c21019 ret <2 x i1> %r1020}1021 1022; TODO: The poison case would be valid to fold.1023 1024define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_poison(<2 x i8> %x, <2 x i8> %y) {1025; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_poison(1026; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 poison>1027; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], [[X]]1028; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C1]], [[C2]]1029; CHECK-NEXT: ret <2 x i1> [[R]]1030;1031 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 poison>1032 %c2 = icmp slt <2 x i8> %y, %x1033 %r = or <2 x i1> %c1, %c21034 ret <2 x i1> %r1035}1036 1037define <2 x i1> @substitute_constant_or_ne_slt_swap_vec_logical(<2 x i8> %x, <2 x i8> %y) {1038; CHECK-LABEL: @substitute_constant_or_ne_slt_swap_vec_logical(1039; CHECK-NEXT: [[C1:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 42, i8 poison>1040; CHECK-NEXT: [[C2:%.*]] = icmp slt <2 x i8> [[Y:%.*]], <i8 42, i8 poison>1041; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C1]], <2 x i1> splat (i1 true), <2 x i1> [[C2]]1042; CHECK-NEXT: ret <2 x i1> [[R]]1043;1044 %c1 = icmp ne <2 x i8> %x, <i8 42, i8 poison>1045 %c2 = icmp slt <2 x i8> %y, %x1046 %r = select <2 x i1> %c1, <2 x i1> <i1 true, i1 true>, <2 x i1> %c21047 ret <2 x i1> %r1048}1049 1050define i1 @substitute_constant_or_eq_swap_ne(i8 %x, i8 %y) {1051; CHECK-LABEL: @substitute_constant_or_eq_swap_ne(1052; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 421053; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]1054; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[C2]]1055; CHECK-NEXT: ret i1 [[R]]1056;1057 %c1 = icmp eq i8 %x, 421058 %c2 = icmp ne i8 %y, %x1059 %r = or i1 %c1, %c21060 ret i1 %r1061}1062 1063define i1 @substitute_constant_or_eq_swap_ne_logical(i8 %x, i8 %y) {1064; CHECK-LABEL: @substitute_constant_or_eq_swap_ne_logical(1065; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 421066; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]1067; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]1068; CHECK-NEXT: ret i1 [[R]]1069;1070 %c1 = icmp eq i8 %x, 421071 %c2 = icmp ne i8 %y, %x1072 %r = select i1 %c1, i1 true, i1 %c21073 ret i1 %r1074}1075 1076define i1 @substitute_constant_or_ne_sge_use(i8 %x, i8 %y) {1077; CHECK-LABEL: @substitute_constant_or_ne_sge_use(1078; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 421079; CHECK-NEXT: call void @use(i1 [[C1]])1080; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 431081; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]1082; CHECK-NEXT: ret i1 [[R]]1083;1084 %c1 = icmp ne i8 %x, 421085 call void @use(i1 %c1)1086 %c2 = icmp sge i8 %x, %y1087 %r = or i1 %c2, %c11088 ret i1 %r1089}1090 1091define i1 @substitute_constant_or_ne_sge_use_logical(i8 %x, i8 %y) {1092; CHECK-LABEL: @substitute_constant_or_ne_sge_use_logical(1093; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 421094; CHECK-NEXT: call void @use(i1 [[C1]])1095; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 431096; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[TMP1]]1097; CHECK-NEXT: ret i1 [[R]]1098;1099 %c1 = icmp ne i8 %x, 421100 call void @use(i1 %c1)1101 %c2 = icmp sge i8 %x, %y1102 %r = select i1 %c2, i1 true, i1 %c11103 ret i1 %r1104}1105 1106; Negative test - extra use1107 1108define i1 @substitute_constant_or_ne_ule_use2(i8 %x, i8 %y) {1109; CHECK-LABEL: @substitute_constant_or_ne_ule_use2(1110; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 421111; CHECK-NEXT: [[C2:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]1112; CHECK-NEXT: call void @use(i1 [[C2]])1113; CHECK-NEXT: [[R:%.*]] = or i1 [[C2]], [[C1]]1114; CHECK-NEXT: ret i1 [[R]]1115;1116 %c1 = icmp ne i8 %x, 421117 %c2 = icmp ule i8 %x, %y1118 call void @use(i1 %c2)1119 %r = or i1 %c2, %c11120 ret i1 %r1121}1122 1123define i1 @substitute_constant_or_ne_ule_use2_logical(i8 %x, i8 %y) {1124; CHECK-LABEL: @substitute_constant_or_ne_ule_use2_logical(1125; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 421126; CHECK-NEXT: [[C2:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]1127; CHECK-NEXT: call void @use(i1 [[C2]])1128; CHECK-NEXT: [[R:%.*]] = or i1 [[C2]], [[C1]]1129; CHECK-NEXT: ret i1 [[R]]1130;1131 %c1 = icmp ne i8 %x, 421132 %c2 = icmp ule i8 %x, %y1133 call void @use(i1 %c2)1134 %r = select i1 %c2, i1 true, i1 %c11135 ret i1 %r1136}1137 1138define i1 @or_ranges_overlap(i8 %x) {1139; CHECK-LABEL: @or_ranges_overlap(1140; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -51141; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 161142; CHECK-NEXT: ret i1 [[C7]]1143;1144 %c1 = icmp uge i8 %x, 51145 %c2 = icmp ule i8 %x, 101146 %c3 = and i1 %c1, %c21147 %c4 = icmp uge i8 %x, 101148 %c5 = icmp ule i8 %x, 201149 %c6 = and i1 %c4, %c51150 %c7 = or i1 %c3, %c61151 ret i1 %c71152}1153 1154define i1 @or_ranges_adjacent(i8 %x) {1155; CHECK-LABEL: @or_ranges_adjacent(1156; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -51157; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 161158; CHECK-NEXT: ret i1 [[C7]]1159;1160 %c1 = icmp uge i8 %x, 51161 %c2 = icmp ule i8 %x, 101162 %c3 = and i1 %c1, %c21163 %c4 = icmp uge i8 %x, 111164 %c5 = icmp ule i8 %x, 201165 %c6 = and i1 %c4, %c51166 %c7 = or i1 %c3, %c61167 ret i1 %c71168}1169 1170define i1 @or_ranges_separated(i8 %x) {1171; CHECK-LABEL: @or_ranges_separated(1172; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -51173; CHECK-NEXT: [[C3:%.*]] = icmp ult i8 [[TMP1]], 61174; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[X]], -121175; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP2]], 91176; CHECK-NEXT: [[C7:%.*]] = or i1 [[C3]], [[C6]]1177; CHECK-NEXT: ret i1 [[C7]]1178;1179 %c1 = icmp uge i8 %x, 51180 %c2 = icmp ule i8 %x, 101181 %c3 = and i1 %c1, %c21182 %c4 = icmp uge i8 %x, 121183 %c5 = icmp ule i8 %x, 201184 %c6 = and i1 %c4, %c51185 %c7 = or i1 %c3, %c61186 ret i1 %c71187}1188 1189define i1 @or_ranges_single_elem_right(i8 %x) {1190; CHECK-LABEL: @or_ranges_single_elem_right(1191; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -51192; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP1]], 71193; CHECK-NEXT: ret i1 [[C6]]1194;1195 %c1 = icmp uge i8 %x, 51196 %c2 = icmp ule i8 %x, 101197 %c3 = and i1 %c1, %c21198 %c4 = icmp eq i8 %x, 111199 %c6 = or i1 %c3, %c41200 ret i1 %c61201}1202 1203define i1 @or_ranges_single_elem_left(i8 %x) {1204; CHECK-LABEL: @or_ranges_single_elem_left(1205; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -41206; CHECK-NEXT: [[C6:%.*]] = icmp ult i8 [[TMP1]], 71207; CHECK-NEXT: ret i1 [[C6]]1208;1209 %c1 = icmp uge i8 %x, 51210 %c2 = icmp ule i8 %x, 101211 %c3 = and i1 %c1, %c21212 %c4 = icmp eq i8 %x, 41213 %c6 = or i1 %c3, %c41214 ret i1 %c61215}1216 1217define i1 @and_ranges_overlap(i8 %x) {1218; CHECK-LABEL: @and_ranges_overlap(1219; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -71220; CHECK-NEXT: [[C7:%.*]] = icmp ult i8 [[TMP1]], 41221; CHECK-NEXT: ret i1 [[C7]]1222;1223 %c1 = icmp uge i8 %x, 51224 %c2 = icmp ule i8 %x, 101225 %c3 = and i1 %c1, %c21226 %c4 = icmp uge i8 %x, 71227 %c5 = icmp ule i8 %x, 201228 %c6 = and i1 %c4, %c51229 %c7 = and i1 %c3, %c61230 ret i1 %c71231}1232 1233define i1 @and_ranges_overlap_single(i8 %x) {1234; CHECK-LABEL: @and_ranges_overlap_single(1235; CHECK-NEXT: [[C7:%.*]] = icmp eq i8 [[X:%.*]], 101236; CHECK-NEXT: ret i1 [[C7]]1237;1238 %c1 = icmp uge i8 %x, 51239 %c2 = icmp ule i8 %x, 101240 %c3 = and i1 %c1, %c21241 %c4 = icmp uge i8 %x, 101242 %c5 = icmp ule i8 %x, 201243 %c6 = and i1 %c4, %c51244 %c7 = and i1 %c3, %c61245 ret i1 %c71246}1247 1248define i1 @and_ranges_no_overlap(i8 %x) {1249; CHECK-LABEL: @and_ranges_no_overlap(1250; CHECK-NEXT: ret i1 false1251;1252 %c1 = icmp uge i8 %x, 51253 %c2 = icmp ule i8 %x, 101254 %c3 = and i1 %c1, %c21255 %c4 = icmp uge i8 %x, 111256 %c5 = icmp ule i8 %x, 201257 %c6 = and i1 %c4, %c51258 %c7 = and i1 %c3, %c61259 ret i1 %c71260}1261 1262define i1 @and_ranges_signed_pred(i64 %x) {1263; CHECK-LABEL: @and_ranges_signed_pred(1264; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X:%.*]], -92233720368547756811265; CHECK-NEXT: [[T5:%.*]] = icmp ult i64 [[TMP1]], -92233720368547755531266; CHECK-NEXT: ret i1 [[T5]]1267;1268 %t1 = add i64 %x, 1271269 %t2 = icmp slt i64 %t1, 10241270 %t3 = add i64 %x, 1281271 %t4 = icmp slt i64 %t3, 2561272 %t5 = and i1 %t2, %t41273 ret i1 %t51274}1275 1276define i1 @and_two_ranges_to_mask_and_range(i8 %c) {1277; CHECK-LABEL: @and_two_ranges_to_mask_and_range(1278; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -331279; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -911280; CHECK-NEXT: [[AND:%.*]] = icmp ult i8 [[TMP2]], -261281; CHECK-NEXT: ret i1 [[AND]]1282;1283 %c.off = add i8 %c, -971284 %cmp1 = icmp ugt i8 %c.off, 251285 %c.off2 = add i8 %c, -651286 %cmp2 = icmp ugt i8 %c.off2, 251287 %and = and i1 %cmp1, %cmp21288 ret i1 %and1289}1290 1291define i1 @and_two_ranges_to_mask_and_range_not_pow2_diff(i8 %c) {1292; CHECK-LABEL: @and_two_ranges_to_mask_and_range_not_pow2_diff(1293; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[C:%.*]], -1231294; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[TMP1]], -261295; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[C]], -901296; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[TMP2]], -261297; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]1298; CHECK-NEXT: ret i1 [[AND]]1299;1300 %c.off = add i8 %c, -971301 %cmp1 = icmp ugt i8 %c.off, 251302 %c.off2 = add i8 %c, -641303 %cmp2 = icmp ugt i8 %c.off2, 251304 %and = and i1 %cmp1, %cmp21305 ret i1 %and1306}1307 1308define i1 @and_two_ranges_to_mask_and_range_different_sizes(i8 %c) {1309; CHECK-LABEL: @and_two_ranges_to_mask_and_range_different_sizes(1310; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[C:%.*]], -1231311; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[TMP1]], -261312; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[C]], -901313; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[TMP2]], -251314; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]1315; CHECK-NEXT: ret i1 [[AND]]1316;1317 %c.off = add i8 %c, -971318 %cmp1 = icmp ugt i8 %c.off, 251319 %c.off2 = add i8 %c, -651320 %cmp2 = icmp ugt i8 %c.off2, 241321 %and = and i1 %cmp1, %cmp21322 ret i1 %and1323}1324 1325define i1 @and_two_ranges_to_mask_and_range_no_add_on_one_range(i16 %x) {1326; CHECK-LABEL: @and_two_ranges_to_mask_and_range_no_add_on_one_range(1327; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[X:%.*]], -201328; CHECK-NEXT: [[AND:%.*]] = icmp ugt i16 [[TMP1]], 111329; CHECK-NEXT: ret i1 [[AND]]1330;1331 %cmp1 = icmp uge i16 %x, 121332 %cmp2 = icmp ult i16 %x, 161333 %cmp3 = icmp uge i16 %x, 281334 %or = or i1 %cmp2, %cmp31335 %and = and i1 %cmp1, %or1336 ret i1 %and1337}1338 1339; This tests an "is_alpha" style check for the combination of logical or1340; and nowrap flags on the adds. In this case, the logical or will not be1341; converted into a bitwise or.1342define i1 @is_ascii_alphabetic(i32 %char) {1343; CHECK-LABEL: @is_ascii_alphabetic(1344; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[CHAR:%.*]], -331345; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -651346; CHECK-NEXT: [[LOGICAL:%.*]] = icmp ult i32 [[TMP2]], 261347; CHECK-NEXT: ret i1 [[LOGICAL]]1348;1349 %add1 = add nsw i32 %char, -651350 %cmp1 = icmp ult i32 %add1, 261351 %add2 = add nsw i32 %char, -971352 %cmp2 = icmp ult i32 %add2, 261353 %logical = select i1 %cmp1, i1 true, i1 %cmp21354 ret i1 %logical1355}1356 1357define i1 @is_ascii_alphabetic_inverted(i32 %char) {1358; CHECK-LABEL: @is_ascii_alphabetic_inverted(1359; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[CHAR:%.*]], -331360; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -911361; CHECK-NEXT: [[LOGICAL:%.*]] = icmp ult i32 [[TMP2]], -261362; CHECK-NEXT: ret i1 [[LOGICAL]]1363;1364 %add1 = add nsw i32 %char, -911365 %cmp1 = icmp ult i32 %add1, -261366 %add2 = add nsw i32 %char, -1231367 %cmp2 = icmp ult i32 %add2, -261368 %logical = select i1 %cmp1, i1 %cmp2, i1 false1369 ret i1 %logical1370}1371 1372define i1 @bitwise_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {1373; CHECK-LABEL: @bitwise_and_bitwise_and_icmps(1374; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421375; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1376; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11377; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1378; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1379; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C1]], [[TMP3]]1380; CHECK-NEXT: ret i1 [[AND2]]1381;1382 %c1 = icmp eq i8 %y, 421383 %x.m1 = and i8 %x, 11384 %z.shift = shl i8 1, %z1385 %x.m2 = and i8 %x, %z.shift1386 %c2 = icmp ne i8 %x.m1, 01387 %c3 = icmp ne i8 %x.m2, 01388 %and1 = and i1 %c1, %c21389 %and2 = and i1 %and1, %c31390 ret i1 %and21391}1392 1393define i1 @bitwise_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {1394; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm1(1395; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421396; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1397; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11398; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1399; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1400; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C1]], [[TMP3]]1401; CHECK-NEXT: ret i1 [[AND2]]1402;1403 %c1 = icmp eq i8 %y, 421404 %x.m1 = and i8 %x, 11405 %z.shift = shl i8 1, %z1406 %x.m2 = and i8 %x, %z.shift1407 %c2 = icmp ne i8 %x.m1, 01408 %c3 = icmp ne i8 %x.m2, 01409 %and1 = and i1 %c1, %c21410 %and2 = and i1 %c3, %and11411 ret i1 %and21412}1413 1414define i1 @bitwise_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {1415; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm2(1416; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421417; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1418; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11419; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1420; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1421; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP3]], [[C1]]1422; CHECK-NEXT: ret i1 [[AND2]]1423;1424 %c1 = icmp eq i8 %y, 421425 %x.m1 = and i8 %x, 11426 %z.shift = shl i8 1, %z1427 %x.m2 = and i8 %x, %z.shift1428 %c2 = icmp ne i8 %x.m1, 01429 %c3 = icmp ne i8 %x.m2, 01430 %and1 = and i1 %c2, %c11431 %and2 = and i1 %and1, %c31432 ret i1 %and21433}1434 1435define i1 @bitwise_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {1436; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm3(1437; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421438; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1439; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11440; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1441; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1442; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP3]], [[C1]]1443; CHECK-NEXT: ret i1 [[AND2]]1444;1445 %c1 = icmp eq i8 %y, 421446 %x.m1 = and i8 %x, 11447 %z.shift = shl i8 1, %z1448 %x.m2 = and i8 %x, %z.shift1449 %c2 = icmp ne i8 %x.m1, 01450 %c3 = icmp ne i8 %x.m2, 01451 %and1 = and i1 %c2, %c11452 %and2 = and i1 %c3, %and11453 ret i1 %and21454}1455 1456define i1 @bitwise_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {1457; CHECK-LABEL: @bitwise_and_logical_and_icmps(1458; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421459; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1460; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11461; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1462; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1463; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C1]], i1 [[TMP3]], i1 false1464; CHECK-NEXT: ret i1 [[AND2]]1465;1466 %c1 = icmp eq i8 %y, 421467 %x.m1 = and i8 %x, 11468 %z.shift = shl i8 1, %z1469 %x.m2 = and i8 %x, %z.shift1470 %c2 = icmp ne i8 %x.m1, 01471 %c3 = icmp ne i8 %x.m2, 01472 %and1 = select i1 %c1, i1 %c2, i1 false1473 %and2 = and i1 %and1, %c31474 ret i1 %and21475}1476 1477define i1 @bitwise_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {1478; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm1(1479; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421480; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1481; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11482; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1483; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1484; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C1]], i1 [[TMP3]], i1 false1485; CHECK-NEXT: ret i1 [[AND2]]1486;1487 %c1 = icmp eq i8 %y, 421488 %x.m1 = and i8 %x, 11489 %z.shift = shl i8 1, %z1490 %x.m2 = and i8 %x, %z.shift1491 %c2 = icmp ne i8 %x.m1, 01492 %c3 = icmp ne i8 %x.m2, 01493 %and1 = select i1 %c1, i1 %c2, i1 false1494 %and2 = and i1 %c3, %and11495 ret i1 %and21496}1497 1498define i1 @bitwise_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {1499; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm2(1500; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421501; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1502; CHECK-NEXT: [[TMP2:%.*]] = or i8 [[Z_SHIFT]], 11503; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[X:%.*]], [[TMP2]]1504; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i8 [[TMP3]], [[TMP2]]1505; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP4]], i1 [[C1]], i1 false1506; CHECK-NEXT: ret i1 [[AND2]]1507;1508 %c1 = icmp eq i8 %y, 421509 %x.m1 = and i8 %x, 11510 %z.shift = shl i8 1, %z1511 %x.m2 = and i8 %x, %z.shift1512 %c2 = icmp ne i8 %x.m1, 01513 %c3 = icmp ne i8 %x.m2, 01514 %and1 = select i1 %c2, i1 %c1, i1 false1515 %and2 = and i1 %and1, %c31516 ret i1 %and21517}1518 1519define i1 @bitwise_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {1520; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm3(1521; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421522; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1523; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11524; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1525; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1526; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C1]], i1 false1527; CHECK-NEXT: ret i1 [[AND2]]1528;1529 %c1 = icmp eq i8 %y, 421530 %x.m1 = and i8 %x, 11531 %z.shift = shl i8 1, %z1532 %x.m2 = and i8 %x, %z.shift1533 %c2 = icmp ne i8 %x.m1, 01534 %c3 = icmp ne i8 %x.m2, 01535 %and1 = select i1 %c2, i1 %c1, i1 false1536 %and2 = and i1 %c3, %and11537 ret i1 %and21538}1539 1540define i1 @logical_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {1541; CHECK-LABEL: @logical_and_bitwise_and_icmps(1542; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421543; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11544; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1545; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1546; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01547; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01548; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]1549; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false1550; CHECK-NEXT: ret i1 [[AND2]]1551;1552 %c1 = icmp eq i8 %y, 421553 %x.m1 = and i8 %x, 11554 %z.shift = shl i8 1, %z1555 %x.m2 = and i8 %x, %z.shift1556 %c2 = icmp ne i8 %x.m1, 01557 %c3 = icmp ne i8 %x.m2, 01558 %and1 = and i1 %c1, %c21559 %and2 = select i1 %and1, i1 %c3, i1 false1560 ret i1 %and21561}1562 1563define i1 @logical_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {1564; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm1(1565; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421566; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11567; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1568; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1569; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01570; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01571; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]1572; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false1573; CHECK-NEXT: ret i1 [[AND2]]1574;1575 %c1 = icmp eq i8 %y, 421576 %x.m1 = and i8 %x, 11577 %z.shift = shl i8 1, %z1578 %x.m2 = and i8 %x, %z.shift1579 %c2 = icmp ne i8 %x.m1, 01580 %c3 = icmp ne i8 %x.m2, 01581 %and1 = and i1 %c1, %c21582 %and2 = select i1 %c3, i1 %and1, i1 false1583 ret i1 %and21584}1585 1586define i1 @logical_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {1587; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm2(1588; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421589; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11590; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1591; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1592; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01593; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01594; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]1595; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false1596; CHECK-NEXT: ret i1 [[AND2]]1597;1598 %c1 = icmp eq i8 %y, 421599 %x.m1 = and i8 %x, 11600 %z.shift = shl i8 1, %z1601 %x.m2 = and i8 %x, %z.shift1602 %c2 = icmp ne i8 %x.m1, 01603 %c3 = icmp ne i8 %x.m2, 01604 %and1 = and i1 %c2, %c11605 %and2 = select i1 %and1, i1 %c3, i1 false1606 ret i1 %and21607}1608 1609define i1 @logical_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {1610; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm3(1611; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421612; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11613; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1614; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1615; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01616; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01617; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]1618; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false1619; CHECK-NEXT: ret i1 [[AND2]]1620;1621 %c1 = icmp eq i8 %y, 421622 %x.m1 = and i8 %x, 11623 %z.shift = shl i8 1, %z1624 %x.m2 = and i8 %x, %z.shift1625 %c2 = icmp ne i8 %x.m1, 01626 %c3 = icmp ne i8 %x.m2, 01627 %and1 = and i1 %c2, %c11628 %and2 = select i1 %c3, i1 %and1, i1 false1629 ret i1 %and21630}1631 1632define i1 @logical_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {1633; CHECK-LABEL: @logical_and_logical_and_icmps(1634; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421635; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11636; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1637; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1638; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01639; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01640; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false1641; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false1642; CHECK-NEXT: ret i1 [[AND2]]1643;1644 %c1 = icmp eq i8 %y, 421645 %x.m1 = and i8 %x, 11646 %z.shift = shl i8 1, %z1647 %x.m2 = and i8 %x, %z.shift1648 %c2 = icmp ne i8 %x.m1, 01649 %c3 = icmp ne i8 %x.m2, 01650 %and1 = select i1 %c1, i1 %c2, i1 false1651 %and2 = select i1 %and1, i1 %c3, i1 false1652 ret i1 %and21653}1654 1655define i1 @logical_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {1656; CHECK-LABEL: @logical_and_logical_and_icmps_comm1(1657; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421658; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11659; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1660; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1661; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01662; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01663; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 [[C1]], i1 false1664; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP1]], i1 [[C2]], i1 false1665; CHECK-NEXT: ret i1 [[AND2]]1666;1667 %c1 = icmp eq i8 %y, 421668 %x.m1 = and i8 %x, 11669 %z.shift = shl i8 1, %z1670 %x.m2 = and i8 %x, %z.shift1671 %c2 = icmp ne i8 %x.m1, 01672 %c3 = icmp ne i8 %x.m2, 01673 %and1 = select i1 %c1, i1 %c2, i1 false1674 %and2 = select i1 %c3, i1 %and1, i1 false1675 ret i1 %and21676}1677 1678define i1 @logical_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {1679; CHECK-LABEL: @logical_and_logical_and_icmps_comm2(1680; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421681; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11682; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1683; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1684; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 01685; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 01686; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C2]], i1 [[C1]], i1 false1687; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false1688; CHECK-NEXT: ret i1 [[AND2]]1689;1690 %c1 = icmp eq i8 %y, 421691 %x.m1 = and i8 %x, 11692 %z.shift = shl i8 1, %z1693 %x.m2 = and i8 %x, %z.shift1694 %c2 = icmp ne i8 %x.m1, 01695 %c3 = icmp ne i8 %x.m2, 01696 %and1 = select i1 %c2, i1 %c1, i1 false1697 %and2 = select i1 %and1, i1 %c3, i1 false1698 ret i1 %and21699}1700 1701define i1 @logical_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {1702; CHECK-LABEL: @logical_and_logical_and_icmps_comm3(1703; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421704; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1705; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11706; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1707; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]1708; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C1]], i1 false1709; CHECK-NEXT: ret i1 [[AND2]]1710;1711 %c1 = icmp eq i8 %y, 421712 %x.m1 = and i8 %x, 11713 %z.shift = shl i8 1, %z1714 %x.m2 = and i8 %x, %z.shift1715 %c2 = icmp ne i8 %x.m1, 01716 %c3 = icmp ne i8 %x.m2, 01717 %and1 = select i1 %c2, i1 %c1, i1 false1718 %and2 = select i1 %c3, i1 %and1, i1 false1719 ret i1 %and21720}1721 1722define i1 @bitwise_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {1723; CHECK-LABEL: @bitwise_or_bitwise_or_icmps(1724; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421725; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1726; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11727; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1728; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1729; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C1]], [[TMP3]]1730; CHECK-NEXT: ret i1 [[OR2]]1731;1732 %c1 = icmp eq i8 %y, 421733 %x.m1 = and i8 %x, 11734 %z.shift = shl i8 1, %z1735 %x.m2 = and i8 %x, %z.shift1736 %c2 = icmp eq i8 %x.m1, 01737 %c3 = icmp eq i8 %x.m2, 01738 %or1 = or i1 %c1, %c21739 %or2 = or i1 %or1, %c31740 ret i1 %or21741}1742 1743define i1 @bitwise_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {1744; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm1(1745; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421746; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1747; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11748; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1749; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1750; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C1]], [[TMP3]]1751; CHECK-NEXT: ret i1 [[OR2]]1752;1753 %c1 = icmp eq i8 %y, 421754 %x.m1 = and i8 %x, 11755 %z.shift = shl i8 1, %z1756 %x.m2 = and i8 %x, %z.shift1757 %c2 = icmp eq i8 %x.m1, 01758 %c3 = icmp eq i8 %x.m2, 01759 %or1 = or i1 %c1, %c21760 %or2 = or i1 %c3, %or11761 ret i1 %or21762}1763 1764define i1 @bitwise_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {1765; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm2(1766; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421767; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1768; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11769; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1770; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1771; CHECK-NEXT: [[OR2:%.*]] = or i1 [[TMP3]], [[C1]]1772; CHECK-NEXT: ret i1 [[OR2]]1773;1774 %c1 = icmp eq i8 %y, 421775 %x.m1 = and i8 %x, 11776 %z.shift = shl i8 1, %z1777 %x.m2 = and i8 %x, %z.shift1778 %c2 = icmp eq i8 %x.m1, 01779 %c3 = icmp eq i8 %x.m2, 01780 %or1 = or i1 %c2, %c11781 %or2 = or i1 %or1, %c31782 ret i1 %or21783}1784 1785define i1 @bitwise_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {1786; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm3(1787; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421788; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1789; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11790; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1791; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1792; CHECK-NEXT: [[OR2:%.*]] = or i1 [[TMP3]], [[C1]]1793; CHECK-NEXT: ret i1 [[OR2]]1794;1795 %c1 = icmp eq i8 %y, 421796 %x.m1 = and i8 %x, 11797 %z.shift = shl i8 1, %z1798 %x.m2 = and i8 %x, %z.shift1799 %c2 = icmp eq i8 %x.m1, 01800 %c3 = icmp eq i8 %x.m2, 01801 %or1 = or i1 %c2, %c11802 %or2 = or i1 %c3, %or11803 ret i1 %or21804}1805 1806define i1 @bitwise_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {1807; CHECK-LABEL: @bitwise_or_logical_or_icmps(1808; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421809; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1810; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11811; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1812; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1813; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP3]]1814; CHECK-NEXT: ret i1 [[OR2]]1815;1816 %c1 = icmp eq i8 %y, 421817 %x.m1 = and i8 %x, 11818 %z.shift = shl i8 1, %z1819 %x.m2 = and i8 %x, %z.shift1820 %c2 = icmp eq i8 %x.m1, 01821 %c3 = icmp eq i8 %x.m2, 01822 %or1 = select i1 %c1, i1 true, i1 %c21823 %or2 = or i1 %or1, %c31824 ret i1 %or21825}1826 1827define i1 @bitwise_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {1828; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm1(1829; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421830; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1831; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11832; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1833; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1834; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C1]], i1 true, i1 [[TMP3]]1835; CHECK-NEXT: ret i1 [[OR2]]1836;1837 %c1 = icmp eq i8 %y, 421838 %x.m1 = and i8 %x, 11839 %z.shift = shl i8 1, %z1840 %x.m2 = and i8 %x, %z.shift1841 %c2 = icmp eq i8 %x.m1, 01842 %c3 = icmp eq i8 %x.m2, 01843 %or1 = select i1 %c1, i1 true, i1 %c21844 %or2 = or i1 %c3, %or11845 ret i1 %or21846}1847 1848define i1 @bitwise_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {1849; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm2(1850; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421851; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1852; CHECK-NEXT: [[TMP2:%.*]] = or i8 [[Z_SHIFT]], 11853; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[X:%.*]], [[TMP2]]1854; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], [[TMP2]]1855; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP4]], i1 true, i1 [[C1]]1856; CHECK-NEXT: ret i1 [[OR2]]1857;1858 %c1 = icmp eq i8 %y, 421859 %x.m1 = and i8 %x, 11860 %z.shift = shl i8 1, %z1861 %x.m2 = and i8 %x, %z.shift1862 %c2 = icmp eq i8 %x.m1, 01863 %c3 = icmp eq i8 %x.m2, 01864 %or1 = select i1 %c2, i1 true, i1 %c11865 %or2 = or i1 %or1, %c31866 ret i1 %or21867}1868 1869define i1 @bitwise_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {1870; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm3(1871; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421872; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1873; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 11874; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]1875; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]1876; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP3]], i1 true, i1 [[C1]]1877; CHECK-NEXT: ret i1 [[OR2]]1878;1879 %c1 = icmp eq i8 %y, 421880 %x.m1 = and i8 %x, 11881 %z.shift = shl i8 1, %z1882 %x.m2 = and i8 %x, %z.shift1883 %c2 = icmp eq i8 %x.m1, 01884 %c3 = icmp eq i8 %x.m2, 01885 %or1 = select i1 %c2, i1 true, i1 %c11886 %or2 = or i1 %c3, %or11887 ret i1 %or21888}1889 1890define i1 @logical_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {1891; CHECK-LABEL: @logical_or_bitwise_or_icmps(1892; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421893; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11894; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1895; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1896; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 01897; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 01898; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]1899; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]1900; CHECK-NEXT: ret i1 [[OR2]]1901;1902 %c1 = icmp eq i8 %y, 421903 %x.m1 = and i8 %x, 11904 %z.shift = shl i8 1, %z1905 %x.m2 = and i8 %x, %z.shift1906 %c2 = icmp eq i8 %x.m1, 01907 %c3 = icmp eq i8 %x.m2, 01908 %or1 = or i1 %c1, %c21909 %or2 = select i1 %or1, i1 true, i1 %c31910 ret i1 %or21911}1912 1913define i1 @logical_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {1914; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm1(1915; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421916; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11917; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1918; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1919; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 01920; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 01921; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]1922; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]1923; CHECK-NEXT: ret i1 [[OR2]]1924;1925 %c1 = icmp eq i8 %y, 421926 %x.m1 = and i8 %x, 11927 %z.shift = shl i8 1, %z1928 %x.m2 = and i8 %x, %z.shift1929 %c2 = icmp eq i8 %x.m1, 01930 %c3 = icmp eq i8 %x.m2, 01931 %or1 = or i1 %c1, %c21932 %or2 = select i1 %c3, i1 true, i1 %or11933 ret i1 %or21934}1935 1936define i1 @logical_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {1937; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm2(1938; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421939; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11940; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1941; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1942; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 01943; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 01944; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]1945; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]1946; CHECK-NEXT: ret i1 [[OR2]]1947;1948 %c1 = icmp eq i8 %y, 421949 %x.m1 = and i8 %x, 11950 %z.shift = shl i8 1, %z1951 %x.m2 = and i8 %x, %z.shift1952 %c2 = icmp eq i8 %x.m1, 01953 %c3 = icmp eq i8 %x.m2, 01954 %or1 = or i1 %c2, %c11955 %or2 = select i1 %or1, i1 true, i1 %c31956 ret i1 %or21957}1958 1959define i1 @logical_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {1960; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm3(1961; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421962; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11963; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1964; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1965; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 01966; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 01967; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]1968; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]1969; CHECK-NEXT: ret i1 [[OR2]]1970;1971 %c1 = icmp eq i8 %y, 421972 %x.m1 = and i8 %x, 11973 %z.shift = shl i8 1, %z1974 %x.m2 = and i8 %x, %z.shift1975 %c2 = icmp eq i8 %x.m1, 01976 %c3 = icmp eq i8 %x.m2, 01977 %or1 = or i1 %c2, %c11978 %or2 = select i1 %c3, i1 true, i1 %or11979 ret i1 %or21980}1981 1982define i1 @logical_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {1983; CHECK-LABEL: @logical_or_logical_or_icmps(1984; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 421985; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 11986; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]1987; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]1988; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 01989; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 01990; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]1991; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]1992; CHECK-NEXT: ret i1 [[OR2]]1993;1994 %c1 = icmp eq i8 %y, 421995 %x.m1 = and i8 %x, 11996 %z.shift = shl i8 1, %z1997 %x.m2 = and i8 %x, %z.shift1998 %c2 = icmp eq i8 %x.m1, 01999 %c3 = icmp eq i8 %x.m2, 02000 %or1 = select i1 %c1, i1 true, i1 %c22001 %or2 = select i1 %or1, i1 true, i1 %c32002 ret i1 %or22003}2004 2005define i1 @logical_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {2006; CHECK-LABEL: @logical_or_logical_or_icmps_comm1(2007; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 422008; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 12009; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]2010; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]2011; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 02012; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 02013; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 true, i1 [[C1]]2014; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP1]], i1 true, i1 [[C2]]2015; CHECK-NEXT: ret i1 [[OR2]]2016;2017 %c1 = icmp eq i8 %y, 422018 %x.m1 = and i8 %x, 12019 %z.shift = shl i8 1, %z2020 %x.m2 = and i8 %x, %z.shift2021 %c2 = icmp eq i8 %x.m1, 02022 %c3 = icmp eq i8 %x.m2, 02023 %or1 = select i1 %c1, i1 true, i1 %c22024 %or2 = select i1 %c3, i1 true, i1 %or12025 ret i1 %or22026}2027 2028define i1 @logical_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {2029; CHECK-LABEL: @logical_or_logical_or_icmps_comm2(2030; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 422031; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 12032; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]2033; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[X]], [[Z_SHIFT]]2034; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 02035; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 02036; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C2]], i1 true, i1 [[C1]]2037; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]2038; CHECK-NEXT: ret i1 [[OR2]]2039;2040 %c1 = icmp eq i8 %y, 422041 %x.m1 = and i8 %x, 12042 %z.shift = shl i8 1, %z2043 %x.m2 = and i8 %x, %z.shift2044 %c2 = icmp eq i8 %x.m1, 02045 %c3 = icmp eq i8 %x.m2, 02046 %or1 = select i1 %c2, i1 true, i1 %c12047 %or2 = select i1 %or1, i1 true, i1 %c32048 ret i1 %or22049}2050 2051define i1 @logical_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {2052; CHECK-LABEL: @logical_or_logical_or_icmps_comm3(2053; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 422054; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl nuw i8 1, [[Z:%.*]]2055; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 12056; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[X:%.*]], [[TMP1]]2057; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]2058; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP3]], i1 true, i1 [[C1]]2059; CHECK-NEXT: ret i1 [[OR2]]2060;2061 %c1 = icmp eq i8 %y, 422062 %x.m1 = and i8 %x, 12063 %z.shift = shl i8 1, %z2064 %x.m2 = and i8 %x, %z.shift2065 %c2 = icmp eq i8 %x.m1, 02066 %c3 = icmp eq i8 %x.m2, 02067 %or1 = select i1 %c2, i1 true, i1 %c12068 %or2 = select i1 %c3, i1 true, i1 %or12069 ret i1 %or22070}2071 2072define i1 @bitwise_and_logical_and_masked_icmp_asymmetric(i1 %c, i32 %x) {2073; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_asymmetric(2074; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X:%.*]], 112075; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], 112076; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C2]], i1 [[C:%.*]], i1 false2077; CHECK-NEXT: ret i1 [[AND2]]2078;2079 %x.m1 = and i32 %x, 2552080 %c1 = icmp ne i32 %x.m1, 02081 %and1 = select i1 %c1, i1 %c, i1 false2082 %x.m2 = and i32 %x, 112083 %c2 = icmp eq i32 %x.m2, 112084 %and2 = and i1 %and1, %c22085 ret i1 %and22086}2087 2088define i1 @bitwise_and_logical_and_masked_icmp_allzeros(i1 %c, i32 %x) {2089; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros(2090; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 152091; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 02092; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP2]], i1 [[C:%.*]], i1 false2093; CHECK-NEXT: ret i1 [[AND2]]2094;2095 %x.m1 = and i32 %x, 82096 %c1 = icmp eq i32 %x.m1, 02097 %and1 = select i1 %c1, i1 %c, i1 false2098 %x.m2 = and i32 %x, 72099 %c2 = icmp eq i32 %x.m2, 02100 %and2 = and i1 %and1, %c22101 ret i1 %and22102}2103 2104define i1 @bitwise_and_logical_and_masked_icmp_allzeros_poison1(i1 %c, i32 %x, i32 %y) {2105; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros_poison1(2106; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[Y:%.*]], 72107; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X:%.*]], [[TMP1]]2108; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 02109; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C:%.*]], i1 false2110; CHECK-NEXT: ret i1 [[AND2]]2111;2112 %x.m1 = and i32 %x, %y2113 %c1 = icmp eq i32 %x.m1, 02114 %and1 = select i1 %c1, i1 %c, i1 false2115 %x.m2 = and i32 %x, 72116 %c2 = icmp eq i32 %x.m2, 02117 %and2 = and i1 %and1, %c22118 ret i1 %and22119}2120 2121define i1 @bitwise_and_logical_and_masked_icmp_allzeros_poison2(i1 %c, i32 %x, i32 %y) {2122; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allzeros_poison2(2123; CHECK-NEXT: [[Y:%.*]] = or i32 [[Y1:%.*]], 82124; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X:%.*]], [[Y]]2125; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], 02126; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C2]], i1 [[C:%.*]], i1 false2127; CHECK-NEXT: ret i1 [[AND2]]2128;2129 %x.m1 = and i32 %x, 82130 %c1 = icmp eq i32 %x.m1, 02131 %and1 = select i1 %c1, i1 %c, i1 false2132 %x.m2 = and i32 %x, %y2133 %c2 = icmp eq i32 %x.m2, 02134 %and2 = and i1 %and1, %c22135 ret i1 %and22136}2137 2138define i1 @bitwise_and_logical_and_masked_icmp_allones(i1 %c, i32 %x) {2139; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones(2140; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 152141; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 152142; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP2]], i1 [[C:%.*]], i1 false2143; CHECK-NEXT: ret i1 [[AND2]]2144;2145 %x.m1 = and i32 %x, 82146 %c1 = icmp eq i32 %x.m1, 82147 %and1 = select i1 %c1, i1 %c, i1 false2148 %x.m2 = and i32 %x, 72149 %c2 = icmp eq i32 %x.m2, 72150 %and2 = and i1 %and1, %c22151 ret i1 %and22152}2153 2154define i1 @bitwise_and_logical_and_masked_icmp_allones_poison1(i1 %c, i32 %x, i32 %y) {2155; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones_poison1(2156; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[Y:%.*]], 72157; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X:%.*]], [[TMP1]]2158; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]2159; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C:%.*]], i1 false2160; CHECK-NEXT: ret i1 [[AND2]]2161;2162 %x.m1 = and i32 %x, %y2163 %c1 = icmp eq i32 %x.m1, %y2164 %and1 = select i1 %c1, i1 %c, i1 false2165 %x.m2 = and i32 %x, 72166 %c2 = icmp eq i32 %x.m2, 72167 %and2 = and i1 %and1, %c22168 ret i1 %and22169}2170 2171define i1 @bitwise_and_logical_and_masked_icmp_allones_poison2(i1 %c, i32 %x, i32 %y) {2172; CHECK-LABEL: @bitwise_and_logical_and_masked_icmp_allones_poison2(2173; CHECK-NEXT: [[Y:%.*]] = or i32 [[Y1:%.*]], 82174; CHECK-NEXT: [[X_M2:%.*]] = and i32 [[X:%.*]], [[Y]]2175; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[X_M2]], [[Y]]2176; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C2]], i1 [[C:%.*]], i1 false2177; CHECK-NEXT: ret i1 [[AND2]]2178;2179 %x.m1 = and i32 %x, 82180 %c1 = icmp eq i32 %x.m1, 82181 %and1 = select i1 %c1, i1 %c, i1 false2182 %x.m2 = and i32 %x, %y2183 %c2 = icmp eq i32 %x.m2, %y2184 %and2 = and i1 %and1, %c22185 ret i1 %and22186}2187 2188define i1 @samesign(i32 %x, i32 %y) {2189; CHECK-LABEL: @samesign(2190; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2191; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12192; CHECK-NEXT: ret i1 [[R]]2193;2194 %a = and i32 %x, %y2195 %lt = icmp slt i32 %a, 02196 %o = or i32 %x, %y2197 %gt = icmp sgt i32 %o, -12198 %r = or i1 %lt, %gt2199 ret i1 %r2200}2201 2202define <2 x i1> @samesign_different_sign_bittest1(<2 x i32> %x, <2 x i32> %y) {2203; CHECK-LABEL: @samesign_different_sign_bittest1(2204; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], [[Y:%.*]]2205; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i32> [[TMP1]], splat (i32 -1)2206; CHECK-NEXT: ret <2 x i1> [[R]]2207;2208 %a = and <2 x i32> %x, %y2209 %lt = icmp sle <2 x i32> %a, <i32 -1, i32 -1>2210 %o = or <2 x i32> %x, %y2211 %gt = icmp sgt <2 x i32> %o, <i32 -1, i32 -1>2212 %r = or <2 x i1> %lt, %gt2213 ret <2 x i1> %r2214}2215 2216define i1 @samesign_different_sign_bittest2(i32 %x, i32 %y) {2217; CHECK-LABEL: @samesign_different_sign_bittest2(2218; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2219; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12220; CHECK-NEXT: ret i1 [[R]]2221;2222 %a = and i32 %x, %y2223 %lt = icmp slt i32 %a, 02224 %o = or i32 %x, %y2225 %gt = icmp sge i32 %o, 02226 %r = or i1 %lt, %gt2227 ret i1 %r2228}2229 2230define i1 @samesign_commute1(i32 %x, i32 %y) {2231; CHECK-LABEL: @samesign_commute1(2232; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2233; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12234; CHECK-NEXT: ret i1 [[R]]2235;2236 %a = and i32 %x, %y2237 %lt = icmp slt i32 %a, 02238 %o = or i32 %x, %y2239 %gt = icmp sgt i32 %o, -12240 %r = or i1 %gt, %lt ; compares swapped2241 ret i1 %r2242}2243 2244define i1 @samesign_commute2(i32 %x, i32 %y) {2245; CHECK-LABEL: @samesign_commute2(2246; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2247; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12248; CHECK-NEXT: ret i1 [[R]]2249;2250 %a = and i32 %x, %y2251 %lt = icmp slt i32 %a, 02252 %o = or i32 %y, %x ; inputs commuted2253 %gt = icmp sgt i32 %o, -12254 %r = or i1 %lt, %gt2255 ret i1 %r2256}2257 2258define i1 @samesign_commute3(i32 %x, i32 %y) {2259; CHECK-LABEL: @samesign_commute3(2260; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]2261; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12262; CHECK-NEXT: ret i1 [[R]]2263;2264 %a = and i32 %x, %y2265 %lt = icmp slt i32 %a, 02266 %o = or i32 %y, %x ; inputs commuted2267 %gt = icmp sgt i32 %o, -12268 %r = or i1 %gt, %lt ; compares swapped2269 ret i1 %r2270}2271 2272define i1 @samesign_violate_constraint1(i32 %x, i32 %y) {2273; CHECK-LABEL: @samesign_violate_constraint1(2274; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]2275; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 02276; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2277; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -12278; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]2279; CHECK-NEXT: ret i1 [[R]]2280;2281 %a = or i32 %x, %y2282 %lt = icmp slt i32 %a, 02283 %o = or i32 %x, %y ; should be an and2284 %gt = icmp sgt i32 %o, -12285 %r = and i1 %lt, %gt2286 ret i1 %r2287}2288 2289define i1 @samesign_violate_constraint2(i32 %x, i32 %y) {2290; CHECK-LABEL: @samesign_violate_constraint2(2291; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2292; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 02293; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2294; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -12295; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]2296; CHECK-NEXT: ret i1 [[R]]2297;2298 %a = and i32 %x, %y2299 %lt = icmp slt i32 %a, 02300 %o = or i32 %x, %y2301 %gt = icmp sgt i32 %o, -12302 %r = and i1 %lt, %gt ; should be or2303 ret i1 %r2304}2305 2306define i1 @samesign_mult_use(i32 %x, i32 %y) {2307; CHECK-LABEL: @samesign_mult_use(2308; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2309; CHECK-NEXT: call void @use32(i32 [[A]])2310; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2311; CHECK-NEXT: call void @use32(i32 [[O]])2312; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]2313; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12314; CHECK-NEXT: ret i1 [[R]]2315;2316 %a = and i32 %x, %y2317 call void @use32(i32 %a)2318 %lt = icmp slt i32 %a, 02319 %o = or i32 %x, %y2320 call void @use32(i32 %o)2321 %gt = icmp sgt i32 %o, -12322 %r = or i1 %lt, %gt2323 ret i1 %r2324}2325 2326define i1 @samesign_mult_use2(i32 %x, i32 %y) {2327; CHECK-LABEL: @samesign_mult_use2(2328; CHECK-NEXT: [[O:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]2329; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -12330; CHECK-NEXT: call void @use(i1 [[GT]])2331; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]2332; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -12333; CHECK-NEXT: ret i1 [[R]]2334;2335 %a = and i32 %x, %y2336 %lt = icmp slt i32 %a, 02337 %o = or i32 %x, %y2338 %gt = icmp sgt i32 %o, -12339 call void @use(i1 %gt)2340 %r = or i1 %lt, %gt2341 ret i1 %r2342}2343 2344define i1 @samesign_mult_use3(i32 %x, i32 %y) {2345; CHECK-LABEL: @samesign_mult_use3(2346; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2347; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 02348; CHECK-NEXT: call void @use(i1 [[LT]])2349; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2350; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -12351; CHECK-NEXT: call void @use(i1 [[GT]])2352; CHECK-NEXT: [[R:%.*]] = or i1 [[LT]], [[GT]]2353; CHECK-NEXT: ret i1 [[R]]2354;2355 %a = and i32 %x, %y2356 %lt = icmp slt i32 %a, 02357 call void @use(i1 %lt)2358 %o = or i32 %x, %y2359 %gt = icmp sgt i32 %o, -12360 call void @use(i1 %gt)2361 %r = or i1 %lt, %gt2362 ret i1 %r2363}2364 2365define i1 @samesign_wrong_cmp(i32 %x, i32 %y) {2366; CHECK-LABEL: @samesign_wrong_cmp(2367; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2368; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[A]], 12369; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2370; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[O]], -12371; CHECK-NEXT: [[R:%.*]] = and i1 [[LT]], [[GT]]2372; CHECK-NEXT: ret i1 [[R]]2373;2374 %a = and i32 %x, %y2375 %lt = icmp slt i32 %a, 1 ; not a sign-bit test2376 %o = or i32 %x, %y2377 %gt = icmp sgt i32 %o, -12378 %r = and i1 %lt, %gt2379 ret i1 %r2380}2381 2382define i1 @samesign_inverted(i32 %x, i32 %y) {2383; CHECK-LABEL: @samesign_inverted(2384; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2385; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02386; CHECK-NEXT: ret i1 [[R]]2387;2388 %a = and i32 %x, %y2389 %gt = icmp sgt i32 %a, -12390 %o = or i32 %x, %y2391 %lt = icmp slt i32 %o, 02392 %r = and i1 %gt, %lt2393 ret i1 %r2394}2395 2396define i1 @samesign_inverted_different_sign_bittest1(i32 %x, i32 %y) {2397; CHECK-LABEL: @samesign_inverted_different_sign_bittest1(2398; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2399; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02400; CHECK-NEXT: ret i1 [[R]]2401;2402 %a = and i32 %x, %y2403 %gt = icmp sge i32 %a, 02404 %o = or i32 %x, %y2405 %lt = icmp slt i32 %o, 02406 %r = and i1 %gt, %lt2407 ret i1 %r2408}2409 2410define i1 @samesign_inverted_different_sign_bittest2(i32 %x, i32 %y) {2411; CHECK-LABEL: @samesign_inverted_different_sign_bittest2(2412; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2413; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02414; CHECK-NEXT: ret i1 [[R]]2415;2416 %a = and i32 %x, %y2417 %gt = icmp sgt i32 %a, -12418 %o = or i32 %x, %y2419 %lt = icmp sle i32 %o, -12420 %r = and i1 %gt, %lt2421 ret i1 %r2422}2423 2424define i1 @samesign_inverted_commute1(i32 %x, i32 %y) {2425; CHECK-LABEL: @samesign_inverted_commute1(2426; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2427; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02428; CHECK-NEXT: ret i1 [[R]]2429;2430 %a = and i32 %x, %y2431 %gt = icmp sgt i32 %a, -12432 %o = or i32 %x, %y2433 %lt = icmp slt i32 %o, 02434 %r = and i1 %lt, %gt ; compares swapped2435 ret i1 %r2436}2437 2438define i1 @samesign_inverted_commute2(i32 %x, i32 %y) {2439; CHECK-LABEL: @samesign_inverted_commute2(2440; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]2441; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02442; CHECK-NEXT: ret i1 [[R]]2443;2444 %a = and i32 %x, %y2445 %gt = icmp sgt i32 %a, -12446 %o = or i32 %y, %x ; source values are commuted2447 %lt = icmp slt i32 %o, 02448 %r = and i1 %gt, %lt2449 ret i1 %r2450}2451 2452define i1 @samesign_inverted_commute3(i32 %x, i32 %y) {2453; CHECK-LABEL: @samesign_inverted_commute3(2454; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]2455; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02456; CHECK-NEXT: ret i1 [[R]]2457;2458 %a = and i32 %x, %y2459 %gt = icmp sgt i32 %a, -12460 %o = or i32 %y, %x ; source values commuted2461 %lt = icmp slt i32 %o, 02462 %r = and i1 %lt, %gt ; compares swapped2463 ret i1 %r2464}2465 2466define i1 @samesign_inverted_violate_constraint1(i32 %x, i32 %y) {2467; CHECK-LABEL: @samesign_inverted_violate_constraint1(2468; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]2469; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -12470; CHECK-NEXT: [[O:%.*]] = and i32 [[X]], [[Y]]2471; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 02472; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]2473; CHECK-NEXT: ret i1 [[R]]2474;2475 %a = or i32 %x, %y ; should be and here2476 %gt = icmp sgt i32 %a, -12477 %o = and i32 %x, %y ; should be or here2478 %lt = icmp slt i32 %o, 02479 %r = and i1 %gt, %lt2480 ret i1 %r2481}2482define i1 @samesign_inverted_violate_constraint2(i32 %x, i32 %y) {2483; CHECK-LABEL: @samesign_inverted_violate_constraint2(2484; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2485; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -12486; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2487; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 02488; CHECK-NEXT: [[R:%.*]] = or i1 [[GT]], [[LT]]2489; CHECK-NEXT: ret i1 [[R]]2490;2491 %a = and i32 %x, %y2492 %gt = icmp sgt i32 %a, -12493 %o = or i32 %x, %y2494 %lt = icmp slt i32 %o, 02495 %r = or i1 %gt, %lt ; should be and here2496 ret i1 %r2497}2498 2499define i1 @samesign_inverted_mult_use(i32 %x, i32 %y) {2500; CHECK-LABEL: @samesign_inverted_mult_use(2501; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2502; CHECK-NEXT: call void @use32(i32 [[A]])2503; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2504; CHECK-NEXT: call void @use32(i32 [[O]])2505; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], [[Y]]2506; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 02507; CHECK-NEXT: ret i1 [[R]]2508;2509 %a = and i32 %x, %y2510 call void @use32(i32 %a)2511 %gt = icmp sgt i32 %a, -12512 %o = or i32 %x, %y2513 call void @use32(i32 %o)2514 %lt = icmp slt i32 %o, 02515 %r = and i1 %gt, %lt2516 ret i1 %r2517}2518 2519define i1 @samesign_inverted_mult_use2(i32 %x, i32 %y) {2520; CHECK-LABEL: @samesign_inverted_mult_use2(2521; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2522; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], -12523; CHECK-NEXT: call void @use(i1 [[GT]])2524; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2525; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 02526; CHECK-NEXT: call void @use(i1 [[LT]])2527; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]2528; CHECK-NEXT: ret i1 [[R]]2529;2530 %a = and i32 %x, %y2531 %gt = icmp sgt i32 %a, -12532 call void @use(i1 %gt)2533 %o = or i32 %x, %y2534 %lt = icmp slt i32 %o, 02535 call void @use(i1 %lt)2536 %r = and i1 %gt, %lt2537 ret i1 %r2538}2539 2540define i1 @samesign_inverted_wrong_cmp(i32 %x, i32 %y) {2541; CHECK-LABEL: @samesign_inverted_wrong_cmp(2542; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]2543; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[A]], 02544; CHECK-NEXT: [[O:%.*]] = or i32 [[X]], [[Y]]2545; CHECK-NEXT: [[LT:%.*]] = icmp slt i32 [[O]], 02546; CHECK-NEXT: [[R:%.*]] = and i1 [[GT]], [[LT]]2547; CHECK-NEXT: ret i1 [[R]]2548;2549 %a = and i32 %x, %y2550 %gt = icmp sgt i32 %a, 0 ; not a sign-bit test2551 %o = or i32 %x, %y2552 %lt = icmp slt i32 %o, 02553 %r = and i1 %gt, %lt2554 ret i1 %r2555}2556 2557define <2 x i1> @icmp_eq_m1_and_eq_m1(<2 x i8> %x, <2 x i8> %y) {2558; CHECK-LABEL: @icmp_eq_m1_and_eq_m1(2559; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]2560; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], splat (i8 -1)2561; CHECK-NEXT: ret <2 x i1> [[R]]2562;2563 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>2564 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 poison>2565 %r = and <2 x i1> %rx, %ry2566 ret <2 x i1> %r2567}2568 2569define <2 x i1> @icmp_eq_m1_and_eq_poison_m1(<2 x i8> %x, <2 x i8> %y) {2570; CHECK-LABEL: @icmp_eq_m1_and_eq_poison_m1(2571; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]2572; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], splat (i8 -1)2573; CHECK-NEXT: ret <2 x i1> [[R]]2574;2575 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>2576 %ry = icmp eq <2 x i8> %y, <i8 poison, i8 -1>2577 %r = and <2 x i1> %rx, %ry2578 ret <2 x i1> %r2579}2580 2581define <2 x i1> @icmp_eq_poison_and_eq_m1_m2(<2 x i8> %x, <2 x i8> %y) {2582; CHECK-LABEL: @icmp_eq_poison_and_eq_m1_m2(2583; CHECK-NEXT: ret <2 x i1> poison2584;2585 %rx = icmp eq <2 x i8> %x, <i8 poison, i8 poison>2586 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 -2>2587 %r = and <2 x i1> %rx, %ry2588 ret <2 x i1> %r2589}2590 2591define <2 x i1> @icmp_ne_m1_and_ne_m1_fail(<2 x i8> %x, <2 x i8> %y) {2592; CHECK-LABEL: @icmp_ne_m1_and_ne_m1_fail(2593; CHECK-NEXT: [[RX:%.*]] = icmp ne <2 x i8> [[X:%.*]], <i8 -1, i8 poison>2594; CHECK-NEXT: [[RY:%.*]] = icmp ne <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>2595; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[RX]], [[RY]]2596; CHECK-NEXT: ret <2 x i1> [[R]]2597;2598 %rx = icmp ne <2 x i8> %x, <i8 -1, i8 poison>2599 %ry = icmp ne <2 x i8> %y, <i8 -1, i8 poison>2600 %r = and <2 x i1> %rx, %ry2601 ret <2 x i1> %r2602}2603 2604 2605define <2 x i1> @icmp_eq_m1_or_eq_m1_fail(<2 x i8> %x, <2 x i8> %y) {2606; CHECK-LABEL: @icmp_eq_m1_or_eq_m1_fail(2607; CHECK-NEXT: [[RX:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 -1, i8 poison>2608; CHECK-NEXT: [[RY:%.*]] = icmp eq <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>2609; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[RX]], [[RY]]2610; CHECK-NEXT: ret <2 x i1> [[R]]2611;2612 %rx = icmp eq <2 x i8> %x, <i8 -1, i8 poison>2613 %ry = icmp eq <2 x i8> %y, <i8 -1, i8 poison>2614 %r = or <2 x i1> %rx, %ry2615 ret <2 x i1> %r2616}2617 2618 2619define <2 x i1> @icmp_ne_m1_or_ne_m1(<2 x i8> %x, <2 x i8> %y) {2620; CHECK-LABEL: @icmp_ne_m1_or_ne_m1(2621; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[Y:%.*]]2622; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], splat (i8 -1)2623; CHECK-NEXT: ret <2 x i1> [[R]]2624;2625 %rx = icmp ne <2 x i8> %x, <i8 -1, i8 -1>2626 %ry = icmp ne <2 x i8> %y, <i8 -1, i8 poison>2627 %r = or <2 x i1> %rx, %ry2628 ret <2 x i1> %r2629}2630 2631define i32 @icmp_slt_0_or_icmp_sgt_0_i32(i32 %x) {2632; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i32(2633; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 02634; CHECK-NEXT: [[E:%.*]] = zext i1 [[TMP1]] to i322635; CHECK-NEXT: ret i32 [[E]]2636;2637 %A = icmp slt i32 %x, 02638 %B = icmp sgt i32 %x, 02639 %C = zext i1 %A to i322640 %D = zext i1 %B to i322641 %E = or i32 %C, %D2642 ret i32 %E2643}2644 2645define i64 @icmp_slt_0_or_icmp_sgt_0_i64(i64 %x) {2646; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64(2647; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[X:%.*]], 02648; CHECK-NEXT: [[E:%.*]] = zext i1 [[TMP1]] to i642649; CHECK-NEXT: ret i64 [[E]]2650;2651 %A = icmp slt i64 %x, 02652 %B = icmp sgt i64 %x, 02653 %C = zext i1 %A to i642654 %D = zext i1 %B to i642655 %E = or i64 %C, %D2656 ret i64 %E2657}2658 2659define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail0(i64 %x) {2660; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail0(2661; CHECK-NEXT: [[E:%.*]] = lshr i64 [[X:%.*]], 632662; CHECK-NEXT: ret i64 [[E]]2663;2664 %B = icmp slt i64 %x, 02665 %C = lshr i64 %x, 632666 %D = zext i1 %B to i642667 %E = or i64 %C, %D2668 ret i64 %E2669}2670 2671define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail1(i64 %x) {2672; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail1(2673; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 02674; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X]], 632675; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i642676; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]2677; CHECK-NEXT: ret i64 [[E]]2678;2679 %B = icmp sgt i64 %x, 02680 %C = ashr i64 %x, 632681 %D = zext i1 %B to i642682 %E = or i64 %C, %D2683 ret i64 %E2684}2685 2686define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail2(i64 %x) {2687; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail2(2688; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 02689; CHECK-NEXT: [[C:%.*]] = lshr i64 [[X]], 622690; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i642691; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]2692; CHECK-NEXT: ret i64 [[E]]2693;2694 %B = icmp sgt i64 %x, 02695 %C = lshr i64 %x, 622696 %D = zext i1 %B to i642697 %E = or i64 %C, %D2698 ret i64 %E2699}2700 2701define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail3(i64 %x) {2702; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail3(2703; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X:%.*]], 622704; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i64 [[X]], 632705; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[X_LOBIT]]2706; CHECK-NEXT: ret i64 [[E]]2707;2708 %B = icmp slt i64 %x, 02709 %C = ashr i64 %x, 622710 %D = zext i1 %B to i642711 %E = or i64 %C, %D2712 ret i64 %E2713}2714 2715define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2(<2 x i64> %x) {2716; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2(2717; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i64> [[X:%.*]], zeroinitializer2718; CHECK-NEXT: [[E:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>2719; CHECK-NEXT: ret <2 x i64> [[E]]2720;2721 %A = icmp slt <2 x i64> %x, <i64 0,i64 0>2722 %B = icmp sgt <2 x i64> %x, <i64 0,i64 0>2723 %C = zext <2 x i1> %A to <2 x i64>2724 %D = zext <2 x i1> %B to <2 x i64>2725 %E = or <2 x i64> %C, %D2726 ret <2 x i64> %E2727}2728 2729define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(<2 x i64> %x) {2730; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(2731; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[X:%.*]], splat (i64 1)2732; CHECK-NEXT: [[E:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>2733; CHECK-NEXT: ret <2 x i64> [[E]]2734;2735 %B = icmp sgt <2 x i64> %x, <i64 1, i64 1>2736 %C = lshr <2 x i64> %x, <i64 63, i64 63>2737 %D = zext <2 x i1> %B to <2 x i64>2738 %E = or <2 x i64> %C, %D2739 ret <2 x i64> %E2740 2741}2742 2743define i32 @icmp_slt_0_and_icmp_sge_neg1_i32(i32 %x) {2744; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32(2745; CHECK-NEXT: ret i32 02746;2747 %A = icmp sgt i32 %x, -12748 %B = zext i1 %A to i322749 %C = lshr i32 %x, 312750 %D = and i32 %C, %B2751 ret i32 %D2752}2753 2754define i32 @icmp_slt_0_or_icmp_sge_neg1_i32(i32 %x) {2755; CHECK-LABEL: @icmp_slt_0_or_icmp_sge_neg1_i32(2756; CHECK-NEXT: ret i32 12757;2758 %A = icmp sge i32 %x, -12759 %B = zext i1 %A to i322760 %C = lshr i32 %x, 312761 %D = or i32 %C, %B2762 ret i32 %D2763}2764 2765define i32 @icmp_slt_0_or_icmp_sge_100_i32(i32 %x) {2766; CHECK-LABEL: @icmp_slt_0_or_icmp_sge_100_i32(2767; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 992768; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i322769; CHECK-NEXT: ret i32 [[D]]2770;2771 %A = icmp sge i32 %x, 1002772 %B = zext i1 %A to i322773 %C = lshr i32 %x, 312774 %D = or i32 %C, %B2775 ret i32 %D2776}2777 2778define i64 @icmp_slt_0_and_icmp_sge_neg1_i64(i64 %x) {2779; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i64(2780; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[X:%.*]], -12781; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i642782; CHECK-NEXT: ret i64 [[D]]2783;2784 %A = icmp sge i64 %x, -12785 %B = zext i1 %A to i642786 %C = lshr i64 %x, 632787 %D = and i64 %C, %B2788 ret i64 %D2789}2790 2791define i64 @icmp_slt_0_and_icmp_sge_neg2_i64(i64 %x) {2792; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i64(2793; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[X:%.*]], -32794; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i642795; CHECK-NEXT: ret i64 [[D]]2796;2797 %A = icmp sge i64 %x, -22798 %B = zext i1 %A to i642799 %C = lshr i64 %x, 632800 %D = and i64 %C, %B2801 ret i64 %D2802}2803 2804define i64 @ashr_and_icmp_sge_neg1_i64(i64 %x) {2805; CHECK-LABEL: @ashr_and_icmp_sge_neg1_i64(2806; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[X:%.*]], -12807; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i642808; CHECK-NEXT: ret i64 [[D]]2809;2810 %A = icmp sge i64 %x, -12811 %B = zext i1 %A to i642812 %C = ashr i64 %x, 632813 %D = and i64 %C, %B2814 ret i64 %D2815}2816 2817define i64 @icmp_slt_0_and_icmp_sgt_neg1_i64(i64 %x) {2818; CHECK-LABEL: @icmp_slt_0_and_icmp_sgt_neg1_i64(2819; CHECK-NEXT: ret i64 02820;2821 %A = icmp sgt i64 %x, -12822 %B = zext i1 %A to i642823 %C = lshr i64 %x, 632824 %D = and i64 %C, %B2825 ret i64 %D2826}2827 2828define i64 @icmp_slt_0_and_icmp_sge_neg1_i64_fail(i64 %x) {2829; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i64_fail(2830; CHECK-NEXT: [[A:%.*]] = icmp sgt i64 [[X:%.*]], -22831; CHECK-NEXT: [[C:%.*]] = lshr i64 [[X]], 622832; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[C]], 12833; CHECK-NEXT: [[D:%.*]] = select i1 [[A]], i64 [[TMP1]], i64 02834; CHECK-NEXT: ret i64 [[D]]2835;2836 %A = icmp sge i64 %x, -12837 %B = zext i1 %A to i642838 %C = lshr i64 %x, 622839 %D = and i64 %C, %B2840 ret i64 %D2841}2842 2843define <2 x i32> @icmp_slt_0_and_icmp_sge_neg1_i32x2(<2 x i32> %x) {2844; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32x2(2845; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], splat (i32 -1)2846; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>2847; CHECK-NEXT: ret <2 x i32> [[D]]2848;2849 %A = icmp sge <2 x i32> %x, <i32 -1, i32 -1>2850 %B = zext <2 x i1> %A to <2 x i32>2851 %C = lshr <2 x i32> %x, <i32 31, i32 31>2852 %D = and <2 x i32> %C, %B2853 ret <2 x i32> %D2854}2855 2856define <2 x i32> @icmp_slt_0_and_icmp_sge_neg2_i32x2(<2 x i32> %x) {2857; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32x2(2858; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[X:%.*]], splat (i32 -3)2859; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>2860; CHECK-NEXT: ret <2 x i32> [[D]]2861;2862 %A = icmp sge <2 x i32> %x, <i32 -2, i32 -2>2863 %B = zext <2 x i1> %A to <2 x i32>2864 %C = lshr <2 x i32> %x, <i32 31, i32 31>2865 %D = and <2 x i32> %C, %B2866 ret <2 x i32> %D2867}2868 2869 2870define i32 @icmp_x_slt_0_xor_icmp_y_sgt_neg1_i32(i32 %x, i32 %y) {2871; CHECK-LABEL: @icmp_x_slt_0_xor_icmp_y_sgt_neg1_i32(2872; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]2873; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -12874; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i322875; CHECK-NEXT: ret i32 [[D]]2876;2877 %A = icmp sgt i32 %x, -12878 %B = zext i1 %A to i322879 %C = lshr i32 %y, 312880 %D = xor i32 %C, %B2881 ret i32 %D2882}2883 2884define i32 @icmp_slt_0_xor_icmp_sgt_neg2_i32(i32 %x) {2885; CHECK-LABEL: @icmp_slt_0_xor_icmp_sgt_neg2_i32(2886; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], -12887; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i322888; CHECK-NEXT: ret i32 [[D]]2889;2890 %A = icmp sgt i32 %x, -22891 %B = zext i1 %A to i322892 %C = lshr i32 %x, 312893 %D = xor i32 %C, %B2894 ret i32 %D2895}2896 2897define i32 @icmp_slt_0_and_icmp_sge_neg1_i32_multiuse0(i32 %x) {2898; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg1_i32_multiuse0(2899; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -32900; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X]], -32901; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i322902; CHECK-NEXT: call void @use(i1 [[A]])2903; CHECK-NEXT: ret i32 [[D]]2904;2905 %A = icmp sge i32 %x, -22906 %B = zext i1 %A to i322907 %C = lshr i32 %x, 312908 %D = and i32 %C, %B2909 call void @use(i1 %A)2910 ret i32 %D2911}2912 2913define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse1(i32 %x) {2914; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse1(2915; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -32916; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i322917; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 312918; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], [[B]]2919; CHECK-NEXT: call void @use32(i32 [[B]])2920; CHECK-NEXT: ret i32 [[D]]2921;2922 %A = icmp sge i32 %x, -22923 %B = zext i1 %A to i322924 %C = lshr i32 %x, 312925 %D = and i32 %C, %B2926 call void @use32(i32 %B)2927 ret i32 %D2928}2929 2930define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse2(i32 %x) {2931; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse2(2932; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -32933; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 312934; CHECK-NEXT: [[D:%.*]] = select i1 [[A]], i32 [[C]], i32 02935; CHECK-NEXT: call void @use32(i32 [[C]])2936; CHECK-NEXT: ret i32 [[D]]2937;2938 %A = icmp sge i32 %x, -22939 %B = zext i1 %A to i322940 %C = lshr i32 %x, 312941 %D = and i32 %C, %B2942 call void @use32(i32 %C)2943 ret i32 %D2944}2945 2946define i32 @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse_fail0(i32 %x) {2947; CHECK-LABEL: @icmp_slt_0_and_icmp_sge_neg2_i32_multiuse_fail0(2948; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -32949; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i322950; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 312951; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], [[B]]2952; CHECK-NEXT: call void @use32(i32 [[B]])2953; CHECK-NEXT: call void @use32(i32 [[C]])2954; CHECK-NEXT: ret i32 [[D]]2955;2956 %A = icmp sge i32 %x, -22957 %B = zext i1 %A to i322958 %C = lshr i32 %x, 312959 %D = and i32 %C, %B2960 call void @use32(i32 %B)2961 call void @use32(i32 %C)2962 ret i32 %D2963}2964 2965define i32 @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail1(i32 %x) {2966; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail1(2967; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 1002968; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i322969; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 312970; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], [[B]]2971; CHECK-NEXT: call void @use32(i32 [[C]])2972; CHECK-NEXT: ret i32 [[D]]2973;2974 %A = icmp eq i32 %x, 1002975 %B = zext i1 %A to i322976 %C = lshr i32 %x, 312977 %D = or i32 %C, %B2978 call void @use32(i32 %C)2979 ret i32 %D2980}2981 2982define i32 @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_multiuse_fail2(i32 %x, i32 %y) {2983; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_multiuse_fail2(2984; CHECK-NEXT: [[A_NOT:%.*]] = icmp eq i32 [[X:%.*]], -22985; CHECK-NEXT: [[C:%.*]] = lshr i32 [[Y:%.*]], 312986; CHECK-NEXT: [[D:%.*]] = select i1 [[A_NOT]], i32 0, i32 [[C]]2987; CHECK-NEXT: call void @use32(i32 [[C]])2988; CHECK-NEXT: ret i32 [[D]]2989;2990 %A = icmp ne i32 %x, -22991 %B = zext i1 %A to i322992 %C = lshr i32 %y, 312993 %D = and i32 %C, %B2994 call void @use32(i32 %C)2995 ret i32 %D2996}2997 2998define i32 @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail3(i32 %x) {2999; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_multiuse_fail3(3000; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 1003001; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i323002; CHECK-NEXT: [[C:%.*]] = lshr i32 [[X]], 313003; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], [[B]]3004; CHECK-NEXT: call void @use32(i32 [[B]])3005; CHECK-NEXT: ret i32 [[D]]3006;3007 %A = icmp eq i32 %x, 1003008 %B = zext i1 %A to i323009 %C = lshr i32 %x, 313010 %D = or i32 %C, %B3011 call void @use32(i32 %B)3012 ret i32 %D3013}3014 3015define i32 @icmp_slt_0_or_icmp_eq_100_i32_fail(i32 %x) {3016; CHECK-LABEL: @icmp_slt_0_or_icmp_eq_100_i32_fail(3017; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[X:%.*]], 1003018; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 03019; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[A]]3020; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i323021; CHECK-NEXT: ret i32 [[D]]3022;3023 %A = icmp eq i32 %x, 1003024 %B = zext i1 %A to i323025 %C = lshr i32 %x, 313026 %D = or i32 %C, %B3027 ret i32 %D3028}3029 3030define i32 @icmp_slt_0_and_icmp_ne_neg2_i32_fail(i32 %x) {3031; CHECK-LABEL: @icmp_slt_0_and_icmp_ne_neg2_i32_fail(3032; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], -23033; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 03034; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]3035; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i323036; CHECK-NEXT: ret i32 [[D]]3037;3038 %A = icmp ne i32 %x, -23039 %B = zext i1 %A to i323040 %C = lshr i32 %x, 313041 %D = and i32 %C, %B3042 ret i32 %D3043}3044 3045define i32 @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_fail(i32 %x, i32 %y) {3046; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_ne_neg2_i32_fail(3047; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], -23048; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[Y:%.*]], 03049; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]3050; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i323051; CHECK-NEXT: ret i32 [[D]]3052;3053 %A = icmp ne i32 %x, -23054 %B = zext i1 %A to i323055 %C = lshr i32 %y, 313056 %D = and i32 %C, %B3057 ret i32 %D3058}3059 3060define i32 @icmp_x_slt_0_and_icmp_y_sgt_neg1_i32_fail(i32 %x, i32 %y) {3061; CHECK-LABEL: @icmp_x_slt_0_and_icmp_y_sgt_neg1_i32_fail(3062; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -13063; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[Y:%.*]], 03064; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[A]]3065; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i323066; CHECK-NEXT: ret i32 [[D]]3067;3068 %A = icmp sgt i32 %x, -13069 %B = zext i1 %A to i323070 %C = lshr i32 %y, 313071 %D = and i32 %C, %B3072 ret i32 %D3073}3074 3075define i32 @icmp_slt_0_xor_icmp_sge_neg2_i32_fail(i32 %x) {3076; CHECK-LABEL: @icmp_slt_0_xor_icmp_sge_neg2_i32_fail(3077; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -23078; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP1]] to i323079; CHECK-NEXT: ret i32 [[D]]3080;3081 %A = icmp sge i32 %x, -23082 %B = zext i1 %A to i323083 %C = lshr i32 %x, 313084 %D = xor i32 %C, %B3085 ret i32 %D3086}3087 3088define i32 @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(i32 %x) {3089; CHECK-LABEL: @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(3090; CHECK-NEXT: [[X1:%.*]] = add i32 [[X:%.*]], 13091; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X1]], 993092; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], 03093; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[A]]3094; CHECK-NEXT: [[D:%.*]] = zext i1 [[TMP2]] to i323095; CHECK-NEXT: ret i32 [[D]]3096;3097 %X1 = add i32 %x, 13098 %A = icmp sge i32 %X1, 1003099 %B = zext i1 %A to i323100 %C = lshr i32 %x, 313101 %D = or i32 %C, %B3102 ret i32 %D3103}3104 3105define i1 @logical_and_icmps1(i32 %a, i1 %other_cond) {3106; CHECK-LABEL: @logical_and_icmps1(3107; CHECK-NEXT: entry:3108; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[A:%.*]], 100863109; CHECK-NEXT: [[RET:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[TMP0]], i1 false3110; CHECK-NEXT: ret i1 [[RET]]3111;3112entry:3113 %cmp1 = icmp sgt i32 %a, -13114 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false3115 %cmp2 = icmp slt i32 %a, 100863116 %ret = select i1 %logical_and, i1 %cmp2, i1 false3117 ret i1 %ret3118}3119 3120define i1 @logical_and_icmps2(i32 %a, i1 %other_cond) {3121; CHECK-LABEL: @logical_and_icmps2(3122; CHECK-NEXT: entry:3123; CHECK-NEXT: ret i1 false3124;3125entry:3126 %cmp1 = icmp slt i32 %a, -13127 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false3128 %cmp2 = icmp eq i32 %a, 100863129 %ret = select i1 %logical_and, i1 %cmp2, i1 false3130 ret i1 %ret3131}3132 3133define <4 x i1> @logical_and_icmps_vec1(<4 x i32> %a, <4 x i1> %other_cond) {3134; CHECK-LABEL: @logical_and_icmps_vec1(3135; CHECK-NEXT: entry:3136; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[A:%.*]], splat (i32 10086)3137; CHECK-NEXT: [[RET:%.*]] = select <4 x i1> [[OTHER_COND:%.*]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer3138; CHECK-NEXT: ret <4 x i1> [[RET]]3139;3140entry:3141 %cmp1 = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1 >3142 %logical_and = select <4 x i1> %other_cond, <4 x i1> %cmp1, <4 x i1> zeroinitializer3143 %cmp2 = icmp slt <4 x i32> %a, <i32 10086, i32 10086, i32 10086, i32 10086 >3144 %ret = select <4 x i1> %logical_and, <4 x i1> %cmp2, <4 x i1> zeroinitializer3145 ret <4 x i1> %ret3146}3147 3148define i1 @logical_and_icmps_fail1(i32 %a, i32 %b, i1 %other_cond) {3149; CHECK-LABEL: @logical_and_icmps_fail1(3150; CHECK-NEXT: entry:3151; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A:%.*]], -13152; CHECK-NEXT: [[LOGICAL_AND:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[CMP1]], i1 false3153; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B:%.*]]3154; CHECK-NEXT: [[RET:%.*]] = select i1 [[LOGICAL_AND]], i1 [[CMP2]], i1 false3155; CHECK-NEXT: ret i1 [[RET]]3156;3157entry:3158 %cmp1 = icmp sgt i32 %a, -13159 %logical_and = select i1 %other_cond, i1 %cmp1, i1 false3160 %cmp2 = icmp slt i32 %a, %b3161 %ret = select i1 %logical_and, i1 %cmp2, i1 false3162 ret i1 %ret3163}3164 3165 3166define i1 @icmp_eq_or_z_or_pow2orz(i8 %x, i8 %y) {3167; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz(3168; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3169; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3170; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], [[POW2ORZ]]3171; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], [[X]]3172; CHECK-NEXT: ret i1 [[R]]3173;3174 %ny = sub i8 0, %y3175 %pow2orz = and i8 %ny, %y3176 3177 %c0 = icmp eq i8 %x, 03178 %cp2 = icmp eq i8 %x, %pow2orz3179 %r = or i1 %cp2, %c03180 ret i1 %r3181}3182 3183 3184define i1 @icmp_eq_or_z_or_pow2orz_logical(i8 %x, i8 %y) {3185; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_logical(3186; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3187; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3188; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], [[POW2ORZ]]3189; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], [[X]]3190; CHECK-NEXT: ret i1 [[R]]3191;3192 %ny = sub i8 0, %y3193 %pow2orz = and i8 %ny, %y3194 3195 %c0 = icmp eq i8 %x, 03196 %cp2 = icmp eq i8 %x, %pow2orz3197 %r = select i1 %cp2, i1 true, i1 %c03198 ret i1 %r3199}3200 3201 3202 3203define i1 @icmp_eq_or_z_or_pow2orz_fail_multiuse(i8 %x, i8 %y) {3204; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_multiuse(3205; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3206; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3207; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 03208; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[X]], [[POW2ORZ]]3209; CHECK-NEXT: call void @use(i1 [[C0]])3210; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]3211; CHECK-NEXT: ret i1 [[R]]3212;3213 %ny = sub i8 0, %y3214 %pow2orz = and i8 %ny, %y3215 3216 %c0 = icmp eq i8 %x, 03217 %cp2 = icmp eq i8 %x, %pow2orz3218 call void @use(i1 %c0)3219 %r = or i1 %c0, %cp23220 ret i1 %r3221}3222 3223 3224define i1 @icmp_eq_or_z_or_pow2orz_fail_logic_or(i8 %x, i8 %y) {3225; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_logic_or(3226; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3227; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3228; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 03229; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[X]], [[POW2ORZ]]3230; CHECK-NEXT: [[R:%.*]] = select i1 [[C0]], i1 true, i1 [[CP2]]3231; CHECK-NEXT: ret i1 [[R]]3232;3233 %ny = sub i8 0, %y3234 %pow2orz = and i8 %ny, %y3235 3236 %c0 = icmp eq i8 %x, 03237 %cp2 = icmp eq i8 %x, %pow2orz3238 %r = select i1 %c0, i1 true, i1 %cp23239 ret i1 %r3240}3241 3242 3243define <2 x i1> @icmp_ne_and_z_and_pow2orz(<2 x i8> %x, <2 x i8> %y) {3244; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz(3245; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]3246; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[Y]], [[NY]]3247; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], [[POW2ORZ]]3248; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]3249; CHECK-NEXT: ret <2 x i1> [[R]]3250;3251 %ny = sub <2 x i8> zeroinitializer, %y3252 %pow2orz = and <2 x i8> %ny, %y3253 3254 %c0 = icmp ne <2 x i8> %x, zeroinitializer3255 %cp2 = icmp ne <2 x i8> %x, %pow2orz3256 %r = and <2 x i1> %c0, %cp23257 ret <2 x i1> %r3258}3259 3260 3261define i1 @icmp_ne_and_z_and_onefail(i8 %x) {3262; CHECK-LABEL: @icmp_ne_and_z_and_onefail(3263; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X:%.*]], 23264; CHECK-NEXT: ret i1 [[R]]3265;3266 %c0 = icmp ne i8 %x, 03267 %cp2 = icmp ne i8 %x, 13268 %cp3 = icmp ne i8 %x, 23269 %rr = and i1 %c0, %cp23270 %r = and i1 %rr, %cp33271 ret i1 %r3272}3273 3274define i1 @icmp_ne_and_z_and_pow2orz_fail_multiuse1(i8 %x, i8 %y) {3275; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_multiuse1(3276; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3277; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3278; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 03279; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[X]], [[POW2ORZ]]3280; CHECK-NEXT: call void @use(i1 [[C0]])3281; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]3282; CHECK-NEXT: ret i1 [[R]]3283;3284 %ny = sub i8 0, %y3285 %pow2orz = and i8 %ny, %y3286 3287 %c0 = icmp eq i8 %x, 03288 %cp2 = icmp eq i8 %x, %pow2orz3289 call void @use(i1 %c0)3290 %r = or i1 %c0, %cp23291 ret i1 %r3292}3293 3294 3295define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_logic_and(<2 x i8> %x, <2 x i8> %y) {3296; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_logic_and(3297; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]3298; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[Y]], [[NY]]3299; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer3300; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[X]], [[POW2ORZ]]3301; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C0]], <2 x i1> [[CP2]], <2 x i1> zeroinitializer3302; CHECK-NEXT: ret <2 x i1> [[R]]3303;3304 %ny = sub <2 x i8> zeroinitializer, %y3305 %pow2orz = and <2 x i8> %ny, %y3306 3307 %c0 = icmp ne <2 x i8> %x, zeroinitializer3308 %cp2 = icmp ne <2 x i8> %x, %pow2orz3309 %r = select <2 x i1> %c0, <2 x i1> %cp2, <2 x i1> zeroinitializer3310 ret <2 x i1> %r3311}3312 3313define i1 @icmp_eq_or_z_or_pow2orz_fail_not_pow2(i8 %x, i8 %y) {3314; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_not_pow2(3315; CHECK-NEXT: [[NY:%.*]] = sub i8 1, [[Y:%.*]]3316; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]3317; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 03318; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[X]], [[POW2ORZ]]3319; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]3320; CHECK-NEXT: ret i1 [[R]]3321;3322 %ny = sub i8 1, %y3323 %pow2orz = and i8 %ny, %y3324 3325 %c0 = icmp eq i8 %x, 03326 %cp2 = icmp eq i8 %x, %pow2orz3327 %r = or i1 %c0, %cp23328 ret i1 %r3329}3330 3331define i1 @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(i8 %x, i8 %y) {3332; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(3333; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3334; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3335; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 13336; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[X]], [[POW2ORZ]]3337; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]3338; CHECK-NEXT: ret i1 [[R]]3339;3340 %ny = sub i8 0, %y3341 %pow2orz = and i8 %ny, %y3342 3343 %c0 = icmp eq i8 %x, 13344 %cp2 = icmp eq i8 %x, %pow2orz3345 %r = or i1 %c0, %cp23346 ret i1 %r3347}3348 3349define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_bad_pred(<2 x i8> %x, <2 x i8> %y) {3350; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_bad_pred(3351; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]3352; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[Y]], [[NY]]3353; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i8> [[X:%.*]], [[POW2ORZ]]3354; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer3355; CHECK-NEXT: ret <2 x i1> [[R]]3356;3357 %ny = sub <2 x i8> zeroinitializer, %y3358 %pow2orz = and <2 x i8> %ny, %y3359 3360 %c0 = icmp eq <2 x i8> %x, zeroinitializer3361 %cp2 = icmp eq <2 x i8> %x, %pow2orz3362 %r = and <2 x i1> %c0, %cp23363 ret <2 x i1> %r3364}3365 3366define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {3367; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(3368; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]3369; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[Y]], [[NY]]3370; CHECK-NEXT: [[C0:%.*]] = icmp slt i8 [[X:%.*]], 13371; CHECK-NEXT: [[CP2:%.*]] = icmp sle i8 [[X]], [[POW2ORZ]]3372; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]3373; CHECK-NEXT: ret i1 [[R]]3374;3375 %ny = sub i8 0, %y3376 %pow2orz = and i8 %ny, %y3377 3378 %c0 = icmp sle i8 %x, 03379 %cp2 = icmp sle i8 %x, %pow2orz3380 %r = or i1 %c0, %cp23381 ret i1 %r3382}3383 3384define i1 @and_slt_to_mask(i8 %x) {3385; CHECK-LABEL: @and_slt_to_mask(3386; CHECK-NEXT: [[AND2:%.*]] = icmp slt i8 [[X:%.*]], -1263387; CHECK-NEXT: ret i1 [[AND2]]3388;3389 %cmp = icmp slt i8 %x, -1243390 %and = and i8 %x, 23391 %cmp2 = icmp eq i8 %and, 03392 %and2 = and i1 %cmp, %cmp23393 ret i1 %and23394}3395 3396define i1 @and_slt_to_mask_off_by_one(i8 %x) {3397; CHECK-LABEL: @and_slt_to_mask_off_by_one(3398; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], -1233399; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], 23400; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[AND]], 03401; CHECK-NEXT: [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]3402; CHECK-NEXT: ret i1 [[AND2]]3403;3404 %cmp = icmp slt i8 %x, -1233405 %and = and i8 %x, 23406 %cmp2 = icmp eq i8 %and, 03407 %and2 = and i1 %cmp, %cmp23408 ret i1 %and23409}3410 3411define i1 @and_sgt_to_mask(i8 %x) {3412; CHECK-LABEL: @and_sgt_to_mask(3413; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -23414; CHECK-NEXT: [[AND2:%.*]] = icmp eq i8 [[TMP1]], 1243415; CHECK-NEXT: ret i1 [[AND2]]3416;3417 %cmp = icmp sgt i8 %x, 1233418 %and = and i8 %x, 23419 %cmp2 = icmp eq i8 %and, 03420 %and2 = and i1 %cmp, %cmp23421 ret i1 %and23422}3423 3424define i1 @and_sgt_to_mask_off_by_one(i8 %x) {3425; CHECK-LABEL: @and_sgt_to_mask_off_by_one(3426; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], 1243427; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], 23428; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[AND]], 03429; CHECK-NEXT: [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]3430; CHECK-NEXT: ret i1 [[AND2]]3431;3432 %cmp = icmp sgt i8 %x, 1243433 %and = and i8 %x, 23434 %cmp2 = icmp eq i8 %and, 03435 %and2 = and i1 %cmp, %cmp23436 ret i1 %and23437}3438 3439define i1 @and_ugt_to_mask(i8 %x) {3440; CHECK-LABEL: @and_ugt_to_mask(3441; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -23442; CHECK-NEXT: [[AND2:%.*]] = icmp eq i8 [[TMP1]], -43443; CHECK-NEXT: ret i1 [[AND2]]3444;3445 %cmp = icmp ugt i8 %x, -53446 %and = and i8 %x, 23447 %cmp2 = icmp eq i8 %and, 03448 %and2 = and i1 %cmp, %cmp23449 ret i1 %and23450}3451 3452define i1 @and_ugt_to_mask_off_by_one(i8 %x) {3453; CHECK-LABEL: @and_ugt_to_mask_off_by_one(3454; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], -63455; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], 23456; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[AND]], 03457; CHECK-NEXT: [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]3458; CHECK-NEXT: ret i1 [[AND2]]3459;3460 %cmp = icmp ugt i8 %x, -63461 %and = and i8 %x, 23462 %cmp2 = icmp eq i8 %and, 03463 %and2 = and i1 %cmp, %cmp23464 ret i1 %and23465}3466 3467; TODO: shall fold to trunc nuw i8 (and %x, %y) to i1.3468define i1 @and_icmp_ne_with_binary_range_operands(i8 range(i8 0, 2) %x, i8 range(i8 0, 2) %y) {3469; CHECK-LABEL: @and_icmp_ne_with_binary_range_operands(3470; CHECK-NEXT: [[ICMP1:%.*]] = icmp ne i8 [[X:%.*]], 03471; CHECK-NEXT: [[ICMP2:%.*]] = icmp ne i8 [[Y:%.*]], 03472; CHECK-NEXT: [[RET:%.*]] = and i1 [[ICMP1]], [[ICMP2]]3473; CHECK-NEXT: ret i1 [[RET]]3474;3475 %icmp1 = icmp ne i8 %x, 03476 %icmp2 = icmp ne i8 %y, 03477 %ret = and i1 %icmp1, %icmp23478 ret i1 %ret3479}3480 3481; TODO: shall fold to trunc nuw i8 (and %x, %y) to i1.3482define i1 @and_icmp_eq_with_binary_range_operands(i8 range(i8 0, 2) %x, i8 range(i8 0, 2) %y) {3483; CHECK-LABEL: @and_icmp_eq_with_binary_range_operands(3484; CHECK-NEXT: [[ICMP1:%.*]] = icmp ne i8 [[X:%.*]], 03485; CHECK-NEXT: [[ICMP2:%.*]] = icmp ne i8 [[Y:%.*]], 03486; CHECK-NEXT: [[RET:%.*]] = and i1 [[ICMP1]], [[ICMP2]]3487; CHECK-NEXT: ret i1 [[RET]]3488;3489 %icmp1 = icmp eq i8 %x, 13490 %icmp2 = icmp eq i8 %y, 13491 %ret = and i1 %icmp1, %icmp23492 ret i1 %ret3493}3494 3495define i1 @or_icmp_eq_and_pow2(i32 %x) {3496; CHECK-LABEL: @or_icmp_eq_and_pow2(3497; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1273498; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[TMP1]], 333499; CHECK-NEXT: ret i1 [[RET]]3500;3501 %icmp1 = icmp eq i32 %x, 1273502 %and = and i32 %x, -323503 %icmp2 = icmp eq i32 %and, 1283504 %ret = or i1 %icmp1, %icmp23505 ret i1 %ret3506}3507 3508define i1 @or_icmp_eq_and_pow2_mask_equal_to_icmp(i32 %x) {3509; CHECK-LABEL: @or_icmp_eq_and_pow2_mask_equal_to_icmp(3510; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -633511; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[TMP1]], 653512; CHECK-NEXT: ret i1 [[RET]]3513;3514 %icmp1 = icmp eq i32 %x, 633515 %and = and i32 %x, -643516 %icmp2 = icmp eq i32 %and, 643517 %ret = or i1 %icmp1, %icmp23518 ret i1 %ret3519}3520 3521define i1 @and_icmp_ne_and_pow2(i32 %x) {3522; CHECK-LABEL: @and_icmp_ne_and_pow2(3523; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1603524; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[TMP1]], -333525; CHECK-NEXT: ret i1 [[RET]]3526;3527 %icmp1 = icmp ne i32 %x, 1273528 %and = and i32 %x, -323529 %icmp2 = icmp ne i32 %and, 1283530 %ret = and i1 %icmp1, %icmp23531 ret i1 %ret3532}3533 3534define i1 @and_icmp_ne_and_pow2_mask_equal_to_icmp(i32 %x) {3535; CHECK-LABEL: @and_icmp_ne_and_pow2_mask_equal_to_icmp(3536; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1283537; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[TMP1]], -653538; CHECK-NEXT: ret i1 [[RET]]3539;3540 %icmp1 = icmp ne i32 %x, 633541 %and = and i32 %x, -643542 %icmp2 = icmp ne i32 %and, 643543 %ret = and i1 %icmp1, %icmp23544 ret i1 %ret3545}3546 3547define i1 @or_icmp_eq_and_pow2_commute(i32 %x) {3548; CHECK-LABEL: @or_icmp_eq_and_pow2_commute(3549; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1273550; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP1]], 333551; CHECK-NEXT: ret i1 [[TMP4]]3552;3553 %and = and i32 %x, -323554 %icmp1 = icmp eq i32 %and, 1283555 %icmp2 = icmp eq i32 %x, 1273556 %ret = or i1 %icmp1, %icmp23557 ret i1 %ret3558}3559 3560define i1 @and_icmp_ne_and_pow2_commute(i32 %x) {3561; CHECK-LABEL: @and_icmp_ne_and_pow2_commute(3562; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1603563; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[TMP1]], -333564; CHECK-NEXT: ret i1 [[RET]]3565;3566 %and = and i32 %x, -323567 %icmp1 = icmp ne i32 %and, 1283568 %icmp2 = icmp ne i32 %x, 1273569 %ret = and i1 %icmp1, %icmp23570 ret i1 %ret3571}3572 3573define i1 @neg_or_icmp_eq_and_pow2_multi_use(i32 %x) {3574; CHECK-LABEL: @neg_or_icmp_eq_and_pow2_multi_use(3575; CHECK-NEXT: [[ICMP1:%.*]] = icmp eq i32 [[X:%.*]], 1273576; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], -323577; CHECK-NEXT: call void @use32(i32 [[AND]])3578; CHECK-NEXT: [[ICMP2:%.*]] = icmp eq i32 [[AND]], 1283579; CHECK-NEXT: [[RET:%.*]] = or i1 [[ICMP1]], [[ICMP2]]3580; CHECK-NEXT: ret i1 [[RET]]3581;3582 %icmp1 = icmp eq i32 %x, 1273583 %and = and i32 %x, -323584 call void @use32(i32 %and)3585 %icmp2 = icmp eq i32 %and, 1283586 %ret = or i1 %icmp1, %icmp23587 ret i1 %ret3588}3589 3590define i1 @neg_and_icmp_eq_and_pow2(i32 %x) {3591; CHECK-LABEL: @neg_and_icmp_eq_and_pow2(3592; CHECK-NEXT: ret i1 false3593;3594 %icmp1 = icmp eq i32 %x, 1273595 %and = and i32 %x, -323596 %icmp2 = icmp eq i32 %and, 1283597 %ret = and i1 %icmp1, %icmp23598 ret i1 %ret3599}3600 3601define i1 @neg_or_icmp_eq_and_non_pow2_mask(i32 %x) {3602; CHECK-LABEL: @neg_or_icmp_eq_and_non_pow2_mask(3603; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 1273604; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], -333605; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 1283606; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP1]], [[TMP3]]3607; CHECK-NEXT: ret i1 [[TMP4]]3608;3609 %icmp1 = icmp eq i32 %x, 1273610 %and = and i32 %x, -333611 %icmp2 = icmp eq i32 %and, 1283612 %ret = or i1 %icmp1, %icmp23613 ret i1 %ret3614}3615 3616define i1 @neg_and_icmp_ne_and_non_pow2_icmp(i32 %x) {3617; CHECK-LABEL: @neg_and_icmp_ne_and_non_pow2_icmp(3618; CHECK-NEXT: [[ICMP1:%.*]] = icmp ne i32 [[X:%.*]], 1273619; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], -333620; CHECK-NEXT: [[ICMP2:%.*]] = icmp ne i32 [[AND]], 1283621; CHECK-NEXT: [[RET:%.*]] = and i1 [[ICMP1]], [[ICMP2]]3622; CHECK-NEXT: ret i1 [[RET]]3623;3624 %icmp1 = icmp ne i32 %x, 1273625 %and = and i32 %x, -333626 %icmp2 = icmp ne i32 %and, 1283627 %ret = and i1 %icmp1, %icmp23628 ret i1 %ret3629}3630 3631define i1 @neg_or_icmp_eq_and_const_less_than_mask(i32 %x) {3632; CHECK-LABEL: @neg_or_icmp_eq_and_const_less_than_mask(3633; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 153634; CHECK-NEXT: ret i1 [[TMP1]]3635;3636 %icmp1 = icmp eq i32 %x, 153637 %and = and i32 %x, -323638 %icmp2 = icmp eq i32 %and, 163639 %ret = or i1 %icmp1, %icmp23640 ret i1 %ret3641}3642 3643define i1 @neg_and_icmp_ne_and_pow2_disjoint(i32 %x) {3644; CHECK-LABEL: @neg_and_icmp_ne_and_pow2_disjoint(3645; CHECK-NEXT: [[ICMP1:%.*]] = icmp ne i32 [[X:%.*]], 1263646; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], -323647; CHECK-NEXT: [[ICMP2:%.*]] = icmp ne i32 [[AND]], 1283648; CHECK-NEXT: [[RET:%.*]] = and i1 [[ICMP1]], [[ICMP2]]3649; CHECK-NEXT: ret i1 [[RET]]3650;3651 %icmp1 = icmp ne i32 %x, 1263652 %and = and i32 %x, -323653 %icmp2 = icmp ne i32 %and, 1283654 %ret = and i1 %icmp1, %icmp23655 ret i1 %ret3656}3657 3658define i1 @neg_or_icmp_eq_double_and_pow2(i32 %x) {3659; CHECK-LABEL: @neg_or_icmp_eq_double_and_pow2(3660; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -163661; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 643662; CHECK-NEXT: [[AND2:%.*]] = and i32 [[X]], -323663; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[AND2]], 1283664; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP2]], [[TMP4]]3665; CHECK-NEXT: ret i1 [[TMP5]]3666;3667 %and1 = and i32 %x, -163668 %icmp1 = icmp eq i32 %and1, 643669 %and2 = and i32 %x, -323670 %icmp2 = icmp eq i32 %and2, 1283671 %ret = or i1 %icmp1, %icmp23672 ret i1 %ret3673}3674 3675define i1 @implied_select_icmp_eq_and_pow2(i32 %x) {3676; CHECK-LABEL: @implied_select_icmp_eq_and_pow2(3677; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -323678; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1283679; CHECK-NEXT: ret i1 [[TMP2]]3680;3681 %icmp1 = icmp sgt i32 %x, 1273682 %and = and i32 %x, -323683 %icmp2 = icmp eq i32 %and, 1283684 %1 = select i1 %icmp1, i1 %icmp2, i1 false3685 ret i1 %13686}3687 3688define i1 @implied_range_check(i8 %a) {3689; CHECK-LABEL: @implied_range_check(3690; CHECK-NEXT: [[MASKED:%.*]] = and i8 [[A:%.*]], -23691; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[MASKED]], 23692; CHECK-NEXT: ret i1 [[CMP2]]3693;3694 %cmp1 = icmp ult i8 %a, 53695 %masked = and i8 %a, -23696 %cmp2 = icmp eq i8 %masked, 23697 %and = and i1 %cmp1, %cmp23698 ret i1 %and3699}3700 3701define i1 @merge_range_check_and(i8 %a) {3702; CHECK-LABEL: @merge_range_check_and(3703; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[MASKED:%.*]], 23704; CHECK-NEXT: ret i1 [[CMP2]]3705;3706 %cmp1 = icmp ult i8 %a, 33707 %masked = and i8 %a, -23708 %cmp2 = icmp eq i8 %masked, 23709 %and = and i1 %cmp1, %cmp23710 ret i1 %and3711}3712 3713define i1 @merge_range_check_or(i8 %a) {3714; CHECK-LABEL: @merge_range_check_or(3715; CHECK-NEXT: [[AND:%.*]] = icmp ult i8 [[A:%.*]], 43716; CHECK-NEXT: ret i1 [[AND]]3717;3718 %cmp1 = icmp ult i8 %a, 33719 %masked = and i8 %a, -23720 %cmp2 = icmp eq i8 %masked, 23721 %and = or i1 %cmp1, %cmp23722 ret i1 %and3723}3724