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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i1 @test2(i1 %X, i1 %Y) {5; CHECK-LABEL: @test2(6; CHECK-NEXT: [[A:%.*]] = and i1 [[X:%.*]], [[Y:%.*]]7; CHECK-NEXT: ret i1 [[A]]8;9 %a = and i1 %X, %Y10 %b = and i1 %a, %X11 ret i1 %b12}13 14define i1 @test2_logical(i1 %X, i1 %Y) {15; CHECK-LABEL: @test2_logical(16; CHECK-NEXT: [[A:%.*]] = select i1 [[X:%.*]], i1 [[Y:%.*]], i1 false17; CHECK-NEXT: ret i1 [[A]]18;19 %a = select i1 %X, i1 %Y, i1 false20 %b = select i1 %a, i1 %X, i1 false21 ret i1 %b22}23 24define i32 @test3(i32 %X, i32 %Y) {25; CHECK-LABEL: @test3(26; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]27; CHECK-NEXT: ret i32 [[A]]28;29 %a = and i32 %X, %Y30 %b = and i32 %Y, %a31 ret i32 %b32}33 34define i1 @test7(i32 %i, i1 %b) {35; CHECK-LABEL: @test7(36; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[I:%.*]], 037; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP1]], [[B:%.*]]38; CHECK-NEXT: ret i1 [[AND2]]39;40 %cmp1 = icmp slt i32 %i, 141 %cmp2 = icmp sgt i32 %i, -142 %and1 = and i1 %cmp1, %b43 %and2 = and i1 %and1, %cmp244 ret i1 %and245}46 47define i1 @test7_logical(i32 %i, i1 %b) {48; CHECK-LABEL: @test7_logical(49; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[I:%.*]], 050; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP1]], i1 [[B:%.*]], i1 false51; CHECK-NEXT: ret i1 [[AND2]]52;53 %cmp1 = icmp slt i32 %i, 154 %cmp2 = icmp sgt i32 %i, -155 %and1 = select i1 %cmp1, i1 %b, i1 false56 %and2 = select i1 %and1, i1 %cmp2, i1 false57 ret i1 %and258}59 60define i1 @test8(i32 %i) {61; CHECK-LABEL: @test8(62; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[I:%.*]], -163; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[TMP1]], 1364; CHECK-NEXT: ret i1 [[COND]]65;66 %cmp1 = icmp ne i32 %i, 067 %cmp2 = icmp ult i32 %i, 1468 %cond = and i1 %cmp1, %cmp269 ret i1 %cond70}71 72define i1 @test8_logical(i32 %i) {73; CHECK-LABEL: @test8_logical(74; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[I:%.*]], -175; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[TMP1]], 1376; CHECK-NEXT: ret i1 [[COND]]77;78 %cmp1 = icmp ne i32 %i, 079 %cmp2 = icmp ult i32 %i, 1480 %cond = select i1 %cmp1, i1 %cmp2, i1 false81 ret i1 %cond82}83 84define <2 x i1> @test8vec(<2 x i32> %i) {85; CHECK-LABEL: @test8vec(86; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[I:%.*]], splat (i32 -1)87; CHECK-NEXT: [[COND:%.*]] = icmp ult <2 x i32> [[TMP1]], splat (i32 13)88; CHECK-NEXT: ret <2 x i1> [[COND]]89;90 %cmp1 = icmp ne <2 x i32> %i, zeroinitializer91 %cmp2 = icmp ult <2 x i32> %i, <i32 14, i32 14>92 %cond = and <2 x i1> %cmp1, %cmp293 ret <2 x i1> %cond94}95 96; combine -x & 1 into x & 197define i64 @test9(i64 %x) {98; CHECK-LABEL: @test9(99; CHECK-NEXT: [[AND:%.*]] = and i64 [[X:%.*]], 1100; CHECK-NEXT: ret i64 [[AND]]101;102 %sub = sub nsw i64 0, %x103 %and = and i64 %sub, 1104 ret i64 %and105}106 107; combine -x & 1 into x & 1108define <2 x i64> @test9vec(<2 x i64> %x) {109; CHECK-LABEL: @test9vec(110; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> [[X:%.*]], splat (i64 1)111; CHECK-NEXT: ret <2 x i64> [[AND]]112;113 %sub = sub nsw <2 x i64> <i64 0, i64 0>, %x114 %and = and <2 x i64> %sub, <i64 1, i64 1>115 ret <2 x i64> %and116}117 118define i64 @test10(i64 %x) {119; CHECK-LABEL: @test10(120; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[X:%.*]], -2121; CHECK-NEXT: [[ADD:%.*]] = sub i64 0, [[TMP1]]122; CHECK-NEXT: ret i64 [[ADD]]123;124 %sub = sub nsw i64 0, %x125 %and = and i64 %sub, 1126 %add = add i64 %sub, %and127 ret i64 %add128}129 130; (1 << x) & 1 --> zext(x == 0)131 132define i8 @and1_shl1_is_cmp_eq_0(i8 %x) {133; CHECK-LABEL: @and1_shl1_is_cmp_eq_0(134; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0135; CHECK-NEXT: [[AND:%.*]] = zext i1 [[TMP1]] to i8136; CHECK-NEXT: ret i8 [[AND]]137;138 %sh = shl i8 1, %x139 %and = and i8 %sh, 1140 ret i8 %and141}142 143; Don't do it if the shift has another use.144 145define i8 @and1_shl1_is_cmp_eq_0_multiuse(i8 %x) {146; CHECK-LABEL: @and1_shl1_is_cmp_eq_0_multiuse(147; CHECK-NEXT: [[SH:%.*]] = shl nuw i8 1, [[X:%.*]]148; CHECK-NEXT: [[AND:%.*]] = and i8 [[SH]], 1149; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[SH]], [[AND]]150; CHECK-NEXT: ret i8 [[ADD]]151;152 %sh = shl i8 1, %x153 %and = and i8 %sh, 1154 %add = add i8 %sh, %and155 ret i8 %add156}157 158; (1 << x) & 1 --> zext(x == 0)159 160define <2 x i8> @and1_shl1_is_cmp_eq_0_vec(<2 x i8> %x) {161; CHECK-LABEL: @and1_shl1_is_cmp_eq_0_vec(162; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer163; CHECK-NEXT: [[AND:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8>164; CHECK-NEXT: ret <2 x i8> [[AND]]165;166 %sh = shl <2 x i8> <i8 1, i8 1>, %x167 %and = and <2 x i8> %sh, <i8 1, i8 1>168 ret <2 x i8> %and169}170 171define <2 x i8> @and1_shl1_is_cmp_eq_0_vec_poison(<2 x i8> %x) {172; CHECK-LABEL: @and1_shl1_is_cmp_eq_0_vec_poison(173; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer174; CHECK-NEXT: [[AND:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i8>175; CHECK-NEXT: ret <2 x i8> [[AND]]176;177 %sh = shl <2 x i8> <i8 1, i8 poison>, %x178 %and = and <2 x i8> %sh, <i8 1, i8 poison>179 ret <2 x i8> %and180}181 182; The mask is unnecessary.183 184define i8 @and1_lshr1_is_cmp_eq_0(i8 %x) {185; CHECK-LABEL: @and1_lshr1_is_cmp_eq_0(186; CHECK-NEXT: [[SH:%.*]] = lshr i8 1, [[X:%.*]]187; CHECK-NEXT: ret i8 [[SH]]188;189 %sh = lshr i8 1, %x190 %and = and i8 %sh, 1191 ret i8 %and192}193 194define i8 @and1_lshr1_is_cmp_eq_0_multiuse(i8 %x) {195; CHECK-LABEL: @and1_lshr1_is_cmp_eq_0_multiuse(196; CHECK-NEXT: [[SH:%.*]] = lshr i8 1, [[X:%.*]]197; CHECK-NEXT: [[ADD:%.*]] = shl nuw nsw i8 [[SH]], 1198; CHECK-NEXT: ret i8 [[ADD]]199;200 %sh = lshr i8 1, %x201 %and = and i8 %sh, 1202 %add = add i8 %sh, %and203 ret i8 %add204}205 206; The mask is unnecessary.207 208define <2 x i8> @and1_lshr1_is_cmp_eq_0_vec(<2 x i8> %x) {209; CHECK-LABEL: @and1_lshr1_is_cmp_eq_0_vec(210; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> splat (i8 1), [[X:%.*]]211; CHECK-NEXT: ret <2 x i8> [[SH]]212;213 %sh = lshr <2 x i8> <i8 1, i8 1>, %x214 %and = and <2 x i8> %sh, <i8 1, i8 1>215 ret <2 x i8> %and216}217 218define <2 x i8> @and1_lshr1_is_cmp_eq_0_vec_poison(<2 x i8> %x) {219; CHECK-LABEL: @and1_lshr1_is_cmp_eq_0_vec_poison(220; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i8> <i8 1, i8 poison>, [[X:%.*]]221; CHECK-NEXT: ret <2 x i8> [[AND]]222;223 %sh = lshr <2 x i8> <i8 1, i8 poison>, %x224 %and = and <2 x i8> %sh, <i8 1, i8 poison>225 ret <2 x i8> %and226}227 228; The add in this test is unnecessary because the LSBs of the LHS are 0 and the 'and' only consumes bits from those LSBs. It doesn't matter what happens to the upper bits.229define i32 @test11(i32 %a, i32 %b) {230; CHECK-LABEL: @test11(231; CHECK-NEXT: [[X:%.*]] = shl i32 [[A:%.*]], 8232; CHECK-NEXT: [[Z:%.*]] = and i32 [[B:%.*]], 128233; CHECK-NEXT: [[W:%.*]] = mul i32 [[Z]], [[X]]234; CHECK-NEXT: ret i32 [[W]]235;236 %x = shl i32 %a, 8237 %y = add i32 %x, %b238 %z = and i32 %y, 128239 %w = mul i32 %z, %x ; to keep the shift from being removed240 ret i32 %w241}242 243; The add in this test is unnecessary because the LSBs of the RHS are 0 and the 'and' only consumes bits from those LSBs. It doesn't matter what happens to the upper bits.244define i32 @test12(i32 %a, i32 %b) {245; CHECK-LABEL: @test12(246; CHECK-NEXT: [[X:%.*]] = shl i32 [[A:%.*]], 8247; CHECK-NEXT: [[Z:%.*]] = and i32 [[B:%.*]], 128248; CHECK-NEXT: [[W:%.*]] = mul i32 [[Z]], [[X]]249; CHECK-NEXT: ret i32 [[W]]250;251 %x = shl i32 %a, 8252 %y = add i32 %b, %x253 %z = and i32 %y, 128254 %w = mul i32 %z, %x ; to keep the shift from being removed255 ret i32 %w256}257 258; The sub in this test is unnecessary because the LSBs of the RHS are 0 and the 'and' only consumes bits from those LSBs. It doesn't matter what happens to the upper bits.259define i32 @test13(i32 %a, i32 %b) {260; CHECK-LABEL: @test13(261; CHECK-NEXT: [[X:%.*]] = shl i32 [[A:%.*]], 8262; CHECK-NEXT: [[Z:%.*]] = and i32 [[B:%.*]], 128263; CHECK-NEXT: [[W:%.*]] = mul i32 [[Z]], [[X]]264; CHECK-NEXT: ret i32 [[W]]265;266 %x = shl i32 %a, 8267 %y = sub i32 %b, %x268 %z = and i32 %y, 128269 %w = mul i32 %z, %x ; to keep the shift from being removed270 ret i32 %w271}272 273; The sub in this test cannot be removed because we need to keep the negation of %b. TODO: But we should be able to replace the LHS of it with a 0.274define i32 @test14(i32 %a, i32 %b) {275; CHECK-LABEL: @test14(276; CHECK-NEXT: [[X:%.*]] = shl i32 [[A:%.*]], 8277; CHECK-NEXT: [[Y:%.*]] = sub i32 0, [[B:%.*]]278; CHECK-NEXT: [[Z:%.*]] = and i32 [[Y]], 128279; CHECK-NEXT: [[W:%.*]] = mul i32 [[Z]], [[X]]280; CHECK-NEXT: ret i32 [[W]]281;282 %x = shl i32 %a, 8283 %y = sub i32 %x, %b284 %z = and i32 %y, 128285 %w = mul i32 %z, %x ; to keep the shift from being removed286 ret i32 %w287}288