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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i32 @main1(i32 %argc) {5; CHECK-LABEL: @main1(6; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 37; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 38; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 19; CHECK-NEXT: ret i32 [[RETVAL_0]]10;11 %and = and i32 %argc, 112 %tobool = icmp ne i32 %and, 013 %and2 = and i32 %argc, 214 %tobool3 = icmp ne i32 %and2, 015 %or.cond = and i1 %tobool, %tobool316 %retval.0 = select i1 %or.cond, i32 2, i32 117 ret i32 %retval.018}19 20define i32 @main1_logical(i32 %argc) {21; CHECK-LABEL: @main1_logical(22; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 323; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 324; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 125; CHECK-NEXT: ret i32 [[RETVAL_0]]26;27 %and = and i32 %argc, 128 %tobool = icmp ne i32 %and, 029 %and2 = and i32 %argc, 230 %tobool3 = icmp ne i32 %and2, 031 %or.cond = select i1 %tobool, i1 %tobool3, i1 false32 %retval.0 = select i1 %or.cond, i32 2, i32 133 ret i32 %retval.034}35 36define i32 @main2(i32 %argc) {37; CHECK-LABEL: @main2(38; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 339; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 340; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i3241; CHECK-NEXT: ret i32 [[STOREMERGE]]42;43 %and = and i32 %argc, 144 %tobool = icmp eq i32 %and, 045 %and2 = and i32 %argc, 246 %tobool3 = icmp eq i32 %and2, 047 %or.cond = or i1 %tobool, %tobool348 %storemerge = select i1 %or.cond, i32 0, i32 149 ret i32 %storemerge50}51 52define i32 @main2_logical(i32 %argc) {53; CHECK-LABEL: @main2_logical(54; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 355; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 356; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i3257; CHECK-NEXT: ret i32 [[STOREMERGE]]58;59 %and = and i32 %argc, 160 %tobool = icmp eq i32 %and, 061 %and2 = and i32 %argc, 262 %tobool3 = icmp eq i32 %and2, 063 %or.cond = select i1 %tobool, i1 true, i1 %tobool364 %storemerge = select i1 %or.cond, i32 0, i32 165 ret i32 %storemerge66}67 68; tests to check combining (icmp eq (A & B), C) & (icmp eq (A & D), E)69; tests to check if (icmp eq (A & B), 0) is treated like (icmp eq (A & B), B)70; if B is a single bit constant71 72; (icmp eq (A & B), 0) & (icmp eq (A & D), 0) -> (icmp eq (A & (B|D)), 0)73define i32 @main3(i32 %argc) {74; CHECK-LABEL: @main3(75; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 5576; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 077; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i3278; CHECK-NEXT: ret i32 [[STOREMERGE]]79;80 %and = and i32 %argc, 781 %tobool = icmp eq i32 %and, 082 %and2 = and i32 %argc, 4883 %tobool3 = icmp eq i32 %and2, 084 %and.cond = and i1 %tobool, %tobool385 %storemerge = select i1 %and.cond, i32 0, i32 186 ret i32 %storemerge87}88 89define i32 @main3_logical(i32 %argc) {90; CHECK-LABEL: @main3_logical(91; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 5592; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 093; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i3294; CHECK-NEXT: ret i32 [[STOREMERGE]]95;96 %and = and i32 %argc, 797 %tobool = icmp eq i32 %and, 098 %and2 = and i32 %argc, 4899 %tobool3 = icmp eq i32 %and2, 0100 %and.cond = select i1 %tobool, i1 %tobool3, i1 false101 %storemerge = select i1 %and.cond, i32 0, i32 1102 ret i32 %storemerge103}104 105define i32 @main3b(i32 %argc) {106; CHECK-LABEL: @main3b(107; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23108; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 0109; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32110; CHECK-NEXT: ret i32 [[STOREMERGE]]111;112 %and = and i32 %argc, 7113 %tobool = icmp eq i32 %and, 0114 %and2 = and i32 %argc, 16115 %tobool3 = icmp ne i32 %and2, 16116 %and.cond = and i1 %tobool, %tobool3117 %storemerge = select i1 %and.cond, i32 0, i32 1118 ret i32 %storemerge119}120 121define i32 @main3b_logical(i32 %argc) {122; CHECK-LABEL: @main3b_logical(123; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23124; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 0125; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32126; CHECK-NEXT: ret i32 [[STOREMERGE]]127;128 %and = and i32 %argc, 7129 %tobool = icmp eq i32 %and, 0130 %and2 = and i32 %argc, 16131 %tobool3 = icmp ne i32 %and2, 16132 %and.cond = select i1 %tobool, i1 %tobool3, i1 false133 %storemerge = select i1 %and.cond, i32 0, i32 1134 ret i32 %storemerge135}136 137define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3) {138; CHECK-LABEL: @main3e_like(139; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]140; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]141; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], 0142; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32143; CHECK-NEXT: ret i32 [[STOREMERGE]]144;145 %and = and i32 %argc, %argc2146 %tobool = icmp eq i32 %and, 0147 %and2 = and i32 %argc, %argc3148 %tobool3 = icmp eq i32 %and2, 0149 %and.cond = and i1 %tobool, %tobool3150 %storemerge = select i1 %and.cond, i32 0, i32 1151 ret i32 %storemerge152}153 154define i32 @main3e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {155; CHECK-LABEL: @main3e_like_logical(156; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]157; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0158; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]159; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0160; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]161; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32162; CHECK-NEXT: ret i32 [[STOREMERGE]]163;164 %and = and i32 %argc, %argc2165 %tobool = icmp eq i32 %and, 0166 %and2 = and i32 %argc, %argc3167 %tobool3 = icmp eq i32 %and2, 0168 %and.cond = select i1 %tobool, i1 %tobool3, i1 false169 %storemerge = select i1 %and.cond, i32 0, i32 1170 ret i32 %storemerge171}172 173; (icmp ne (A & B), 0) | (icmp ne (A & D), 0) -> (icmp ne (A & (B|D)), 0)174define i32 @main3c(i32 %argc) {175; CHECK-LABEL: @main3c(176; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55177; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 0178; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32179; CHECK-NEXT: ret i32 [[STOREMERGE]]180;181 %and = and i32 %argc, 7182 %tobool = icmp ne i32 %and, 0183 %and2 = and i32 %argc, 48184 %tobool3 = icmp ne i32 %and2, 0185 %or.cond = or i1 %tobool, %tobool3186 %storemerge = select i1 %or.cond, i32 0, i32 1187 ret i32 %storemerge188}189 190define i32 @main3c_logical(i32 %argc) {191; CHECK-LABEL: @main3c_logical(192; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55193; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 0194; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32195; CHECK-NEXT: ret i32 [[STOREMERGE]]196;197 %and = and i32 %argc, 7198 %tobool = icmp ne i32 %and, 0199 %and2 = and i32 %argc, 48200 %tobool3 = icmp ne i32 %and2, 0201 %or.cond = select i1 %tobool, i1 true, i1 %tobool3202 %storemerge = select i1 %or.cond, i32 0, i32 1203 ret i32 %storemerge204}205 206define i32 @main3d(i32 %argc) {207; CHECK-LABEL: @main3d(208; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23209; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 0210; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32211; CHECK-NEXT: ret i32 [[STOREMERGE]]212;213 %and = and i32 %argc, 7214 %tobool = icmp ne i32 %and, 0215 %and2 = and i32 %argc, 16216 %tobool3 = icmp eq i32 %and2, 16217 %or.cond = or i1 %tobool, %tobool3218 %storemerge = select i1 %or.cond, i32 0, i32 1219 ret i32 %storemerge220}221 222define i32 @main3d_logical(i32 %argc) {223; CHECK-LABEL: @main3d_logical(224; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23225; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 0226; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32227; CHECK-NEXT: ret i32 [[STOREMERGE]]228;229 %and = and i32 %argc, 7230 %tobool = icmp ne i32 %and, 0231 %and2 = and i32 %argc, 16232 %tobool3 = icmp eq i32 %and2, 16233 %or.cond = select i1 %tobool, i1 true, i1 %tobool3234 %storemerge = select i1 %or.cond, i32 0, i32 1235 ret i32 %storemerge236}237 238define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3) {239; CHECK-LABEL: @main3f_like(240; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]241; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]242; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP2]], 0243; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32244; CHECK-NEXT: ret i32 [[STOREMERGE]]245;246 %and = and i32 %argc, %argc2247 %tobool = icmp ne i32 %and, 0248 %and2 = and i32 %argc, %argc3249 %tobool3 = icmp ne i32 %and2, 0250 %or.cond = or i1 %tobool, %tobool3251 %storemerge = select i1 %or.cond, i32 0, i32 1252 ret i32 %storemerge253}254 255define i32 @main3f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {256; CHECK-LABEL: @main3f_like_logical(257; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]258; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0259; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]260; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0261; CHECK-NEXT: [[OR_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false262; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32263; CHECK-NEXT: ret i32 [[STOREMERGE]]264;265 %and = and i32 %argc, %argc2266 %tobool = icmp ne i32 %and, 0267 %and2 = and i32 %argc, %argc3268 %tobool3 = icmp ne i32 %and2, 0269 %or.cond = select i1 %tobool, i1 true, i1 %tobool3270 %storemerge = select i1 %or.cond, i32 0, i32 1271 ret i32 %storemerge272}273 274; (icmp eq (A & B), B) & (icmp eq (A & D), D) -> (icmp eq (A & (B|D)), (B|D))275define i32 @main4(i32 %argc) {276; CHECK-LABEL: @main4(277; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55278; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 55279; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32280; CHECK-NEXT: ret i32 [[STOREMERGE]]281;282 %and = and i32 %argc, 7283 %tobool = icmp eq i32 %and, 7284 %and2 = and i32 %argc, 48285 %tobool3 = icmp eq i32 %and2, 48286 %and.cond = and i1 %tobool, %tobool3287 %storemerge = select i1 %and.cond, i32 0, i32 1288 ret i32 %storemerge289}290 291define <2 x i32> @main4_splat(<2 x i32> %argc) {292; CHECK-LABEL: @main4_splat(293; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[ARGC:%.*]], splat (i32 55)294; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne <2 x i32> [[TMP1]], splat (i32 55)295; CHECK-NEXT: [[STOREMERGE:%.*]] = zext <2 x i1> [[AND_COND]] to <2 x i32>296; CHECK-NEXT: ret <2 x i32> [[STOREMERGE]]297;298 %and = and <2 x i32> %argc, <i32 7, i32 7>299 %tobool = icmp eq <2 x i32> %and, <i32 7, i32 7>300 %and2 = and <2 x i32> %argc, <i32 48, i32 48>301 %tobool3 = icmp eq <2 x i32> %and2, <i32 48, i32 48>302 %and.cond = and <2 x i1> %tobool, %tobool3303 %storemerge = select <2 x i1> %and.cond, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 1, i32 1>304 ret <2 x i32> %storemerge305}306 307define i32 @main4_logical(i32 %argc) {308; CHECK-LABEL: @main4_logical(309; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55310; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 55311; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32312; CHECK-NEXT: ret i32 [[STOREMERGE]]313;314 %and = and i32 %argc, 7315 %tobool = icmp eq i32 %and, 7316 %and2 = and i32 %argc, 48317 %tobool3 = icmp eq i32 %and2, 48318 %and.cond = select i1 %tobool, i1 %tobool3, i1 false319 %storemerge = select i1 %and.cond, i32 0, i32 1320 ret i32 %storemerge321}322 323define i32 @main4b(i32 %argc) {324; CHECK-LABEL: @main4b(325; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23326; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 23327; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32328; CHECK-NEXT: ret i32 [[STOREMERGE]]329;330 %and = and i32 %argc, 7331 %tobool = icmp eq i32 %and, 7332 %and2 = and i32 %argc, 16333 %tobool3 = icmp ne i32 %and2, 0334 %and.cond = and i1 %tobool, %tobool3335 %storemerge = select i1 %and.cond, i32 0, i32 1336 ret i32 %storemerge337}338 339define i32 @main4b_logical(i32 %argc) {340; CHECK-LABEL: @main4b_logical(341; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23342; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 23343; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32344; CHECK-NEXT: ret i32 [[STOREMERGE]]345;346 %and = and i32 %argc, 7347 %tobool = icmp eq i32 %and, 7348 %and2 = and i32 %argc, 16349 %tobool3 = icmp ne i32 %and2, 0350 %and.cond = select i1 %tobool, i1 %tobool3, i1 false351 %storemerge = select i1 %and.cond, i32 0, i32 1352 ret i32 %storemerge353}354 355define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3) {356; CHECK-LABEL: @main4e_like(357; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]358; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]359; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]360; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32361; CHECK-NEXT: ret i32 [[STOREMERGE]]362;363 %and = and i32 %argc, %argc2364 %tobool = icmp eq i32 %and, %argc2365 %and2 = and i32 %argc, %argc3366 %tobool3 = icmp eq i32 %and2, %argc3367 %and.cond = and i1 %tobool, %tobool3368 %storemerge = select i1 %and.cond, i32 0, i32 1369 ret i32 %storemerge370}371 372define i32 @main4e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {373; CHECK-LABEL: @main4e_like_logical(374; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]375; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC2]]376; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]377; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC3]]378; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]379; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32380; CHECK-NEXT: ret i32 [[STOREMERGE]]381;382 %and = and i32 %argc, %argc2383 %tobool = icmp eq i32 %and, %argc2384 %and2 = and i32 %argc, %argc3385 %tobool3 = icmp eq i32 %and2, %argc3386 %and.cond = select i1 %tobool, i1 %tobool3, i1 false387 %storemerge = select i1 %and.cond, i32 0, i32 1388 ret i32 %storemerge389}390 391; (icmp ne (A & B), B) | (icmp ne (A & D), D) -> (icmp ne (A & (B|D)), (B|D))392define i32 @main4c(i32 %argc) {393; CHECK-LABEL: @main4c(394; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55395; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 55396; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32397; CHECK-NEXT: ret i32 [[STOREMERGE]]398;399 %and = and i32 %argc, 7400 %tobool = icmp ne i32 %and, 7401 %and2 = and i32 %argc, 48402 %tobool3 = icmp ne i32 %and2, 48403 %or.cond = or i1 %tobool, %tobool3404 %storemerge = select i1 %or.cond, i32 0, i32 1405 ret i32 %storemerge406}407 408define i32 @main4c_logical(i32 %argc) {409; CHECK-LABEL: @main4c_logical(410; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55411; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 55412; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32413; CHECK-NEXT: ret i32 [[STOREMERGE]]414;415 %and = and i32 %argc, 7416 %tobool = icmp ne i32 %and, 7417 %and2 = and i32 %argc, 48418 %tobool3 = icmp ne i32 %and2, 48419 %or.cond = select i1 %tobool, i1 true, i1 %tobool3420 %storemerge = select i1 %or.cond, i32 0, i32 1421 ret i32 %storemerge422}423 424define i32 @main4d(i32 %argc) {425; CHECK-LABEL: @main4d(426; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23427; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 23428; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32429; CHECK-NEXT: ret i32 [[STOREMERGE]]430;431 %and = and i32 %argc, 7432 %tobool = icmp ne i32 %and, 7433 %and2 = and i32 %argc, 16434 %tobool3 = icmp eq i32 %and2, 0435 %or.cond = or i1 %tobool, %tobool3436 %storemerge = select i1 %or.cond, i32 0, i32 1437 ret i32 %storemerge438}439 440define i32 @main4d_logical(i32 %argc) {441; CHECK-LABEL: @main4d_logical(442; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23443; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 23444; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32445; CHECK-NEXT: ret i32 [[STOREMERGE]]446;447 %and = and i32 %argc, 7448 %tobool = icmp ne i32 %and, 7449 %and2 = and i32 %argc, 16450 %tobool3 = icmp eq i32 %and2, 0451 %or.cond = select i1 %tobool, i1 true, i1 %tobool3452 %storemerge = select i1 %or.cond, i32 0, i32 1453 ret i32 %storemerge454}455 456define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3) {457; CHECK-LABEL: @main4f_like(458; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]459; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]460; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]461; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32462; CHECK-NEXT: ret i32 [[STOREMERGE]]463;464 %and = and i32 %argc, %argc2465 %tobool = icmp ne i32 %and, %argc2466 %and2 = and i32 %argc, %argc3467 %tobool3 = icmp ne i32 %and2, %argc3468 %or.cond = or i1 %tobool, %tobool3469 %storemerge = select i1 %or.cond, i32 0, i32 1470 ret i32 %storemerge471}472 473define i32 @main4f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {474; CHECK-LABEL: @main4f_like_logical(475; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]476; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC2]]477; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]478; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]479; CHECK-NEXT: [[OR_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false480; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32481; CHECK-NEXT: ret i32 [[STOREMERGE]]482;483 %and = and i32 %argc, %argc2484 %tobool = icmp ne i32 %and, %argc2485 %and2 = and i32 %argc, %argc3486 %tobool3 = icmp ne i32 %and2, %argc3487 %or.cond = select i1 %tobool, i1 true, i1 %tobool3488 %storemerge = select i1 %or.cond, i32 0, i32 1489 ret i32 %storemerge490}491 492; (icmp eq (A & B), A) & (icmp eq (A & D), A) -> (icmp eq (A & (B&D)), A)493define i32 @main5_like(i32 %argc, i32 %argc2) {494; CHECK-LABEL: @main5_like(495; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]496; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7497; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], 7498; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32499; CHECK-NEXT: ret i32 [[STOREMERGE]]500;501 %and = and i32 %argc, 7502 %tobool = icmp eq i32 %and, 7503 %and2 = and i32 %argc2, 7504 %tobool3 = icmp eq i32 %and2, 7505 %and.cond = and i1 %tobool, %tobool3506 %storemerge = select i1 %and.cond, i32 0, i32 1507 ret i32 %storemerge508}509 510define i32 @main5_like_logical(i32 %argc, i32 %argc2) {511; CHECK-LABEL: @main5_like_logical(512; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7513; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7514; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7515; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 7516; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]517; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32518; CHECK-NEXT: ret i32 [[STOREMERGE]]519;520 %and = and i32 %argc, 7521 %tobool = icmp eq i32 %and, 7522 %and2 = and i32 %argc2, 7523 %tobool3 = icmp eq i32 %and2, 7524 %and.cond = select i1 %tobool, i1 %tobool3, i1 false525 %storemerge = select i1 %and.cond, i32 0, i32 1526 ret i32 %storemerge527}528 529define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3) {530; CHECK-LABEL: @main5e_like(531; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]532; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]533; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[ARGC]]534; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32535; CHECK-NEXT: ret i32 [[STOREMERGE]]536;537 %and = and i32 %argc, %argc2538 %tobool = icmp eq i32 %and, %argc539 %and2 = and i32 %argc, %argc3540 %tobool3 = icmp eq i32 %and2, %argc541 %and.cond = and i1 %tobool, %tobool3542 %storemerge = select i1 %and.cond, i32 0, i32 1543 ret i32 %storemerge544}545 546define i32 @main5e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {547; CHECK-LABEL: @main5e_like_logical(548; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]549; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC]]550; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]551; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC]]552; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]553; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32554; CHECK-NEXT: ret i32 [[STOREMERGE]]555;556 %and = and i32 %argc, %argc2557 %tobool = icmp eq i32 %and, %argc558 %and2 = and i32 %argc, %argc3559 %tobool3 = icmp eq i32 %and2, %argc560 %and.cond = select i1 %tobool, i1 %tobool3, i1 false561 %storemerge = select i1 %and.cond, i32 0, i32 1562 ret i32 %storemerge563}564 565; (icmp ne (A & B), A) | (icmp ne (A & D), A) -> (icmp ne (A & (B&D)), A)566define i32 @main5c_like(i32 %argc, i32 %argc2) {567; CHECK-LABEL: @main5c_like(568; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]569; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7570; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP2]], 7571; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32572; CHECK-NEXT: ret i32 [[STOREMERGE]]573;574 %and = and i32 %argc, 7575 %tobool = icmp ne i32 %and, 7576 %and2 = and i32 %argc2, 7577 %tobool3 = icmp ne i32 %and2, 7578 %or.cond = or i1 %tobool, %tobool3579 %storemerge = select i1 %or.cond, i32 0, i32 1580 ret i32 %storemerge581}582 583define i32 @main5c_like_logical(i32 %argc, i32 %argc2) {584; CHECK-LABEL: @main5c_like_logical(585; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7586; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7587; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7588; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 7589; CHECK-NEXT: [[OR_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false590; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32591; CHECK-NEXT: ret i32 [[STOREMERGE]]592;593 %and = and i32 %argc, 7594 %tobool = icmp ne i32 %and, 7595 %and2 = and i32 %argc2, 7596 %tobool3 = icmp ne i32 %and2, 7597 %or.cond = select i1 %tobool, i1 true, i1 %tobool3598 %storemerge = select i1 %or.cond, i32 0, i32 1599 ret i32 %storemerge600}601 602define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3) {603; CHECK-LABEL: @main5f_like(604; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]605; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]606; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP2]], [[ARGC]]607; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32608; CHECK-NEXT: ret i32 [[STOREMERGE]]609;610 %and = and i32 %argc, %argc2611 %tobool = icmp ne i32 %and, %argc612 %and2 = and i32 %argc, %argc3613 %tobool3 = icmp ne i32 %and2, %argc614 %or.cond = or i1 %tobool, %tobool3615 %storemerge = select i1 %or.cond, i32 0, i32 1616 ret i32 %storemerge617}618 619define i32 @main5f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {620; CHECK-LABEL: @main5f_like_logical(621; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]622; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC]]623; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]624; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC]]625; CHECK-NEXT: [[OR_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false626; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32627; CHECK-NEXT: ret i32 [[STOREMERGE]]628;629 %and = and i32 %argc, %argc2630 %tobool = icmp ne i32 %and, %argc631 %and2 = and i32 %argc, %argc3632 %tobool3 = icmp ne i32 %and2, %argc633 %or.cond = select i1 %tobool, i1 true, i1 %tobool3634 %storemerge = select i1 %or.cond, i32 0, i32 1635 ret i32 %storemerge636}637 638; (icmp eq (A & B), C) & (icmp eq (A & D), E) -> (icmp eq (A & (B|D)), (C|E))639; if B, C, D, E are constant, and it's possible640define i32 @main6(i32 %argc) {641; CHECK-LABEL: @main6(642; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55643; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 19644; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32645; CHECK-NEXT: ret i32 [[STOREMERGE]]646;647 %and = and i32 %argc, 7648 %tobool = icmp eq i32 %and, 3649 %and2 = and i32 %argc, 48650 %tobool3 = icmp eq i32 %and2, 16651 %and.cond = and i1 %tobool, %tobool3652 %storemerge = select i1 %and.cond, i32 0, i32 1653 ret i32 %storemerge654}655 656define i32 @main6_logical(i32 %argc) {657; CHECK-LABEL: @main6_logical(658; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55659; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 19660; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32661; CHECK-NEXT: ret i32 [[STOREMERGE]]662;663 %and = and i32 %argc, 7664 %tobool = icmp eq i32 %and, 3665 %and2 = and i32 %argc, 48666 %tobool3 = icmp eq i32 %and2, 16667 %and.cond = select i1 %tobool, i1 %tobool3, i1 false668 %storemerge = select i1 %and.cond, i32 0, i32 1669 ret i32 %storemerge670}671 672define i32 @main6b(i32 %argc) {673; CHECK-LABEL: @main6b(674; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23675; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 19676; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32677; CHECK-NEXT: ret i32 [[STOREMERGE]]678;679 %and = and i32 %argc, 7680 %tobool = icmp eq i32 %and, 3681 %and2 = and i32 %argc, 16682 %tobool3 = icmp ne i32 %and2, 0683 %and.cond = and i1 %tobool, %tobool3684 %storemerge = select i1 %and.cond, i32 0, i32 1685 ret i32 %storemerge686}687 688define i32 @main6b_logical(i32 %argc) {689; CHECK-LABEL: @main6b_logical(690; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23691; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP1]], 19692; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32693; CHECK-NEXT: ret i32 [[STOREMERGE]]694;695 %and = and i32 %argc, 7696 %tobool = icmp eq i32 %and, 3697 %and2 = and i32 %argc, 16698 %tobool3 = icmp ne i32 %and2, 0699 %and.cond = select i1 %tobool, i1 %tobool3, i1 false700 %storemerge = select i1 %and.cond, i32 0, i32 1701 ret i32 %storemerge702}703 704; (icmp ne (A & B), C) | (icmp ne (A & D), E) -> (icmp ne (A & (B|D)), (C|E))705; if B, C, D, E are constant, and it's possible706define i32 @main6c(i32 %argc) {707; CHECK-LABEL: @main6c(708; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55709; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 19710; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32711; CHECK-NEXT: ret i32 [[STOREMERGE]]712;713 %and = and i32 %argc, 7714 %tobool = icmp ne i32 %and, 3715 %and2 = and i32 %argc, 48716 %tobool3 = icmp ne i32 %and2, 16717 %or.cond = or i1 %tobool, %tobool3718 %storemerge = select i1 %or.cond, i32 0, i32 1719 ret i32 %storemerge720}721 722define i32 @main6c_logical(i32 %argc) {723; CHECK-LABEL: @main6c_logical(724; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55725; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 19726; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32727; CHECK-NEXT: ret i32 [[STOREMERGE]]728;729 %and = and i32 %argc, 7730 %tobool = icmp ne i32 %and, 3731 %and2 = and i32 %argc, 48732 %tobool3 = icmp ne i32 %and2, 16733 %or.cond = select i1 %tobool, i1 true, i1 %tobool3734 %storemerge = select i1 %or.cond, i32 0, i32 1735 ret i32 %storemerge736}737 738define i32 @main6d(i32 %argc) {739; CHECK-LABEL: @main6d(740; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23741; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 19742; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32743; CHECK-NEXT: ret i32 [[STOREMERGE]]744;745 %and = and i32 %argc, 7746 %tobool = icmp ne i32 %and, 3747 %and2 = and i32 %argc, 16748 %tobool3 = icmp eq i32 %and2, 0749 %or.cond = or i1 %tobool, %tobool3750 %storemerge = select i1 %or.cond, i32 0, i32 1751 ret i32 %storemerge752}753 754define i32 @main6d_logical(i32 %argc) {755; CHECK-LABEL: @main6d_logical(756; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23757; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 19758; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[OR_COND_NOT]] to i32759; CHECK-NEXT: ret i32 [[STOREMERGE]]760;761 %and = and i32 %argc, 7762 %tobool = icmp ne i32 %and, 3763 %and2 = and i32 %argc, 16764 %tobool3 = icmp eq i32 %and2, 0765 %or.cond = select i1 %tobool, i1 true, i1 %tobool3766 %storemerge = select i1 %or.cond, i32 0, i32 1767 ret i32 %storemerge768}769 770; test parameter permutations771; (B & A) == B & (D & A) == D772define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3) {773; CHECK-LABEL: @main7a(774; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]775; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]776; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]777; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32778; CHECK-NEXT: ret i32 [[STOREMERGE]]779;780 %and1 = and i32 %argc2, %argc781 %tobool = icmp eq i32 %and1, %argc2782 %and2 = and i32 %argc3, %argc783 %tobool3 = icmp eq i32 %and2, %argc3784 %and.cond = and i1 %tobool, %tobool3785 %storemerge = select i1 %and.cond, i32 0, i32 1786 ret i32 %storemerge787}788 789define i32 @main7a_logical(i32 %argc, i32 %argc2, i32 %argc3) {790; CHECK-LABEL: @main7a_logical(791; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]792; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND1]], [[ARGC2]]793; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]794; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC3]]795; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]796; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32797; CHECK-NEXT: ret i32 [[STOREMERGE]]798;799 %and1 = and i32 %argc2, %argc800 %tobool = icmp eq i32 %and1, %argc2801 %and2 = and i32 %argc3, %argc802 %tobool3 = icmp eq i32 %and2, %argc3803 %and.cond = select i1 %tobool, i1 %tobool3, i1 false804 %storemerge = select i1 %and.cond, i32 0, i32 1805 ret i32 %storemerge806}807 808; B == (A & B) & D == (A & D)809define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3x) {810; CHECK-LABEL: @main7b(811; CHECK-NEXT: [[ARGC3:%.*]] = mul i32 [[ARGC3X:%.*]], 42812; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3]]813; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]814; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]815; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32816; CHECK-NEXT: ret i32 [[STOREMERGE]]817;818 %argc3 = mul i32 %argc3x, 42 ; thwart complexity-based canonicalization819 %and1 = and i32 %argc, %argc2820 %tobool = icmp eq i32 %argc2, %and1821 %and2 = and i32 %argc, %argc3822 %tobool3 = icmp eq i32 %argc3, %and2823 %and.cond = and i1 %tobool, %tobool3824 %storemerge = select i1 %and.cond, i32 0, i32 1825 ret i32 %storemerge826}827 828define i32 @main7b_logical(i32 %argc, i32 %argc2, i32 %argc3) {829; CHECK-LABEL: @main7b_logical(830; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]831; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[ARGC2]], [[AND1]]832; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]833; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[ARGC3]], [[AND2]]834; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]835; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32836; CHECK-NEXT: ret i32 [[STOREMERGE]]837;838 %and1 = and i32 %argc, %argc2839 %tobool = icmp eq i32 %argc2, %and1840 %and2 = and i32 %argc, %argc3841 %tobool3 = icmp eq i32 %argc3, %and2842 %and.cond = select i1 %tobool, i1 %tobool3, i1 false843 %storemerge = select i1 %and.cond, i32 0, i32 1844 ret i32 %storemerge845}846 847; B == (B & A) & D == (D & A)848define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3x) {849; CHECK-LABEL: @main7c(850; CHECK-NEXT: [[ARGC3:%.*]] = mul i32 [[ARGC3X:%.*]], 42851; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3]]852; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]853; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]854; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32855; CHECK-NEXT: ret i32 [[STOREMERGE]]856;857 %argc3 = mul i32 %argc3x, 42 ; thwart complexity-based canonicalization858 %and1 = and i32 %argc2, %argc859 %tobool = icmp eq i32 %argc2, %and1860 %and2 = and i32 %argc3, %argc861 %tobool3 = icmp eq i32 %argc3, %and2862 %and.cond = and i1 %tobool, %tobool3863 %storemerge = select i1 %and.cond, i32 0, i32 1864 ret i32 %storemerge865}866 867define i32 @main7c_logical(i32 %argc, i32 %argc2, i32 %argc3) {868; CHECK-LABEL: @main7c_logical(869; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]870; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[ARGC2]], [[AND1]]871; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]872; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[ARGC3]], [[AND2]]873; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]874; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32875; CHECK-NEXT: ret i32 [[STOREMERGE]]876;877 %and1 = and i32 %argc2, %argc878 %tobool = icmp eq i32 %argc2, %and1879 %and2 = and i32 %argc3, %argc880 %tobool3 = icmp eq i32 %argc3, %and2881 %and.cond = select i1 %tobool, i1 %tobool3, i1 false882 %storemerge = select i1 %and.cond, i32 0, i32 1883 ret i32 %storemerge884}885 886; (A & (B & C)) == (B & C) & (A & (D & E)) == (D & E)887define i32 @main7d(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {888; CHECK-LABEL: @main7d(889; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]890; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]891; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]892; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]893; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]894; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32895; CHECK-NEXT: ret i32 [[STOREMERGE]]896;897 %bc = and i32 %argc2, %argc4898 %de = and i32 %argc3, %argc5899 %and1 = and i32 %argc, %bc900 %tobool = icmp eq i32 %and1, %bc901 %and2 = and i32 %argc, %de902 %tobool3 = icmp eq i32 %and2, %de903 %and.cond = and i1 %tobool, %tobool3904 %storemerge = select i1 %and.cond, i32 0, i32 1905 ret i32 %storemerge906}907 908define i32 @main7d_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {909; CHECK-LABEL: @main7d_logical(910; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]911; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]912; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[BC]]913; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND1]], [[BC]]914; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[DE]]915; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[DE]]916; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]917; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32918; CHECK-NEXT: ret i32 [[STOREMERGE]]919;920 %bc = and i32 %argc2, %argc4921 %de = and i32 %argc3, %argc5922 %and1 = and i32 %argc, %bc923 %tobool = icmp eq i32 %and1, %bc924 %and2 = and i32 %argc, %de925 %tobool3 = icmp eq i32 %and2, %de926 %and.cond = select i1 %tobool, i1 %tobool3, i1 false927 %storemerge = select i1 %and.cond, i32 0, i32 1928 ret i32 %storemerge929}930 931; ((B & C) & A) == (B & C) & ((D & E) & A) == (D & E)932define i32 @main7e(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {933; CHECK-LABEL: @main7e(934; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]935; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]936; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]937; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]938; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]939; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32940; CHECK-NEXT: ret i32 [[STOREMERGE]]941;942 %bc = and i32 %argc2, %argc4943 %de = and i32 %argc3, %argc5944 %and1 = and i32 %bc, %argc945 %tobool = icmp eq i32 %and1, %bc946 %and2 = and i32 %de, %argc947 %tobool3 = icmp eq i32 %and2, %de948 %and.cond = and i1 %tobool, %tobool3949 %storemerge = select i1 %and.cond, i32 0, i32 1950 ret i32 %storemerge951}952 953define i32 @main7e_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {954; CHECK-LABEL: @main7e_logical(955; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]956; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]957; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]958; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND1]], [[BC]]959; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]960; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[DE]]961; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]962; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i32963; CHECK-NEXT: ret i32 [[STOREMERGE]]964;965 %bc = and i32 %argc2, %argc4966 %de = and i32 %argc3, %argc5967 %and1 = and i32 %bc, %argc968 %tobool = icmp eq i32 %and1, %bc969 %and2 = and i32 %de, %argc970 %tobool3 = icmp eq i32 %and2, %de971 %and.cond = select i1 %tobool, i1 %tobool3, i1 false972 %storemerge = select i1 %and.cond, i32 0, i32 1973 ret i32 %storemerge974}975 976; (B & C) == (A & (B & C)) & (D & E) == (A & (D & E))977define i32 @main7f(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {978; CHECK-LABEL: @main7f(979; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]980; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]981; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]982; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]983; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]984; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i32985; CHECK-NEXT: ret i32 [[STOREMERGE]]986;987 %bc = and i32 %argc2, %argc4988 %de = and i32 %argc3, %argc5989 %and1 = and i32 %argc, %bc990 %tobool = icmp eq i32 %bc, %and1991 %and2 = and i32 %argc, %de992 %tobool3 = icmp eq i32 %de, %and2993 %and.cond = and i1 %tobool, %tobool3994 %storemerge = select i1 %and.cond, i32 0, i32 1995 ret i32 %storemerge996}997 998define i32 @main7f_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {999; CHECK-LABEL: @main7f_logical(1000; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]1001; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]1002; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[BC]]1003; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[BC]], [[AND1]]1004; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[DE]]1005; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[DE]], [[AND2]]1006; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]1007; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i321008; CHECK-NEXT: ret i32 [[STOREMERGE]]1009;1010 %bc = and i32 %argc2, %argc41011 %de = and i32 %argc3, %argc51012 %and1 = and i32 %argc, %bc1013 %tobool = icmp eq i32 %bc, %and11014 %and2 = and i32 %argc, %de1015 %tobool3 = icmp eq i32 %de, %and21016 %and.cond = select i1 %tobool, i1 %tobool3, i1 false1017 %storemerge = select i1 %and.cond, i32 0, i32 11018 ret i32 %storemerge1019}1020 1021; (B & C) == ((B & C) & A) & (D & E) == ((D & E) & A)1022define i32 @main7g(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {1023; CHECK-LABEL: @main7g(1024; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]1025; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]1026; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]1027; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]1028; CHECK-NEXT: [[AND_COND:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]1029; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND]] to i321030; CHECK-NEXT: ret i32 [[STOREMERGE]]1031;1032 %bc = and i32 %argc2, %argc41033 %de = and i32 %argc3, %argc51034 %and1 = and i32 %bc, %argc1035 %tobool = icmp eq i32 %bc, %and11036 %and2 = and i32 %de, %argc1037 %tobool3 = icmp eq i32 %de, %and21038 %and.cond = and i1 %tobool, %tobool31039 %storemerge = select i1 %and.cond, i32 0, i32 11040 ret i32 %storemerge1041}1042 1043define i32 @main7g_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %argc5) {1044; CHECK-LABEL: @main7g_logical(1045; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]1046; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]1047; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]1048; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[BC]], [[AND1]]1049; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]1050; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[DE]], [[AND2]]1051; CHECK-NEXT: [[AND_COND_NOT:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]1052; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[AND_COND_NOT]] to i321053; CHECK-NEXT: ret i32 [[STOREMERGE]]1054;1055 %bc = and i32 %argc2, %argc41056 %de = and i32 %argc3, %argc51057 %and1 = and i32 %bc, %argc1058 %tobool = icmp eq i32 %bc, %and11059 %and2 = and i32 %de, %argc1060 %tobool3 = icmp eq i32 %de, %and21061 %and.cond = select i1 %tobool, i1 %tobool3, i1 false1062 %storemerge = select i1 %and.cond, i32 0, i32 11063 ret i32 %storemerge1064}1065 1066define i32 @main8(i32 %argc) {1067; CHECK-LABEL: @main8(1068; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921069; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 01070; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21071; CHECK-NEXT: ret i32 [[RETVAL_0]]1072;1073 %and = and i32 %argc, 641074 %tobool = icmp ne i32 %and, 01075 %trunc2 = trunc i32 %argc to i81076 %tobool3 = icmp slt i8 %trunc2, 01077 %or.cond = or i1 %tobool, %tobool31078 %retval.0 = select i1 %or.cond, i32 2, i32 11079 ret i32 %retval.01080}1081 1082define i32 @main8_logical(i32 %argc) {1083; CHECK-LABEL: @main8_logical(1084; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921085; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 01086; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21087; CHECK-NEXT: ret i32 [[RETVAL_0]]1088;1089 %and = and i32 %argc, 641090 %tobool = icmp ne i32 %and, 01091 %trunc2 = trunc i32 %argc to i81092 %tobool3 = icmp slt i8 %trunc2, 01093 %or.cond = select i1 %tobool, i1 true, i1 %tobool31094 %retval.0 = select i1 %or.cond, i32 2, i32 11095 ret i32 %retval.01096}1097 1098define i32 @main9(i32 %argc) {1099; CHECK-LABEL: @main9(1100; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921101; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 1921102; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11103; CHECK-NEXT: ret i32 [[RETVAL_0]]1104;1105 %and = and i32 %argc, 641106 %tobool = icmp ne i32 %and, 01107 %trunc2 = trunc i32 %argc to i81108 %tobool3 = icmp slt i8 %trunc2, 01109 %or.cond = and i1 %tobool, %tobool31110 %retval.0 = select i1 %or.cond, i32 2, i32 11111 ret i32 %retval.01112}1113 1114define i32 @main9_logical(i32 %argc) {1115; CHECK-LABEL: @main9_logical(1116; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921117; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 1921118; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11119; CHECK-NEXT: ret i32 [[RETVAL_0]]1120;1121 %and = and i32 %argc, 641122 %tobool = icmp ne i32 %and, 01123 %trunc2 = trunc i32 %argc to i81124 %tobool3 = icmp slt i8 %trunc2, 01125 %or.cond = select i1 %tobool, i1 %tobool3, i1 false1126 %retval.0 = select i1 %or.cond, i32 2, i32 11127 ret i32 %retval.01128}1129 1130define i32 @main10(i32 %argc) {1131; CHECK-LABEL: @main10(1132; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921133; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 01134; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11135; CHECK-NEXT: ret i32 [[RETVAL_0]]1136;1137 %and = and i32 %argc, 641138 %tobool = icmp eq i32 %and, 01139 %trunc2 = trunc i32 %argc to i81140 %tobool3 = icmp sge i8 %trunc2, 01141 %or.cond = and i1 %tobool, %tobool31142 %retval.0 = select i1 %or.cond, i32 2, i32 11143 ret i32 %retval.01144}1145 1146define i32 @main10_logical(i32 %argc) {1147; CHECK-LABEL: @main10_logical(1148; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921149; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 01150; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11151; CHECK-NEXT: ret i32 [[RETVAL_0]]1152;1153 %and = and i32 %argc, 641154 %tobool = icmp eq i32 %and, 01155 %trunc2 = trunc i32 %argc to i81156 %tobool3 = icmp sge i8 %trunc2, 01157 %or.cond = select i1 %tobool, i1 %tobool3, i1 false1158 %retval.0 = select i1 %or.cond, i32 2, i32 11159 ret i32 %retval.01160}1161 1162define i32 @main11(i32 %argc) {1163; CHECK-LABEL: @main11(1164; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921165; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 1921166; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21167; CHECK-NEXT: ret i32 [[RETVAL_0]]1168;1169 %and = and i32 %argc, 641170 %tobool = icmp eq i32 %and, 01171 %trunc2 = trunc i32 %argc to i81172 %tobool3 = icmp sge i8 %trunc2, 01173 %or.cond = or i1 %tobool, %tobool31174 %retval.0 = select i1 %or.cond, i32 2, i32 11175 ret i32 %retval.01176}1177 1178define i32 @main11_logical(i32 %argc) {1179; CHECK-LABEL: @main11_logical(1180; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 1921181; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 1921182; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21183; CHECK-NEXT: ret i32 [[RETVAL_0]]1184;1185 %and = and i32 %argc, 641186 %tobool = icmp eq i32 %and, 01187 %trunc2 = trunc i32 %argc to i81188 %tobool3 = icmp sge i8 %trunc2, 01189 %or.cond = select i1 %tobool, i1 true, i1 %tobool31190 %retval.0 = select i1 %or.cond, i32 2, i32 11191 ret i32 %retval.01192}1193 1194define i32 @main12(i32 %argc) {1195; CHECK-LABEL: @main12(1196; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961197; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 01198; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21199; CHECK-NEXT: ret i32 [[RETVAL_0]]1200;1201 %trunc = trunc i32 %argc to i161202 %tobool = icmp slt i16 %trunc, 01203 %trunc2 = trunc i32 %argc to i81204 %tobool3 = icmp slt i8 %trunc2, 01205 %or.cond = or i1 %tobool, %tobool31206 %retval.0 = select i1 %or.cond, i32 2, i32 11207 ret i32 %retval.01208}1209 1210define i32 @main12_logical(i32 %argc) {1211; CHECK-LABEL: @main12_logical(1212; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961213; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 01214; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21215; CHECK-NEXT: ret i32 [[RETVAL_0]]1216;1217 %trunc = trunc i32 %argc to i161218 %tobool = icmp slt i16 %trunc, 01219 %trunc2 = trunc i32 %argc to i81220 %tobool3 = icmp slt i8 %trunc2, 01221 %or.cond = select i1 %tobool, i1 true, i1 %tobool31222 %retval.0 = select i1 %or.cond, i32 2, i32 11223 ret i32 %retval.01224}1225 1226define i32 @main13(i32 %argc) {1227; CHECK-LABEL: @main13(1228; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961229; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 328961230; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11231; CHECK-NEXT: ret i32 [[RETVAL_0]]1232;1233 %trunc = trunc i32 %argc to i161234 %tobool = icmp slt i16 %trunc, 01235 %trunc2 = trunc i32 %argc to i81236 %tobool3 = icmp slt i8 %trunc2, 01237 %or.cond = and i1 %tobool, %tobool31238 %retval.0 = select i1 %or.cond, i32 2, i32 11239 ret i32 %retval.01240}1241 1242define i32 @main13_logical(i32 %argc) {1243; CHECK-LABEL: @main13_logical(1244; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961245; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 328961246; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11247; CHECK-NEXT: ret i32 [[RETVAL_0]]1248;1249 %trunc = trunc i32 %argc to i161250 %tobool = icmp slt i16 %trunc, 01251 %trunc2 = trunc i32 %argc to i81252 %tobool3 = icmp slt i8 %trunc2, 01253 %or.cond = select i1 %tobool, i1 %tobool3, i1 false1254 %retval.0 = select i1 %or.cond, i32 2, i32 11255 ret i32 %retval.01256}1257 1258define i32 @main14(i32 %argc) {1259; CHECK-LABEL: @main14(1260; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961261; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 01262; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11263; CHECK-NEXT: ret i32 [[RETVAL_0]]1264;1265 %trunc = trunc i32 %argc to i161266 %tobool = icmp sge i16 %trunc, 01267 %trunc2 = trunc i32 %argc to i81268 %tobool3 = icmp sge i8 %trunc2, 01269 %or.cond = and i1 %tobool, %tobool31270 %retval.0 = select i1 %or.cond, i32 2, i32 11271 ret i32 %retval.01272}1273 1274define i32 @main14_logical(i32 %argc) {1275; CHECK-LABEL: @main14_logical(1276; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961277; CHECK-NEXT: [[OR_COND:%.*]] = icmp eq i32 [[TMP1]], 01278; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 11279; CHECK-NEXT: ret i32 [[RETVAL_0]]1280;1281 %trunc = trunc i32 %argc to i161282 %tobool = icmp sge i16 %trunc, 01283 %trunc2 = trunc i32 %argc to i81284 %tobool3 = icmp sge i8 %trunc2, 01285 %or.cond = select i1 %tobool, i1 %tobool3, i1 false1286 %retval.0 = select i1 %or.cond, i32 2, i32 11287 ret i32 %retval.01288}1289 1290define i32 @main15(i32 %argc) {1291; CHECK-LABEL: @main15(1292; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961293; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 328961294; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21295; CHECK-NEXT: ret i32 [[RETVAL_0]]1296;1297 %trunc = trunc i32 %argc to i161298 %tobool = icmp sge i16 %trunc, 01299 %trunc2 = trunc i32 %argc to i81300 %tobool3 = icmp sge i8 %trunc2, 01301 %or.cond = or i1 %tobool, %tobool31302 %retval.0 = select i1 %or.cond, i32 2, i32 11303 ret i32 %retval.01304}1305 1306define i32 @main15_logical(i32 %argc) {1307; CHECK-LABEL: @main15_logical(1308; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 328961309; CHECK-NEXT: [[OR_COND_NOT:%.*]] = icmp eq i32 [[TMP1]], 328961310; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND_NOT]], i32 1, i32 21311; CHECK-NEXT: ret i32 [[RETVAL_0]]1312;1313 %trunc = trunc i32 %argc to i161314 %tobool = icmp sge i16 %trunc, 01315 %trunc2 = trunc i32 %argc to i81316 %tobool3 = icmp sge i8 %trunc2, 01317 %or.cond = select i1 %tobool, i1 true, i1 %tobool31318 %retval.0 = select i1 %or.cond, i32 2, i32 11319 ret i32 %retval.01320}1321 1322define i1 @no_masks_with_logical_or(i32 %a, i32 %b, i32 noundef %c) {1323; CHECK-LABEL: @no_masks_with_logical_or(1324; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[B:%.*]], 631325; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[C:%.*]]1326; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 01327; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP2]], i1 true, i1 [[CMP2]]1328; CHECK-NEXT: ret i1 [[OR2]]1329;1330 %cmp1 = icmp ne i32 %a, 01331 %cmp2 = icmp ne i32 %b, 631332 %or1 = select i1 %cmp1, i1 true, i1 %cmp21333 %cmp3 = icmp ne i32 %c, 01334 %or2 = or i1 %or1, %cmp31335 ret i1 %or21336}1337 1338define i1 @no_masks_with_logical_or_commuted(i32 %a, i32 %b, i32 noundef %c) {1339; CHECK-LABEL: @no_masks_with_logical_or_commuted(1340; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[B:%.*]], 631341; CHECK-NEXT: [[C:%.*]] = or i32 [[C1:%.*]], [[A:%.*]]1342; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i32 [[C]], 01343; CHECK-NEXT: [[OR2:%.*]] = select i1 [[CMP3]], i1 true, i1 [[CMP2]]1344; CHECK-NEXT: ret i1 [[OR2]]1345;1346 %cmp1 = icmp ne i32 %a, 01347 %cmp2 = icmp ne i32 %b, 631348 %or1 = select i1 %cmp1, i1 true, i1 %cmp21349 %cmp3 = icmp ne i32 %c, 01350 %or2 = or i1 %cmp3, %or11351 ret i1 %or21352}1353 1354define i1 @no_masks_with_logical_or2(i32 %a, i32 %b, i32 noundef %c) {1355; CHECK-LABEL: @no_masks_with_logical_or2(1356; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[B:%.*]], 631357; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[C:%.*]]1358; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], -11359; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP2]], i1 true, i1 [[CMP2]]1360; CHECK-NEXT: ret i1 [[OR2]]1361;1362 %cmp1 = icmp ne i32 %a, -11363 %cmp2 = icmp ne i32 %b, 631364 %or1 = select i1 %cmp1, i1 true, i1 %cmp21365 %cmp3 = icmp ne i32 %c, -11366 %or2 = or i1 %or1, %cmp31367 ret i1 %or21368}1369 1370define <2 x i1> @no_masks_with_logical_or_vec_poison1(<2 x i32> %a, <2 x i32> %b, <2 x i32> noundef %c) {1371; CHECK-LABEL: @no_masks_with_logical_or_vec_poison1(1372; CHECK-NEXT: [[CMP2:%.*]] = icmp ne <2 x i32> [[B:%.*]], <i32 63, i32 poison>1373; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[A:%.*]], [[C:%.*]]1374; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer1375; CHECK-NEXT: [[OR2:%.*]] = select <2 x i1> [[TMP2]], <2 x i1> splat (i1 true), <2 x i1> [[CMP2]]1376; CHECK-NEXT: ret <2 x i1> [[OR2]]1377;1378 %cmp1 = icmp ne <2 x i32> %a, <i32 0, i32 poison>1379 %cmp2 = icmp ne <2 x i32> %b, <i32 63, i32 poison>1380 %or1 = select <2 x i1> %cmp1, <2 x i1> <i1 true, i1 true>, <2 x i1> %cmp21381 %cmp3 = icmp ne <2 x i32> %c, <i32 0, i32 poison>1382 %or2 = or <2 x i1> %or1, %cmp31383 ret <2 x i1> %or21384}1385 1386define <2 x i1> @no_masks_with_logical_or_vec_poison2(<2 x i32> %a, <2 x i32> %b, <2 x i32> noundef %c) {1387; CHECK-LABEL: @no_masks_with_logical_or_vec_poison2(1388; CHECK-NEXT: [[CMP2:%.*]] = icmp ne <2 x i32> [[B:%.*]], <i32 63, i32 poison>1389; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], [[C:%.*]]1390; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[TMP1]], splat (i32 -1)1391; CHECK-NEXT: [[OR2:%.*]] = select <2 x i1> [[TMP2]], <2 x i1> splat (i1 true), <2 x i1> [[CMP2]]1392; CHECK-NEXT: ret <2 x i1> [[OR2]]1393;1394 %cmp1 = icmp ne <2 x i32> %a, <i32 -1, i32 poison>1395 %cmp2 = icmp ne <2 x i32> %b, <i32 63, i32 poison>1396 %or1 = select <2 x i1> %cmp1, <2 x i1> <i1 true, i1 true>, <2 x i1> %cmp21397 %cmp3 = icmp ne <2 x i32> %c, <i32 -1, i32 poison>1398 %or2 = or <2 x i1> %or1, %cmp31399 ret <2 x i1> %or21400}1401 1402define i1 @only_one_masked(i64 %a) {1403; CHECK-LABEL: @only_one_masked(1404; CHECK-NEXT: [[AND:%.*]] = icmp eq i64 [[A:%.*]], -92233720368547758081405; CHECK-NEXT: ret i1 [[AND]]1406;1407 %cmp1 = icmp ne i64 %a, 01408 %a.mask = and i64 %a, 92233720368547758071409 %cmp2 = icmp eq i64 %a.mask, 01410 %and = and i1 %cmp1, %cmp21411 ret i1 %and1412}1413