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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; PR1252285 6define <16 x i8> @knownbits_bitcast_masked_shift(<16 x i8> %arg1, <16 x i8> %arg2) {7; CHECK-LABEL: define <16 x i8> @knownbits_bitcast_masked_shift(8; CHECK-SAME: <16 x i8> [[ARG1:%.*]], <16 x i8> [[ARG2:%.*]]) {9; CHECK-NEXT: [[AND:%.*]] = and <16 x i8> [[ARG1]], splat (i8 3)10; CHECK-NEXT: [[AND3:%.*]] = and <16 x i8> [[ARG2]], splat (i8 48)11; CHECK-NEXT: [[OR:%.*]] = or disjoint <16 x i8> [[AND3]], [[AND]]12; CHECK-NEXT: [[BITCAST4:%.*]] = bitcast <16 x i8> [[OR]] to <8 x i16>13; CHECK-NEXT: [[SHL5:%.*]] = shl nuw <8 x i16> [[BITCAST4]], splat (i16 2)14; CHECK-NEXT: [[BITCAST6:%.*]] = bitcast <8 x i16> [[SHL5]] to <16 x i8>15; CHECK-NEXT: ret <16 x i8> [[BITCAST6]]16;17 %and = and <16 x i8> %arg1, splat (i8 3)18 %and3 = and <16 x i8> %arg2, splat (i8 48)19 %or = or disjoint <16 x i8> %and3, %and20 %bitcast4 = bitcast <16 x i8> %or to <8 x i16>21 %shl5 = shl nuw <8 x i16> %bitcast4, splat (i16 2)22 %bitcast6 = bitcast <8 x i16> %shl5 to <16 x i8>23 %and7 = and <16 x i8> %bitcast6, splat (i8 -52)24 ret <16 x i8> %and725}26 27define <16 x i8> @knownbits_shuffle_masked_nibble_shift(<16 x i8> %arg) {28; CHECK-LABEL: define <16 x i8> @knownbits_shuffle_masked_nibble_shift(29; CHECK-SAME: <16 x i8> [[ARG:%.*]]) {30; CHECK-NEXT: [[AND:%.*]] = and <16 x i8> [[ARG]], splat (i8 15)31; CHECK-NEXT: [[SHUFFLEVECTOR:%.*]] = shufflevector <16 x i8> [[AND]], <16 x i8> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>32; CHECK-NEXT: [[BITCAST1:%.*]] = bitcast <16 x i8> [[SHUFFLEVECTOR]] to <8 x i16>33; CHECK-NEXT: [[SHL:%.*]] = shl nuw <8 x i16> [[BITCAST1]], splat (i16 4)34; CHECK-NEXT: [[BITCAST2:%.*]] = bitcast <8 x i16> [[SHL]] to <16 x i8>35; CHECK-NEXT: ret <16 x i8> [[BITCAST2]]36;37 %and = and <16 x i8> %arg, splat (i8 15)38 %shufflevector = shufflevector <16 x i8> %and, <16 x i8> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>39 %bitcast1 = bitcast <16 x i8> %shufflevector to <8 x i16>40 %shl = shl nuw <8 x i16> %bitcast1, splat (i16 4)41 %bitcast2 = bitcast <8 x i16> %shl to <16 x i8>42 %and3 = and <16 x i8> %bitcast2, splat (i8 -16)43 ret <16 x i8> %and344}45 46define <16 x i8> @knownbits_reverse_shuffle_masked_shift(<16 x i8> %arg) {47; CHECK-LABEL: define <16 x i8> @knownbits_reverse_shuffle_masked_shift(48; CHECK-SAME: <16 x i8> [[ARG:%.*]]) {49; CHECK-NEXT: [[AND:%.*]] = and <16 x i8> [[ARG]], splat (i8 15)50; CHECK-NEXT: [[SHUFFLEVECTOR:%.*]] = shufflevector <16 x i8> [[AND]], <16 x i8> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>51; CHECK-NEXT: [[BITCAST1:%.*]] = bitcast <16 x i8> [[SHUFFLEVECTOR]] to <8 x i16>52; CHECK-NEXT: [[SHL:%.*]] = shl nuw <8 x i16> [[BITCAST1]], splat (i16 4)53; CHECK-NEXT: [[BITCAST2:%.*]] = bitcast <8 x i16> [[SHL]] to <16 x i8>54; CHECK-NEXT: ret <16 x i8> [[BITCAST2]]55;56 %and = and <16 x i8> %arg, splat (i8 15)57 %shufflevector = shufflevector <16 x i8> %and, <16 x i8> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>58 %bitcast1 = bitcast <16 x i8> %shufflevector to <8 x i16>59 %shl = shl nuw <8 x i16> %bitcast1, splat (i16 4)60 %bitcast2 = bitcast <8 x i16> %shl to <16 x i8>61 %and3 = and <16 x i8> %bitcast2, splat (i8 -16)62 ret <16 x i8> %and363}64 65define <16 x i8> @knownbits_extract_bit(<8 x i16> %arg) {66; CHECK-LABEL: define <16 x i8> @knownbits_extract_bit(67; CHECK-SAME: <8 x i16> [[ARG:%.*]]) {68; CHECK-NEXT: [[LSHR:%.*]] = lshr <8 x i16> [[ARG]], splat (i16 15)69; CHECK-NEXT: [[BITCAST1:%.*]] = bitcast <8 x i16> [[LSHR]] to <16 x i8>70; CHECK-NEXT: ret <16 x i8> [[BITCAST1]]71;72 %lshr = lshr <8 x i16> %arg, splat (i16 15)73 %bitcast1 = bitcast <8 x i16> %lshr to <16 x i8>74 %and = and <16 x i8> %bitcast1, splat (i8 1)75 ret <16 x i8> %and76}77 78define { i32, i1 } @knownbits_popcount_add_with_overflow(<2 x i64> %arg1, <2 x i64> %arg2) {79; CHECK-LABEL: define { i32, i1 } @knownbits_popcount_add_with_overflow(80; CHECK-SAME: <2 x i64> [[ARG1:%.*]], <2 x i64> [[ARG2:%.*]]) {81; CHECK-NEXT: [[CALL:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[ARG1]])82; CHECK-NEXT: [[BITCAST5:%.*]] = bitcast <2 x i64> [[CALL]] to <4 x i32>83; CHECK-NEXT: [[EXTRACTELEMENT:%.*]] = extractelement <4 x i32> [[BITCAST5]], i64 084; CHECK-NEXT: [[CALL9:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[ARG2]])85; CHECK-NEXT: [[BITCAST10:%.*]] = bitcast <2 x i64> [[CALL9]] to <4 x i32>86; CHECK-NEXT: [[EXTRACTELEMENT11:%.*]] = extractelement <4 x i32> [[BITCAST10]], i64 087; CHECK-NEXT: [[CALL12:%.*]] = add nuw nsw i32 [[EXTRACTELEMENT]], [[EXTRACTELEMENT11]]88; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[CALL12]], 089; CHECK-NEXT: ret { i32, i1 } [[TMP1]]90;91 %call = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %arg1)92 %bitcast5 = bitcast <2 x i64> %call to <4 x i32>93 %extractelement = extractelement <4 x i32> %bitcast5, i64 094 %call9 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %arg2)95 %bitcast10 = bitcast <2 x i64> %call9 to <4 x i32>96 %extractelement11 = extractelement <4 x i32> %bitcast10, i64 097 %call12 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %extractelement, i32 %extractelement11)98 ret { i32, i1 } %call1299}100 101define <16 x i8> @knownbits_shuffle_add_shift_v32i8(<16 x i8> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) {102; CHECK-LABEL: define <16 x i8> @knownbits_shuffle_add_shift_v32i8(103; CHECK-SAME: <16 x i8> [[ARG1:%.*]], <8 x i16> [[ARG2:%.*]], <8 x i16> [[ARG3:%.*]]) {104; CHECK-NEXT: [[SHL6:%.*]] = shl <8 x i16> [[ARG2]], splat (i16 8)105; CHECK-NEXT: [[BITCAST7:%.*]] = bitcast <8 x i16> [[SHL6]] to <16 x i8>106; CHECK-NEXT: [[SHL10:%.*]] = shl <8 x i16> [[ARG3]], splat (i16 8)107; CHECK-NEXT: [[BITCAST11:%.*]] = bitcast <8 x i16> [[SHL10]] to <16 x i8>108; CHECK-NEXT: [[ADD12:%.*]] = add <16 x i8> [[BITCAST11]], [[BITCAST7]]109; CHECK-NEXT: [[ADD14:%.*]] = add <16 x i8> [[ADD12]], [[ARG1]]110; CHECK-NEXT: ret <16 x i8> [[ADD14]]111;112 %shl6 = shl <8 x i16> %arg2, splat (i16 8)113 %bitcast7 = bitcast <8 x i16> %shl6 to <16 x i8>114 %shl10 = shl <8 x i16> %arg3, splat (i16 8)115 %bitcast11 = bitcast <8 x i16> %shl10 to <16 x i8>116 %add12 = add <16 x i8> %bitcast11, %bitcast7117 %add13 = add <16 x i8> %add12, %arg1118 %bitcast14 = bitcast <16 x i8> %add12 to <8 x i16>119 %shl15 = shl <8 x i16> %bitcast14, splat (i16 8)120 %bitcast16 = bitcast <8 x i16> %shl15 to <16 x i8>121 %add17 = add <16 x i8> %add13, %bitcast16122 ret <16 x i8> %add17123}124 125declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)126 127declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32)128