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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"5 6declare i16 @llvm.bitreverse.i16(i16)7declare i32 @llvm.bitreverse.i32(i32)8declare i64 @llvm.bitreverse.i64(i64)9declare <2 x i8> @llvm.bitreverse.v2i8(<2 x i8>)10declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>)11declare void @use_i32(i32)12declare void @use_i64(i64)13 14;pairwise reverse15;template <typename T>16;T reverse(T v) {17; T s = sizeof(v) * 8;18; T mask = ~(T)0;19; while ((s >>= 1) > 0) {20; mask ^= (mask << s);21; v = ((v >> s) & mask) | ((v << s) & ~mask);22; }23; return v;24;}25define i8 @rev8(i8 %v) {26; CHECK-LABEL: @rev8(27; CHECK-NEXT: entry:28; CHECK-NEXT: [[OR_2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[V:%.*]])29; CHECK-NEXT: ret i8 [[OR_2]]30;31entry:32 %shr4 = lshr i8 %v, 433 %shl7 = shl i8 %v, 434 %or = or i8 %shr4, %shl735 %shr4.1 = lshr i8 %or, 236 %and.1 = and i8 %shr4.1, 5137 %shl7.1 = shl i8 %or, 238 %and9.1 = and i8 %shl7.1, -5239 %or.1 = or i8 %and.1, %and9.140 %shr4.2 = lshr i8 %or.1, 141 %and.2 = and i8 %shr4.2, 8542 %shl7.2 = shl i8 %or.1, 143 %and9.2 = and i8 %shl7.2, -8644 %or.2 = or i8 %and.2, %and9.245 ret i8 %or.246}47 48define i16 @rev16(i16 %v) {49; CHECK-LABEL: @rev16(50; CHECK-NEXT: entry:51; CHECK-NEXT: [[OR_3:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[V:%.*]])52; CHECK-NEXT: ret i16 [[OR_3]]53;54entry:55 %shr4 = lshr i16 %v, 856 %shl7 = shl i16 %v, 857 %or = or i16 %shr4, %shl758 %shr4.1 = lshr i16 %or, 459 %and.1 = and i16 %shr4.1, 385560 %shl7.1 = shl i16 %or, 461 %and9.1 = and i16 %shl7.1, -385662 %or.1 = or i16 %and.1, %and9.163 %shr4.2 = lshr i16 %or.1, 264 %and.2 = and i16 %shr4.2, 1310765 %shl7.2 = shl i16 %or.1, 266 %and9.2 = and i16 %shl7.2, -1310867 %or.2 = or i16 %and.2, %and9.268 %shr4.3 = lshr i16 %or.2, 169 %and.3 = and i16 %shr4.3, 2184570 %shl7.3 = shl i16 %or.2, 171 %and9.3 = and i16 %shl7.3, -2184672 %or.3 = or i16 %and.3, %and9.373 ret i16 %or.374}75 76define i32 @rev32(i32 %v) {77; CHECK-LABEL: @rev32(78; CHECK-NEXT: entry:79; CHECK-NEXT: [[OR_4:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[V:%.*]])80; CHECK-NEXT: ret i32 [[OR_4]]81;82entry:83 %shr1 = lshr i32 %v, 1684 %shl2 = shl i32 %v, 1685 %or = or i32 %shr1, %shl286 %shr1.1 = lshr i32 %or, 887 %and.1 = and i32 %shr1.1, 1671193588 %shl2.1 = shl i32 %or, 889 %and3.1 = and i32 %shl2.1, -1671193690 %or.1 = or i32 %and.1, %and3.191 %shr1.2 = lshr i32 %or.1, 492 %and.2 = and i32 %shr1.2, 25264513593 %shl2.2 = shl i32 %or.1, 494 %and3.2 = and i32 %shl2.2, -25264513695 %or.2 = or i32 %and.2, %and3.296 %shr1.3 = lshr i32 %or.2, 297 %and.3 = and i32 %shr1.3, 85899345998 %shl2.3 = shl i32 %or.2, 299 %and3.3 = and i32 %shl2.3, -858993460100 %or.3 = or i32 %and.3, %and3.3101 %shr1.4 = lshr i32 %or.3, 1102 %and.4 = and i32 %shr1.4, 1431655765103 %shl2.4 = shl i32 %or.3, 1104 %and3.4 = and i32 %shl2.4, -1431655766105 %or.4 = or i32 %and.4, %and3.4106 ret i32 %or.4107}108 109define i32 @rev32_bswap(i32 %v) {110; CHECK-LABEL: @rev32_bswap(111; CHECK-NEXT: [[RET:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[V:%.*]])112; CHECK-NEXT: ret i32 [[RET]]113;114 %and.i = lshr i32 %v, 1115 %shr.i = and i32 %and.i, 1431655765116 %and1.i = shl i32 %v, 1117 %shl.i = and i32 %and1.i, -1431655766118 %or.i = or disjoint i32 %shr.i, %shl.i119 %and2.i = lshr i32 %or.i, 2120 %shr3.i = and i32 %and2.i, 858993459121 %and4.i = shl i32 %or.i, 2122 %shl5.i = and i32 %and4.i, -858993460123 %or6.i = or disjoint i32 %shr3.i, %shl5.i124 %and7.i = lshr i32 %or6.i, 4125 %shr8.i = and i32 %and7.i, 252645135126 %and9.i = shl i32 %or6.i, 4127 %shl10.i = and i32 %and9.i, -252645136128 %or11.i = or disjoint i32 %shr8.i, %shl10.i129 %ret = call i32 @llvm.bswap.i32(i32 %or11.i)130 ret i32 %ret131}132 133define i64 @rev64(i64 %v) {134; CHECK-LABEL: @rev64(135; CHECK-NEXT: entry:136; CHECK-NEXT: [[OR_5:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[V:%.*]])137; CHECK-NEXT: ret i64 [[OR_5]]138;139entry:140 %shr2 = lshr i64 %v, 32141 %shl4 = shl i64 %v, 32142 %or = or i64 %shr2, %shl4143 %shr2.1 = lshr i64 %or, 16144 %and.1 = and i64 %shr2.1, 281470681808895145 %shl4.1 = shl i64 %or, 16146 %and5.1 = and i64 %shl4.1, -281470681808896147 %or.1 = or i64 %and.1, %and5.1148 %shr2.2 = lshr i64 %or.1, 8149 %and.2 = and i64 %shr2.2, 71777214294589695150 %shl4.2 = shl i64 %or.1, 8151 %and5.2 = and i64 %shl4.2, -71777214294589696152 %or.2 = or i64 %and.2, %and5.2153 %shr2.3 = lshr i64 %or.2, 4154 %and.3 = and i64 %shr2.3, 1085102592571150095155 %shl4.3 = shl i64 %or.2, 4156 %and5.3 = and i64 %shl4.3, -1085102592571150096157 %or.3 = or i64 %and.3, %and5.3158 %shr2.4 = lshr i64 %or.3, 2159 %and.4 = and i64 %shr2.4, 3689348814741910323160 %shl4.4 = shl i64 %or.3, 2161 %and5.4 = and i64 %shl4.4, -3689348814741910324162 %or.4 = or i64 %and.4, %and5.4163 %shr2.5 = lshr i64 %or.4, 1164 %and.5 = and i64 %shr2.5, 6148914691236517205165 %shl4.5 = shl i64 %or.4, 1166 %and5.5 = and i64 %shl4.5, -6148914691236517206167 %or.5 = or i64 %and.5, %and5.5168 ret i64 %or.5169}170 171;unsigned char rev8_xor(unsigned char x) {172; unsigned char y;173; y = x&0x55; x ^= y; x |= (y<<2)|(y>>6);174; y = x&0x66; x ^= y; x |= (y<<4)|(y>>4);175; return (x<<1)|(x>>7);176;}177 178define i8 @rev8_xor(i8 %0) {179; CHECK-LABEL: @rev8_xor(180; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP0:%.*]])181; CHECK-NEXT: ret i8 [[TMP2]]182;183 %2 = and i8 %0, 85184 %3 = xor i8 %0, %2185 %4 = shl i8 %2, 2186 %5 = lshr i8 %2, 6187 %6 = or i8 %5, %3188 %7 = or i8 %6, %4189 %8 = and i8 %7, 102190 %9 = xor i8 %7, %8191 %10 = lshr i8 %8, 4192 %11 = or i8 %10, %9193 %12 = shl i8 %8, 5194 %13 = shl i8 %11, 1195 %14 = or i8 %12, %13196 %15 = lshr i8 %0, 7197 %16 = or i8 %14, %15198 ret i8 %16199}200 201define <2 x i8> @rev8_xor_vector(<2 x i8> %0) {202; CHECK-LABEL: @rev8_xor_vector(203; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> [[TMP0:%.*]])204; CHECK-NEXT: ret <2 x i8> [[TMP2]]205;206 %2 = and <2 x i8> %0, <i8 85, i8 85>207 %3 = xor <2 x i8> %0, %2208 %4 = shl <2 x i8> %2, <i8 2, i8 2>209 %5 = lshr <2 x i8> %2, <i8 6, i8 6>210 %6 = or <2 x i8> %5, %3211 %7 = or <2 x i8> %6, %4212 %8 = and <2 x i8> %7, <i8 102, i8 102>213 %9 = xor <2 x i8> %7, %8214 %10 = lshr <2 x i8> %8, <i8 4, i8 4>215 %11 = or <2 x i8> %10, %9216 %12 = shl <2 x i8> %8, <i8 5, i8 5>217 %13 = shl <2 x i8> %11, <i8 1, i8 1>218 %14 = or <2 x i8> %12, %13219 %15 = lshr <2 x i8> %0, <i8 7, i8 7>220 %16 = or <2 x i8> %14, %15221 ret <2 x i8> %16222}223 224; bitreverse8(x) = ((x * 0x0202020202ULL) & 0x010884422010ULL) % 1023225define i8 @rev8_mul_and_urem(i8 %0) {226; CHECK-LABEL: @rev8_mul_and_urem(227; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[TMP0:%.*]] to i64228; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[TMP2]], 8623620610229; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 1136090292240230; CHECK-NEXT: [[TMP5:%.*]] = urem i64 [[TMP4]], 1023231; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8232; CHECK-NEXT: ret i8 [[TMP6]]233;234 %2 = zext i8 %0 to i64235 %3 = mul nuw nsw i64 %2, 8623620610236 %4 = and i64 %3, 1136090292240237 %5 = urem i64 %4, 1023238 %6 = trunc i64 %5 to i8239 ret i8 %6240}241 242; bitreverse8(x) = ((x * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32243define i8 @rev8_mul_and_mul(i8 %0) {244; CHECK-LABEL: @rev8_mul_and_mul(245; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[TMP0:%.*]] to i64246; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[TMP2]], 2149582850247; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 36578664720248; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4311810305249; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 32250; CHECK-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8251; CHECK-NEXT: ret i8 [[TMP7]]252;253 %2 = zext i8 %0 to i64254 %3 = mul nuw nsw i64 %2, 2149582850255 %4 = and i64 %3, 36578664720256 %5 = mul i64 %4, 4311810305257 %6 = lshr i64 %5, 32258 %7 = trunc i64 %6 to i8259 ret i8 %7260}261 262; bitreverse8(x) = (((x * 0x0802LU) & 0x22110LU) | ((x * 0x8020LU) & 0x88440LU)) * 0x10101LU >> 16263define i8 @rev8_mul_and_lshr(i8 %0) {264; CHECK-LABEL: @rev8_mul_and_lshr(265; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[TMP0:%.*]] to i64266; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[TMP2]], 2050267; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 139536268; CHECK-NEXT: [[TMP5:%.*]] = mul nuw nsw i64 [[TMP2]], 32800269; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 558144270; CHECK-NEXT: [[TMP7:%.*]] = or disjoint i64 [[TMP4]], [[TMP6]]271; CHECK-NEXT: [[TMP8:%.*]] = mul nuw nsw i64 [[TMP7]], 65793272; CHECK-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 16273; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i8274; CHECK-NEXT: ret i8 [[TMP10]]275;276 %2 = zext i8 %0 to i64277 %3 = mul nuw nsw i64 %2, 2050278 %4 = and i64 %3, 139536279 %5 = mul nuw nsw i64 %2, 32800280 %6 = and i64 %5, 558144281 %7 = or i64 %4, %6282 %8 = mul nuw nsw i64 %7, 65793283 %9 = lshr i64 %8, 16284 %10 = trunc i64 %9 to i8285 ret i8 %10286}287 288define i4 @shuf_4bits(<4 x i1> %x) {289; CHECK-LABEL: @shuf_4bits(290; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i4291; CHECK-NEXT: [[CAST:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[TMP1]])292; CHECK-NEXT: ret i4 [[CAST]]293;294 %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>295 %cast = bitcast <4 x i1> %bitreverse to i4296 ret i4 %cast297}298 299define i4 @shuf_load_4bits(ptr %p) {300; CHECK-LABEL: @shuf_load_4bits(301; CHECK-NEXT: [[X1:%.*]] = load i4, ptr [[P:%.*]], align 1302; CHECK-NEXT: [[CAST:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[X1]])303; CHECK-NEXT: ret i4 [[CAST]]304;305 %x = load <4 x i1>, ptr %p306 %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>307 %cast = bitcast <4 x i1> %bitreverse to i4308 ret i4 %cast309}310 311define i4 @shuf_bitcast_twice_4bits(i4 %x) {312; CHECK-LABEL: @shuf_bitcast_twice_4bits(313; CHECK-NEXT: [[CAST2:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[X:%.*]])314; CHECK-NEXT: ret i4 [[CAST2]]315;316 %cast1 = bitcast i4 %x to <4 x i1>317 %bitreverse = shufflevector <4 x i1> %cast1, <4 x i1> undef, <4 x i32> <i32 poison, i32 2, i32 1, i32 0>318 %cast2 = bitcast <4 x i1> %bitreverse to i4319 ret i4 %cast2320}321 322; Negative tests - not reverse323define i4 @shuf_4bits_not_reverse(<4 x i1> %x) {324; CHECK-LABEL: @shuf_4bits_not_reverse(325; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X:%.*]], <4 x i1> poison, <4 x i32> <i32 3, i32 1, i32 2, i32 0>326; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4327; CHECK-NEXT: ret i4 [[CAST]]328;329 %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>330 %cast = bitcast <4 x i1> %bitreverse to i4331 ret i4 %cast332}333 334; Negative test - extra use335declare void @use(<4 x i1>)336 337define i4 @shuf_4bits_extra_use(<4 x i1> %x) {338; CHECK-LABEL: @shuf_4bits_extra_use(339; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X:%.*]], <4 x i1> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>340; CHECK-NEXT: call void @use(<4 x i1> [[BITREVERSE]])341; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4342; CHECK-NEXT: ret i4 [[CAST]]343;344 %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>345 call void @use(<4 x i1> %bitreverse)346 %cast = bitcast <4 x i1> %bitreverse to i4347 ret i4 %cast348}349 350define i32 @rev_i1(i1 %x) {351; CHECK-LABEL: @rev_i1(352; CHECK-NEXT: [[Z:%.*]] = zext i1 [[X:%.*]] to i32353; CHECK-NEXT: call void @use_i32(i32 [[Z]])354; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i32 -2147483648, i32 0355; CHECK-NEXT: ret i32 [[R]]356;357 %z = zext i1 %x to i32358 call void @use_i32(i32 %z)359 %r = call i32 @llvm.bitreverse.i32(i32 %z)360 ret i32 %r361}362 363define <2 x i8> @rev_v2i1(<2 x i1> %x) {364; CHECK-LABEL: @rev_v2i1(365; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[X:%.*]], <2 x i8> splat (i8 -128), <2 x i8> zeroinitializer366; CHECK-NEXT: ret <2 x i8> [[R]]367;368 %z = zext <2 x i1> %x to <2 x i8>369 %r = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> %z)370 ret <2 x i8> %r371}372 373define i32 @rev_i2(i2 %x) {374; CHECK-LABEL: @rev_i2(375; CHECK-NEXT: [[Z:%.*]] = zext i2 [[X:%.*]] to i32376; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[Z]])377; CHECK-NEXT: ret i32 [[R]]378;379 %z = zext i2 %x to i32380 %r = call i32 @llvm.bitreverse.i32(i32 %z)381 ret i32 %r382}383 384; This used to infinite loop.385 386define i64 @PR59897(i1 %X1_2) {387; CHECK-LABEL: @PR59897(388; CHECK-NEXT: [[NOT_X1_2:%.*]] = xor i1 [[X1_2:%.*]], true389; CHECK-NEXT: [[X0_3X2X5X0:%.*]] = zext i1 [[NOT_X1_2]] to i64390; CHECK-NEXT: ret i64 [[X0_3X2X5X0]]391;392 %X1_3 = zext i1 %X1_2 to i32393 %X8_3x2x2x0 = call i32 @llvm.bitreverse.i32(i32 %X1_3)394 %X8_4x2x3x0 = xor i32 %X8_3x2x2x0, -1395 %X0_3x2x4x0 = lshr i32 %X8_4x2x3x0, 31396 %X0_3x2x5x0 = zext i32 %X0_3x2x4x0 to i64397 ret i64 %X0_3x2x5x0398}399 400; Issue#62236401; Fold: BITREVERSE( OP( BITREVERSE(x), y ) ) -> OP( x, BITREVERSE(y) )402 403define i16 @rev_xor_lhs_rev16(i16 %a, i16 %b) #0 {404; CHECK-LABEL: @rev_xor_lhs_rev16(405; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[B:%.*]])406; CHECK-NEXT: [[TMP2:%.*]] = xor i16 [[A:%.*]], [[TMP1]]407; CHECK-NEXT: ret i16 [[TMP2]]408;409 %1 = tail call i16 @llvm.bitreverse.i16(i16 %a)410 %2 = xor i16 %1, %b411 %3 = tail call i16 @llvm.bitreverse.i16(i16 %2)412 ret i16 %3413}414 415define i32 @rev_and_rhs_rev32(i32 %a, i32 %b) #0 {416; CHECK-LABEL: @rev_and_rhs_rev32(417; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A:%.*]])418; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[B:%.*]]419; CHECK-NEXT: ret i32 [[TMP2]]420;421 %1 = tail call i32 @llvm.bitreverse.i32(i32 %b)422 %2 = and i32 %a, %1423 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)424 ret i32 %3425}426 427define i32 @rev_or_rhs_rev32(i32 %a, i32 %b) #0 {428; CHECK-LABEL: @rev_or_rhs_rev32(429; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A:%.*]])430; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[B:%.*]]431; CHECK-NEXT: ret i32 [[TMP2]]432;433 %1 = tail call i32 @llvm.bitreverse.i32(i32 %b)434 %2 = or i32 %a, %1435 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)436 ret i32 %3437}438 439define i64 @rev_or_rhs_rev64(i64 %a, i64 %b) #0 {440; CHECK-LABEL: @rev_or_rhs_rev64(441; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[A:%.*]])442; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], [[B:%.*]]443; CHECK-NEXT: ret i64 [[TMP2]]444;445 %1 = tail call i64 @llvm.bitreverse.i64(i64 %b)446 %2 = or i64 %a, %1447 %3 = tail call i64 @llvm.bitreverse.i64(i64 %2)448 ret i64 %3449}450 451define i64 @rev_xor_rhs_rev64(i64 %a, i64 %b) #0 {452; CHECK-LABEL: @rev_xor_rhs_rev64(453; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[A:%.*]])454; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], [[B:%.*]]455; CHECK-NEXT: ret i64 [[TMP2]]456;457 %1 = tail call i64 @llvm.bitreverse.i64(i64 %b)458 %2 = xor i64 %a, %1459 %3 = tail call i64 @llvm.bitreverse.i64(i64 %2)460 ret i64 %3461}462 463define <2 x i32> @rev_xor_rhs_i32vec(<2 x i32> %a, <2 x i32> %b) #0 {464; CHECK-LABEL: @rev_xor_rhs_i32vec(465; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A:%.*]])466; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], [[B:%.*]]467; CHECK-NEXT: ret <2 x i32> [[TMP2]]468;469 %1 = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %b)470 %2 = xor <2 x i32> %a, %1471 %3 = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %2)472 ret <2 x i32> %3473}474 475define i64 @rev_and_rhs_rev64_multiuse1(i64 %a, i64 %b) #0 {476; CHECK-LABEL: @rev_and_rhs_rev64_multiuse1(477; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])478; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[A:%.*]], [[TMP1]]479; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])480; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]481; CHECK-NEXT: ret i64 [[TMP4]]482;483 %1 = tail call i64 @llvm.bitreverse.i64(i64 %b)484 %2 = and i64 %a, %1485 %3 = tail call i64 @llvm.bitreverse.i64(i64 %2)486 %4 = mul i64 %2, %3 ;increase use of logical op487 ret i64 %4488}489 490define i64 @rev_and_rhs_rev64_multiuse2(i64 %a, i64 %b) #0 {491; CHECK-LABEL: @rev_and_rhs_rev64_multiuse2(492; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])493; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[A:%.*]], [[TMP1]]494; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])495; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP1]], [[TMP3]]496; CHECK-NEXT: ret i64 [[TMP4]]497;498 %1 = tail call i64 @llvm.bitreverse.i64(i64 %b)499 %2 = and i64 %a, %1500 %3 = tail call i64 @llvm.bitreverse.i64(i64 %2)501 %4 = mul i64 %1, %3 ;increase use of inner bitreverse502 ret i64 %4503}504 505define i64 @rev_all_operand64(i64 %a, i64 %b) #0 {506; CHECK-LABEL: @rev_all_operand64(507; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[A:%.*]], [[B:%.*]]508; CHECK-NEXT: ret i64 [[TMP1]]509;510 %1 = tail call i64 @llvm.bitreverse.i64(i64 %a)511 %2 = tail call i64 @llvm.bitreverse.i64(i64 %b)512 %3 = and i64 %1, %2513 %4 = tail call i64 @llvm.bitreverse.i64(i64 %3)514 ret i64 %4515}516 517define i64 @rev_all_operand64_multiuse_both(i64 %a, i64 %b) #0 {518; CHECK-LABEL: @rev_all_operand64_multiuse_both(519; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[A:%.*]])520; CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])521; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[A]], [[B]]522; CHECK-NEXT: call void @use_i64(i64 [[TMP1]])523; CHECK-NEXT: call void @use_i64(i64 [[TMP2]])524; CHECK-NEXT: ret i64 [[TMP3]]525;526 %1 = tail call i64 @llvm.bitreverse.i64(i64 %a)527 %2 = tail call i64 @llvm.bitreverse.i64(i64 %b)528 %3 = and i64 %1, %2529 %4 = tail call i64 @llvm.bitreverse.i64(i64 %3)530 531 call void @use_i64(i64 %1)532 call void @use_i64(i64 %2)533 ret i64 %4534}535 536declare i32 @llvm.bswap.i32(i32 %or11.i)537