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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; Given a pattern like:5; %old_cmp1 = icmp slt i32 %x, C26; %old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high7; %old_x_offseted = add i32 %x, C18; %old_cmp0 = icmp ult i32 %old_x_offseted, C09; %r = select i1 %old_cmp0, i32 %x, i32 %old_replacement10; it can be rewriten as more canonical pattern:11; %new_cmp1 = icmp slt i32 %x, -C112; %new_cmp2 = icmp sge i32 %x, C0-C113; %new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x14; %r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low15; Iff -C1 s<= C2 s<= C0-C116; Also, ULT predicate can also be UGE; or UGT iff C0 != -1 (+invert result)17; Also, SLT predicate can also be SGE; or SGT iff C2 != INT_MAX (+invert res.)18 19;-------------------------------------------------------------------------------20 21; Basic pattern. There is no 'and', so lower threshold is 0 (inclusive).22; The upper threshold is 127 (inclusive).23; There are 2 icmp's so for scalars there are 4 possible combinations.24; The constant in %t0 has to be between the thresholds, i.e 128 <= Ct0 <= 0.25 26define i32 @t0_ult_slt_128(i32 %x, i32 %replacement_low, i32 %replacement_high) {27; CHECK-LABEL: @t0_ult_slt_128(28; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1629; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 12730; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]31; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]32; CHECK-NEXT: ret i32 [[R]]33;34 %t0 = icmp slt i32 %x, 12835 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high36 %t2 = add i32 %x, 1637 %t3 = icmp ult i32 %t2, 14438 %r = select i1 %t3, i32 %x, i32 %t139 ret i32 %r40}41define i32 @t1_ult_slt_0(i32 %x, i32 %replacement_low, i32 %replacement_high) {42; CHECK-LABEL: @t1_ult_slt_0(43; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1644; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 12745; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]46; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]47; CHECK-NEXT: ret i32 [[R]]48;49 %t0 = icmp slt i32 %x, -1650 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high51 %t2 = add i32 %x, 1652 %t3 = icmp ult i32 %t2, 14453 %r = select i1 %t3, i32 %x, i32 %t154 ret i32 %r55}56 57define i32 @t2_ult_sgt_128(i32 %x, i32 %replacement_low, i32 %replacement_high) {58; CHECK-LABEL: @t2_ult_sgt_128(59; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1660; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 12761; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]62; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]63; CHECK-NEXT: ret i32 [[R]]64;65 %t0 = icmp sgt i32 %x, 12766 %t1 = select i1 %t0, i32 %replacement_high, i32 %replacement_low67 %t2 = add i32 %x, 1668 %t3 = icmp ult i32 %t2, 14469 %r = select i1 %t3, i32 %x, i32 %t170 ret i32 %r71}72define i32 @t3_ult_sgt_neg1(i32 %x, i32 %replacement_low, i32 %replacement_high) {73; CHECK-LABEL: @t3_ult_sgt_neg1(74; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1675; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 12776; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]77; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]78; CHECK-NEXT: ret i32 [[R]]79;80 %t0 = icmp sgt i32 %x, -1781 %t1 = select i1 %t0, i32 %replacement_high, i32 %replacement_low82 %t2 = add i32 %x, 1683 %t3 = icmp ult i32 %t2, 14484 %r = select i1 %t3, i32 %x, i32 %t185 ret i32 %r86}87 88define i32 @t4_ugt_slt_128(i32 %x, i32 %replacement_low, i32 %replacement_high) {89; CHECK-LABEL: @t4_ugt_slt_128(90; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1691; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 12792; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]93; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]94; CHECK-NEXT: ret i32 [[R]]95;96 %t0 = icmp slt i32 %x, 12897 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high98 %t2 = add i32 %x, 1699 %t3 = icmp ugt i32 %t2, 143100 %r = select i1 %t3, i32 %t1, i32 %x101 ret i32 %r102}103define i32 @t5_ugt_slt_0(i32 %x, i32 %replacement_low, i32 %replacement_high) {104; CHECK-LABEL: @t5_ugt_slt_0(105; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -16106; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 127107; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]108; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]109; CHECK-NEXT: ret i32 [[R]]110;111 %t0 = icmp slt i32 %x, -16112 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high113 %t2 = add i32 %x, 16114 %t3 = icmp ugt i32 %t2, 143115 %r = select i1 %t3, i32 %t1, i32 %x116 ret i32 %r117}118 119define i32 @t6_ugt_sgt_128(i32 %x, i32 %replacement_low, i32 %replacement_high) {120; CHECK-LABEL: @t6_ugt_sgt_128(121; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -16122; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 127123; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]124; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]125; CHECK-NEXT: ret i32 [[R]]126;127 %t0 = icmp sgt i32 %x, 127128 %t1 = select i1 %t0, i32 %replacement_high, i32 %replacement_low129 %t2 = add i32 %x, 16130 %t3 = icmp ugt i32 %t2, 143131 %r = select i1 %t3, i32 %t1, i32 %x132 ret i32 %r133}134 135define i32 @t7_ugt_sgt_neg1(i32 %x, i32 %replacement_low, i32 %replacement_high) {136; CHECK-LABEL: @t7_ugt_sgt_neg1(137; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -16138; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 127139; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]140; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]141; CHECK-NEXT: ret i32 [[R]]142;143 %t0 = icmp sgt i32 %x, -17144 %t1 = select i1 %t0, i32 %replacement_high, i32 %replacement_low145 %t2 = add i32 %x, 16146 %t3 = icmp ugt i32 %t2, 143147 %r = select i1 %t3, i32 %t1, i32 %x148 ret i32 %r149}150 151;-------------------------------------------------------------------------------152 153; So Ct0 can not be s> 128, or s< -16154 155define i32 @n8_ult_slt_129(i32 %x, i32 %replacement_low, i32 %replacement_high) {156; CHECK-LABEL: @n8_ult_slt_129(157; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 129158; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]159; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16160; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144161; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]162; CHECK-NEXT: ret i32 [[R]]163;164 %t0 = icmp slt i32 %x, 129165 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high166 %t2 = add i32 %x, 16167 %t3 = icmp ult i32 %t2, 144168 %r = select i1 %t3, i32 %x, i32 %t1169 ret i32 %r170}171 172define i32 @n9_ult_slt_neg17(i32 %x, i32 %replacement_low, i32 %replacement_high) {173; CHECK-LABEL: @n9_ult_slt_neg17(174; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], -17175; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]176; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16177; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144178; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]179; CHECK-NEXT: ret i32 [[R]]180;181 %t0 = icmp slt i32 %x, -17182 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high183 %t2 = add i32 %x, 16184 %t3 = icmp ult i32 %t2, 144185 %r = select i1 %t3, i32 %x, i32 %t1186 ret i32 %r187}188 189; Regression test for PR53252.190define i32 @n10_ugt_slt(i32 %x, i32 %replacement_low, i32 %replacement_high) {191; CHECK-LABEL: @n10_ugt_slt(192; CHECK-NEXT: [[T2:%.*]] = icmp ugt i32 [[X:%.*]], 128193; CHECK-NEXT: [[R:%.*]] = select i1 [[T2]], i32 [[X]], i32 [[REPLACEMENT_HIGH:%.*]]194; CHECK-NEXT: ret i32 [[R]]195;196 %t0 = icmp slt i32 %x, 0197 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high198 %t2 = icmp ugt i32 %x, 128199 %r = select i1 %t2, i32 %x, i32 %t1200 ret i32 %r201}202 203define i32 @n11_uge_slt(i32 %x, i32 %replacement_low, i32 %replacement_high) {204; CHECK-LABEL: @n11_uge_slt(205; CHECK-NEXT: [[T2:%.*]] = icmp ult i32 [[X:%.*]], 129206; CHECK-NEXT: [[R:%.*]] = select i1 [[T2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[X]]207; CHECK-NEXT: ret i32 [[R]]208;209 %t0 = icmp slt i32 %x, 0210 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high211 %t2 = icmp ult i32 %x, 129212 %r = select i1 %t2, i32 %t1, i32 %x213 ret i32 %r214}215 216define i32 @n12_ule_slt(i32 %x, i32 %replacement_low, i32 %replacement_high) {217; CHECK-LABEL: @n12_ule_slt(218; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], -1219; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]220; CHECK-NEXT: [[T2:%.*]] = icmp ugt i32 [[X]], 127221; CHECK-NEXT: [[R:%.*]] = select i1 [[T2]], i32 [[T1]], i32 [[X]]222; CHECK-NEXT: ret i32 [[R]]223;224 %t0 = icmp slt i32 %x, -1225 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high226 %t2 = icmp ugt i32 %x, 127227 %r = select i1 %t2, i32 %t1, i32 %x228 ret i32 %r229}230 231;-------------------------------------------------------------------------------232 233declare void @use32(i32)234declare void @use1(i1)235 236; One-use restrictions: here the entire pattern needs to be one-use.237; FIXME: if %t0 could be reused then it's less restrictive.238 239; This one is ok.240define i32 @t10_oneuse0(i32 %x, i32 %replacement_low, i32 %replacement_high) {241; CHECK-LABEL: @t10_oneuse0(242; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64243; CHECK-NEXT: call void @use1(i1 [[T0]])244; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], -16245; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 127246; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]247; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]248; CHECK-NEXT: ret i32 [[R]]249;250 %t0 = icmp slt i32 %x, 64251 call void @use1(i1 %t0)252 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high253 %t2 = add i32 %x, 16254 %t3 = icmp ult i32 %t2, 144255 %r = select i1 %t3, i32 %x, i32 %t1256 ret i32 %r257}258define i32 @n11_oneuse1(i32 %x, i32 %replacement_low, i32 %replacement_high) {259; CHECK-LABEL: @n11_oneuse1(260; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64261; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]262; CHECK-NEXT: call void @use32(i32 [[T1]])263; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16264; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144265; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]266; CHECK-NEXT: ret i32 [[R]]267;268 %t0 = icmp slt i32 %x, 64269 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high270 call void @use32(i32 %t1)271 %t2 = add i32 %x, 16272 %t3 = icmp ult i32 %t2, 144273 %r = select i1 %t3, i32 %x, i32 %t1274 ret i32 %r275}276 277; This one is ok.278define i32 @t12_oneuse2(i32 %x, i32 %replacement_low, i32 %replacement_high) {279; CHECK-LABEL: @t12_oneuse2(280; CHECK-NEXT: [[T2:%.*]] = add i32 [[X:%.*]], 16281; CHECK-NEXT: call void @use32(i32 [[T2]])282; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X]], -16283; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[X]], 127284; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[X]]285; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[REPLACEMENT_HIGH:%.*]], i32 [[TMP3]]286; CHECK-NEXT: ret i32 [[R]]287;288 %t0 = icmp slt i32 %x, 64289 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high290 %t2 = add i32 %x, 16291 call void @use32(i32 %t2)292 %t3 = icmp ult i32 %t2, 144293 %r = select i1 %t3, i32 %x, i32 %t1294 ret i32 %r295}296 297define i32 @n13_oneuse3(i32 %x, i32 %replacement_low, i32 %replacement_high) {298; CHECK-LABEL: @n13_oneuse3(299; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64300; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]301; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16302; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144303; CHECK-NEXT: call void @use1(i1 [[T3]])304; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]305; CHECK-NEXT: ret i32 [[R]]306;307 %t0 = icmp slt i32 %x, 64308 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high309 %t2 = add i32 %x, 16310 %t3 = icmp ult i32 %t2, 144311 call void @use1(i1 %t3)312 %r = select i1 %t3, i32 %x, i32 %t1313 ret i32 %r314}315 316define i32 @n14_oneuse4(i32 %x, i32 %replacement_low, i32 %replacement_high) {317; CHECK-LABEL: @n14_oneuse4(318; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64319; CHECK-NEXT: call void @use1(i1 [[T0]])320; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]321; CHECK-NEXT: call void @use32(i32 [[T1]])322; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16323; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144324; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]325; CHECK-NEXT: ret i32 [[R]]326;327 %t0 = icmp slt i32 %x, 64328 call void @use1(i1 %t0)329 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high330 call void @use32(i32 %t1)331 %t2 = add i32 %x, 16332 %t3 = icmp ult i32 %t2, 144333 %r = select i1 %t3, i32 %x, i32 %t1334 ret i32 %r335}336define i32 @n15_oneuse5(i32 %x, i32 %replacement_low, i32 %replacement_high) {337; CHECK-LABEL: @n15_oneuse5(338; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64339; CHECK-NEXT: call void @use1(i1 [[T0]])340; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]341; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16342; CHECK-NEXT: call void @use32(i32 [[T2]])343; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144344; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]345; CHECK-NEXT: ret i32 [[R]]346;347 %t0 = icmp slt i32 %x, 64348 call void @use1(i1 %t0)349 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high350 %t2 = add i32 %x, 16351 call void @use32(i32 %t2)352 %t3 = icmp ult i32 %t2, 144353 %r = select i1 %t3, i32 %x, i32 %t1354 ret i32 %r355}356define i32 @n16_oneuse6(i32 %x, i32 %replacement_low, i32 %replacement_high) {357; CHECK-LABEL: @n16_oneuse6(358; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64359; CHECK-NEXT: call void @use1(i1 [[T0]])360; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]361; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16362; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144363; CHECK-NEXT: call void @use1(i1 [[T3]])364; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]365; CHECK-NEXT: ret i32 [[R]]366;367 %t0 = icmp slt i32 %x, 64368 call void @use1(i1 %t0)369 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high370 %t2 = add i32 %x, 16371 %t3 = icmp ult i32 %t2, 144372 call void @use1(i1 %t3)373 %r = select i1 %t3, i32 %x, i32 %t1374 ret i32 %r375}376 377define i32 @n17_oneuse7(i32 %x, i32 %replacement_low, i32 %replacement_high) {378; CHECK-LABEL: @n17_oneuse7(379; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64380; CHECK-NEXT: call void @use1(i1 [[T0]])381; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]382; CHECK-NEXT: call void @use32(i32 [[T1]])383; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16384; CHECK-NEXT: call void @use32(i32 [[T2]])385; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144386; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]387; CHECK-NEXT: ret i32 [[R]]388;389 %t0 = icmp slt i32 %x, 64390 call void @use1(i1 %t0)391 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high392 call void @use32(i32 %t1)393 %t2 = add i32 %x, 16394 call void @use32(i32 %t2)395 %t3 = icmp ult i32 %t2, 144396 %r = select i1 %t3, i32 %x, i32 %t1397 ret i32 %r398}399define i32 @n18_oneuse8(i32 %x, i32 %replacement_low, i32 %replacement_high) {400; CHECK-LABEL: @n18_oneuse8(401; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64402; CHECK-NEXT: call void @use1(i1 [[T0]])403; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]404; CHECK-NEXT: call void @use32(i32 [[T1]])405; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16406; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144407; CHECK-NEXT: call void @use1(i1 [[T3]])408; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]409; CHECK-NEXT: ret i32 [[R]]410;411 %t0 = icmp slt i32 %x, 64412 call void @use1(i1 %t0)413 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high414 call void @use32(i32 %t1)415 %t2 = add i32 %x, 16416 %t3 = icmp ult i32 %t2, 144417 call void @use1(i1 %t3)418 %r = select i1 %t3, i32 %x, i32 %t1419 ret i32 %r420}421 422define i32 @n19_oneuse9(i32 %x, i32 %replacement_low, i32 %replacement_high) {423; CHECK-LABEL: @n19_oneuse9(424; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 [[X:%.*]], 64425; CHECK-NEXT: call void @use1(i1 [[T0]])426; CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i32 [[REPLACEMENT_LOW:%.*]], i32 [[REPLACEMENT_HIGH:%.*]]427; CHECK-NEXT: call void @use32(i32 [[T1]])428; CHECK-NEXT: [[T2:%.*]] = add i32 [[X]], 16429; CHECK-NEXT: call void @use32(i32 [[T2]])430; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 144431; CHECK-NEXT: call void @use1(i1 [[T3]])432; CHECK-NEXT: [[R:%.*]] = select i1 [[T3]], i32 [[X]], i32 [[T1]]433; CHECK-NEXT: ret i32 [[R]]434;435 %t0 = icmp slt i32 %x, 64436 call void @use1(i1 %t0)437 %t1 = select i1 %t0, i32 %replacement_low, i32 %replacement_high438 call void @use32(i32 %t1)439 %t2 = add i32 %x, 16440 call void @use32(i32 %t2)441 %t3 = icmp ult i32 %t2, 144442 call void @use1(i1 %t3)443 %r = select i1 %t3, i32 %x, i32 %t1444 ret i32 %r445}446 447;-------------------------------------------------------------------------------448 449; Vectors450 451define <2 x i32> @t20_ult_slt_vec_splat(<2 x i32> %x, <2 x i32> %replacement_low, <2 x i32> %replacement_high) {452; CHECK-LABEL: @t20_ult_slt_vec_splat(453; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], splat (i32 -16)454; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[X]], splat (i32 127)455; CHECK-NEXT: [[TMP3:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[REPLACEMENT_LOW:%.*]], <2 x i32> [[X]]456; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[REPLACEMENT_HIGH:%.*]], <2 x i32> [[TMP3]]457; CHECK-NEXT: ret <2 x i32> [[R]]458;459 %t0 = icmp slt <2 x i32> %x, <i32 128, i32 128>460 %t1 = select <2 x i1> %t0, <2 x i32> %replacement_low, <2 x i32> %replacement_high461 %t2 = add <2 x i32> %x, <i32 16, i32 16>462 %t3 = icmp ult <2 x i32> %t2, <i32 144, i32 144>463 %r = select <2 x i1> %t3, <2 x i32> %x, <2 x i32> %t1464 ret <2 x i32> %r465}466define <2 x i32> @t21_ult_slt_vec_nonsplat(<2 x i32> %x, <2 x i32> %replacement_low, <2 x i32> %replacement_high) {467; CHECK-LABEL: @t21_ult_slt_vec_nonsplat(468; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 -16, i32 -8>469; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[X]], <i32 127, i32 255>470; CHECK-NEXT: [[TMP3:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[REPLACEMENT_LOW:%.*]], <2 x i32> [[X]]471; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[REPLACEMENT_HIGH:%.*]], <2 x i32> [[TMP3]]472; CHECK-NEXT: ret <2 x i32> [[R]]473;474 %t0 = icmp slt <2 x i32> %x, <i32 128, i32 64>475 %t1 = select <2 x i1> %t0, <2 x i32> %replacement_low, <2 x i32> %replacement_high476 %t2 = add <2 x i32> %x, <i32 16, i32 8>477 %t3 = icmp ult <2 x i32> %t2, <i32 144, i32 264>478 %r = select <2 x i1> %t3, <2 x i32> %x, <2 x i32> %t1479 ret <2 x i32> %r480}481 482; Non-canonical predicates483 484declare void @use2xi1(<2 x i1>)485 486declare void @use(<2 x i1>)487define <2 x i32> @t22_uge_slt(<2 x i32> %x, <2 x i32> %replacement_low, <2 x i32> %replacement_high) {488; CHECK-LABEL: @t22_uge_slt(489; CHECK-NEXT: [[T0:%.*]] = icmp slt <2 x i32> [[X:%.*]], splat (i32 128)490; CHECK-NEXT: [[T1:%.*]] = select <2 x i1> [[T0]], <2 x i32> [[REPLACEMENT_LOW:%.*]], <2 x i32> [[REPLACEMENT_HIGH:%.*]]491; CHECK-NEXT: [[T2:%.*]] = add <2 x i32> [[X]], splat (i32 16)492; CHECK-NEXT: [[T3:%.*]] = icmp uge <2 x i32> [[T2]], <i32 144, i32 0>493; CHECK-NEXT: call void @use2xi1(<2 x i1> [[T3]])494; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[T3]], <2 x i32> [[T1]], <2 x i32> [[X]]495; CHECK-NEXT: ret <2 x i32> [[R]]496;497 %t0 = icmp slt <2 x i32> %x, <i32 128, i32 128>498 %t1 = select <2 x i1> %t0, <2 x i32> %replacement_low, <2 x i32> %replacement_high499 %t2 = add <2 x i32> %x, <i32 16, i32 16>500 %t3 = icmp uge <2 x i32> %t2, <i32 144, i32 0>501 call void @use2xi1(<2 x i1> %t3)502 %r = select <2 x i1> %t3, <2 x i32> %t1, <2 x i32> %x503 ret <2 x i32> %r504}505 506define <2 x i32> @t23_ult_sge(<2 x i32> %x, <2 x i32> %replacement_low, <2 x i32> %replacement_high) {507; CHECK-LABEL: @t23_ult_sge(508; CHECK-NEXT: [[T0:%.*]] = icmp sge <2 x i32> [[X:%.*]], <i32 128, i32 -2147483648>509; CHECK-NEXT: call void @use2xi1(<2 x i1> [[T0]])510; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X]], <i32 -16, i32 -2147483648>511; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[X]], <i32 127, i32 2147483646>512; CHECK-NEXT: [[TMP3:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[REPLACEMENT_LOW:%.*]], <2 x i32> [[X]]513; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[REPLACEMENT_HIGH:%.*]], <2 x i32> [[TMP3]]514; CHECK-NEXT: ret <2 x i32> [[R]]515;516 %t0 = icmp sge <2 x i32> %x, <i32 128, i32 -2147483648>517 call void @use2xi1(<2 x i1> %t0)518 %t1 = select <2 x i1> %t0, <2 x i32> %replacement_high, <2 x i32> %replacement_low519 %t2 = add <2 x i32> %x, <i32 16, i32 -2147483648>520 %t3 = icmp ult <2 x i32> %t2, <i32 144, i32 -1>521 %r = select <2 x i1> %t3, <2 x i32> %x, <2 x i32> %t1522 ret <2 x i32> %r523}524