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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare void @use8(i8)5declare void @use1(i1)6 7; Basic case - all good.8define i8 @p0(i8 %x, i8 %v0, i8 %v1) {9; CHECK-LABEL: @p0(10; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 111; CHECK-NEXT: [[T1_NOT:%.*]] = icmp eq i8 [[T0]], 012; CHECK-NEXT: [[R:%.*]] = select i1 [[T1_NOT]], i8 [[V1:%.*]], i8 [[V0:%.*]], !prof [[PROF0:![0-9]+]]13; CHECK-NEXT: ret i8 [[R]]14;15 %t0 = and i8 %x, 116 %t1 = icmp eq i8 %t0, 117 %r = select i1 %t1, i8 %v0, i8 %v1, !prof !018 ret i8 %r19}20define i8 @p1(i8 %x, i8 %v0, i8 %v1) {21; CHECK-LABEL: @p1(22; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 123; CHECK-NEXT: [[T1_NOT:%.*]] = icmp eq i8 [[T0]], 024; CHECK-NEXT: [[R:%.*]] = select i1 [[T1_NOT]], i8 [[V1:%.*]], i8 [[V0:%.*]]25; CHECK-NEXT: ret i8 [[R]]26;27 %t0 = and i8 %x, 128 %t1 = icmp ne i8 %t0, 029 %r = select i1 %t1, i8 %v0, i8 %v130 ret i8 %r31}32 33; Can't invert all users of original condition34define i8 @n2(i8 %x, i8 %v0, i8 %v1) {35; CHECK-LABEL: @n2(36; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 137; CHECK-NEXT: [[T1:%.*]] = icmp ne i8 [[T0]], 038; CHECK-NEXT: call void @use1(i1 [[T1]])39; CHECK-NEXT: [[R:%.*]] = select i1 [[T1]], i8 [[V0:%.*]], i8 [[V1:%.*]]40; CHECK-NEXT: ret i8 [[R]]41;42 %t0 = and i8 %x, 143 %t1 = icmp eq i8 %t0, 144 call void @use1(i1 %t1) ; condition has un-invertable use45 %r = select i1 %t1, i8 %v0, i8 %v146 ret i8 %r47}48 49; Extra use can be adjusted. While there, test multi-bb case.50define i8 @t3(i8 %x, i8 %v0, i8 %v1, i8 %v2, i8 %v3, ptr %out, i1 %c) {51; CHECK-LABEL: @t3(52; CHECK-NEXT: bb0:53; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 154; CHECK-NEXT: [[T1_NOT:%.*]] = icmp eq i8 [[T0]], 055; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]56; CHECK: bb1:57; CHECK-NEXT: [[R0:%.*]] = select i1 [[T1_NOT]], i8 [[V1:%.*]], i8 [[V0:%.*]]58; CHECK-NEXT: store i8 [[R0]], ptr [[OUT:%.*]], align 159; CHECK-NEXT: br label [[BB2]]60; CHECK: bb2:61; CHECK-NEXT: [[R1:%.*]] = select i1 [[T1_NOT]], i8 [[V3:%.*]], i8 [[V2:%.*]]62; CHECK-NEXT: ret i8 [[R1]]63;64bb0:65 %t0 = and i8 %x, 166 %t1 = icmp eq i8 %t0, 167 br i1 %c, label %bb1, label %bb268bb1:69 %r0 = select i1 %t1, i8 %v0, i8 %v170 store i8 %r0, ptr %out71 br label %bb272bb2:73 %r1 = select i1 %t1, i8 %v2, i8 %v374 ret i8 %r175}76define i8 @t4(i8 %x, i8 %v0, i8 %v1, i8 %v2, i8 %v3, ptr %out) {77; CHECK-LABEL: @t4(78; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 179; CHECK-NEXT: [[T1_NOT:%.*]] = icmp eq i8 [[T0]], 080; CHECK-NEXT: [[R0:%.*]] = select i1 [[T1_NOT]], i8 [[V1:%.*]], i8 [[V0:%.*]]81; CHECK-NEXT: store i8 [[R0]], ptr [[OUT:%.*]], align 182; CHECK-NEXT: [[R1:%.*]] = select i1 [[T1_NOT]], i8 [[V3:%.*]], i8 [[V2:%.*]]83; CHECK-NEXT: ret i8 [[R1]]84;85 %t0 = and i8 %x, 186 %t1 = icmp ne i8 %t0, 087 %r0 = select i1 %t1, i8 %v0, i8 %v188 store i8 %r0, ptr %out89 %r1 = select i1 %t1, i8 %v2, i8 %v390 ret i8 %r191}92 93; Weird comparisons94define i8 @n5(i8 %x, i8 %v0, i8 %v1) {95; CHECK-LABEL: @n5(96; CHECK-NEXT: ret i8 [[V1:%.*]]97;98 %t0 = and i8 %x, 199 %t1 = icmp eq i8 %t0, 2 ; checking some other bit100 %r = select i1 %t1, i8 %v0, i8 %v1101 ret i8 %r102}103define i8 @n6(i8 %x, i8 %v0, i8 %v1) {104; CHECK-LABEL: @n6(105; CHECK-NEXT: ret i8 [[V1:%.*]]106;107 %t0 = and i8 %x, 1108 %t1 = icmp eq i8 %t0, 3 ; checking some other bit109 %r = select i1 %t1, i8 %v0, i8 %v1110 ret i8 %r111}112define i8 @n7(i8 %x, i8 %v0, i8 %v1) {113; CHECK-LABEL: @n7(114; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 1115; CHECK-NEXT: [[T1_NOT_NOT:%.*]] = icmp eq i8 [[T0]], 0116; CHECK-NEXT: [[R:%.*]] = select i1 [[T1_NOT_NOT]], i8 [[V0:%.*]], i8 [[V1:%.*]]117; CHECK-NEXT: ret i8 [[R]]118;119 %t0 = and i8 %x, 1120 %t1 = icmp ne i8 %t0, 1 ; not checking that it's zero121 %r = select i1 %t1, i8 %v0, i8 %v1122 ret i8 %r123}124 125; Potentially have more than a single bit set126define i8 @n8(i8 %x, i8 %v0, i8 %v1) {127; CHECK-LABEL: @n8(128; CHECK-NEXT: [[T0:%.*]] = and i8 [[X:%.*]], 3129; CHECK-NEXT: [[T1:%.*]] = icmp eq i8 [[T0]], 1130; CHECK-NEXT: [[R:%.*]] = select i1 [[T1]], i8 [[V0:%.*]], i8 [[V1:%.*]]131; CHECK-NEXT: ret i8 [[R]]132;133 %t0 = and i8 %x, 3 ; Not a single bit134 %t1 = icmp eq i8 %t0, 1135 %r = select i1 %t1, i8 %v0, i8 %v1136 ret i8 %r137}138 139!0 = !{!"branch_weights", i32 0, i32 100}140 141; Ensure that the branch metadata is reversed to match the reversals above.142; CHECK: !0 = {{.*}} i32 100, i32 0}143