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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=instcombine %s | FileCheck %s3; RUN: opt -S -passes=instcombine %s \4; RUN: -use-constant-int-for-fixed-length-splat \5; RUN -use-constant-fp-for-fixed-length-splat \6; RUN: -use-constant-int-for-scalable-splat \7; RUN: -use-constant-fp-for-scalable-splat | FileCheck %s8 9define <vscale x 4 x i32> @insert_div() {10; CHECK-LABEL: @insert_div(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[DIV:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 3), i64 0)13; CHECK-NEXT: ret <vscale x 4 x i32> [[DIV]]14;15entry:16 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 9), i64 0)17 %div = udiv <vscale x 4 x i32> %0, splat (i32 3)18 ret <vscale x 4 x i32> %div19}20 21define <vscale x 4 x i32> @insert_div_splat_lhs() {22; CHECK-LABEL: @insert_div_splat_lhs(23; CHECK-NEXT: entry:24; CHECK-NEXT: [[DIV:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 5), <4 x i32> splat (i32 2), i64 0)25; CHECK-NEXT: ret <vscale x 4 x i32> [[DIV]]26;27entry:28 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat(i32 2), <4 x i32> splat (i32 5), i64 0)29 %div = udiv <vscale x 4 x i32> splat (i32 10), %030 ret <vscale x 4 x i32> %div31}32 33define <vscale x 4 x i32> @insert_div_mixed_splat() {34; CHECK-LABEL: @insert_div_mixed_splat(35; CHECK-NEXT: entry:36; CHECK-NEXT: [[DIV:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 6), <4 x i32> splat (i32 3), i64 0)37; CHECK-NEXT: ret <vscale x 4 x i32> [[DIV]]38;39entry:40 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 18), <4 x i32> splat (i32 9), i64 0)41 %div = udiv <vscale x 4 x i32> %0, splat (i32 3)42 ret <vscale x 4 x i32> %div43}44 45define <vscale x 4 x i32> @insert_mul() {46; CHECK-LABEL: @insert_mul(47; CHECK-NEXT: entry:48; CHECK-NEXT: [[MUL:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 7), i64 4)49; CHECK-NEXT: ret <vscale x 4 x i32> [[MUL]]50;51entry:52 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 1), i64 4)53 %mul = mul <vscale x 4 x i32> %0, splat (i32 7)54 ret <vscale x 4 x i32> %mul55}56 57define <vscale x 4 x i32> @insert_add() {58; CHECK-LABEL: @insert_add(59; CHECK-NEXT: entry:60; CHECK-NEXT: [[ADD:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 16), i64 0)61; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]62;63entry:64 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 5), i64 0)65 %add = add <vscale x 4 x i32> %0, splat (i32 11)66 ret <vscale x 4 x i32> %add67}68 69define <vscale x 4 x i32> @insert_add_non_splat_subvector() {70; CHECK-LABEL: @insert_add_non_splat_subvector(71; CHECK-NEXT: entry:72; CHECK-NEXT: [[ADD:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> <i32 101, i32 102, i32 103, i32 104>, i64 0)73; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]74;75entry:76 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 4>, i64 0)77 %add = add <vscale x 4 x i32> %0, splat (i32 100)78 ret <vscale x 4 x i32> %add79}80 81define <vscale x 4 x float> @insert_add_fp() {82; CHECK-LABEL: @insert_add_fp(83; CHECK-NEXT: entry:84; CHECK-NEXT: [[ADD:%.*]] = call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> splat (float 6.250000e+00), <4 x float> splat (float 5.500000e+00), i64 0)85; CHECK-NEXT: ret <vscale x 4 x float> [[ADD]]86;87entry:88 %0 = call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> splat(float 1.25), <4 x float> splat (float 0.5), i64 0)89 %add = fadd <vscale x 4 x float> %0, splat (float 5.0)90 ret <vscale x 4 x float> %add91}92 93define <vscale x 8 x i32> @insert_add_scalable_subvector() {94; CHECK-LABEL: @insert_add_scalable_subvector(95; CHECK-NEXT: entry:96; CHECK-NEXT: [[ADD:%.*]] = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> splat (i32 20), <vscale x 4 x i32> splat (i32 -4), i64 0)97; CHECK-NEXT: ret <vscale x 8 x i32> [[ADD]]98;99entry:100 %0 = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> splat(i32 16), <vscale x 4 x i32> splat (i32 -8), i64 0)101 %add = add <vscale x 8 x i32> %0, splat (i32 4)102 ret <vscale x 8 x i32> %add103}104 105define <vscale x 4 x i32> @insert_sub() {106; CHECK-LABEL: @insert_sub(107; CHECK-NEXT: entry:108; CHECK-NEXT: [[SUB:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> zeroinitializer, i64 8)109; CHECK-NEXT: ret <vscale x 4 x i32> [[SUB]]110;111entry:112 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> poison, <4 x i32> splat (i32 11), i64 8)113 %sub = add <vscale x 4 x i32> %0, splat (i32 -11)114 ret <vscale x 4 x i32> %sub115}116 117define <vscale x 4 x i32> @insert_and_partially_undef() {118; CHECK-LABEL: @insert_and_partially_undef(119; CHECK-NEXT: entry:120; CHECK-NEXT: [[AND:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> zeroinitializer, <4 x i32> splat (i32 4), i64 0)121; CHECK-NEXT: ret <vscale x 4 x i32> [[AND]]122;123entry:124 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> undef, <4 x i32> splat (i32 6), i64 0)125 %and = and <vscale x 4 x i32> %0, splat (i32 4)126 ret <vscale x 4 x i32> %and127}128 129define <vscale x 4 x i32> @insert_fold_chain() {130; CHECK-LABEL: @insert_fold_chain(131; CHECK-NEXT: entry:132; CHECK-NEXT: [[ADD:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 11), <4 x i32> splat (i32 8), i64 0)133; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]134;135entry:136 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 21), <4 x i32> splat (i32 12), i64 0)137 %div = udiv <vscale x 4 x i32> %0, splat (i32 3)138 %add = add <vscale x 4 x i32> %div, splat (i32 4)139 ret <vscale x 4 x i32> %add140}141 142; TODO: This could be folded more.143define <vscale x 4 x i32> @insert_add_both_insert_vector() {144; CHECK-LABEL: @insert_add_both_insert_vector(145; CHECK-NEXT: entry:146; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 10), <4 x i32> splat (i32 5), i64 0)147; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat (i32 -1), <4 x i32> splat (i32 2), i64 0)148; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[TMP0]], [[TMP1]]149; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]150;151entry:152 %0 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat(i32 10), <4 x i32> splat (i32 5), i64 0)153 %1 = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.v4i32(<vscale x 4 x i32> splat(i32 -1), <4 x i32> splat (i32 2), i64 0)154 %add = add <vscale x 4 x i32> %0, %1155 ret <vscale x 4 x i32> %add156}157