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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -passes=instcombine -S < %s | FileCheck %s3 4declare i32 @llvm.ctlz.i32(i32, i1)5declare i32 @llvm.cttz.i32(i32, i1)6declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)7declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)8 9define i32 @lshr_ctlz_true(i32) {10; CHECK-LABEL: define i32 @lshr_ctlz_true(11; CHECK-SAME: i32 [[TMP0:%.*]]) {12; CHECK-NEXT: [[CTLZ:%.*]] = add i32 [[TMP0]], 913; CHECK-NEXT: ret i32 [[CTLZ]]14;15 %lshr = lshr i32 8387584, %016 %ctlz = call i32 @llvm.ctlz.i32(i32 %lshr, i1 true)17 ret i32 %ctlz18}19 20define i32 @shl_nuw_ctlz_true(i32) {21; CHECK-LABEL: define i32 @shl_nuw_ctlz_true(22; CHECK-SAME: i32 [[TMP0:%.*]]) {23; CHECK-NEXT: [[CTLZ:%.*]] = sub i32 9, [[TMP0]]24; CHECK-NEXT: ret i32 [[CTLZ]]25;26 %shl = shl nuw i32 8387584, %027 %ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 true)28 ret i32 %ctlz29}30 31define i32 @shl_nuw_nsw_ctlz_true(i32) {32; CHECK-LABEL: define i32 @shl_nuw_nsw_ctlz_true(33; CHECK-SAME: i32 [[TMP0:%.*]]) {34; CHECK-NEXT: [[CTLZ:%.*]] = sub i32 9, [[TMP0]]35; CHECK-NEXT: ret i32 [[CTLZ]]36;37 %shl = shl nuw nsw i32 8387584, %038 %ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 true)39 ret i32 %ctlz40}41 42define i32 @lshr_exact_cttz_true(i32) {43; CHECK-LABEL: define i32 @lshr_exact_cttz_true(44; CHECK-SAME: i32 [[TMP0:%.*]]) {45; CHECK-NEXT: [[CTTZ:%.*]] = sub i32 10, [[TMP0]]46; CHECK-NEXT: ret i32 [[CTTZ]]47;48 %lshr = lshr exact i32 8387584, %049 %cttz = call i32 @llvm.cttz.i32(i32 %lshr, i1 true)50 ret i32 %cttz51}52 53define i32 @shl_cttz_true(i32) {54; CHECK-LABEL: define i32 @shl_cttz_true(55; CHECK-SAME: i32 [[TMP0:%.*]]) {56; CHECK-NEXT: [[CTTZ:%.*]] = add i32 [[TMP0]], 1057; CHECK-NEXT: ret i32 [[CTTZ]]58;59 %shl = shl i32 8387584, %060 %cttz = call i32 @llvm.cttz.i32(i32 %shl, i1 true)61 ret i32 %cttz62}63 64define <2 x i32> @vec2_lshr_ctlz_true(<2 x i32>) {65; CHECK-LABEL: define <2 x i32> @vec2_lshr_ctlz_true(66; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {67; CHECK-NEXT: [[CTLZ:%.*]] = add <2 x i32> [[TMP0]], splat (i32 9)68; CHECK-NEXT: ret <2 x i32> [[CTLZ]]69;70 %div = lshr <2 x i32> <i32 8387584, i32 4276440>, %071 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %div, i1 true)72 ret <2 x i32> %ctlz73}74 75define <2 x i32> @vec2_shl_nuw_ctlz_true(<2 x i32>) {76; CHECK-LABEL: define <2 x i32> @vec2_shl_nuw_ctlz_true(77; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {78; CHECK-NEXT: [[CTLZ:%.*]] = sub <2 x i32> splat (i32 9), [[TMP0]]79; CHECK-NEXT: ret <2 x i32> [[CTLZ]]80;81 %shl = shl nuw <2 x i32> <i32 8387584, i32 4276440>, %082 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)83 ret <2 x i32> %ctlz84}85 86define <2 x i32> @vec2_shl_nuw_nsw_ctlz_true(<2 x i32>) {87; CHECK-LABEL: define <2 x i32> @vec2_shl_nuw_nsw_ctlz_true(88; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {89; CHECK-NEXT: [[CTLZ:%.*]] = sub <2 x i32> splat (i32 9), [[TMP0]]90; CHECK-NEXT: ret <2 x i32> [[CTLZ]]91;92 %shl = shl nuw nsw <2 x i32> <i32 8387584, i32 4276440>, %093 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)94 ret <2 x i32> %ctlz95}96 97define <2 x i32> @vec2_lshr_exact_cttz_true(<2 x i32>) {98; CHECK-LABEL: define <2 x i32> @vec2_lshr_exact_cttz_true(99; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {100; CHECK-NEXT: [[CTTZ:%.*]] = sub <2 x i32> <i32 10, i32 3>, [[TMP0]]101; CHECK-NEXT: ret <2 x i32> [[CTTZ]]102;103 %lshr = lshr exact <2 x i32> <i32 8387584, i32 4276440>, %0104 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %lshr, i1 true)105 ret <2 x i32> %cttz106}107 108define <2 x i32> @vec2_shl_cttz_true(<2 x i32>) {109; CHECK-LABEL: define <2 x i32> @vec2_shl_cttz_true(110; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {111; CHECK-NEXT: [[CTTZ:%.*]] = add <2 x i32> [[TMP0]], <i32 10, i32 3>112; CHECK-NEXT: ret <2 x i32> [[CTTZ]]113;114 %shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0115 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %shl, i1 true)116 ret <2 x i32> %cttz117}118 119; negative tests:120 121define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(<2 x i32>) {122; CHECK-LABEL: define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(123; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {124; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]125; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 1, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 true)126; CHECK-NEXT: ret <2 x i32> [[CTLZ]]127;128 %shl = shl nsw <2 x i32> <i32 8387584, i32 4276440>, %0129 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 true)130 ret <2 x i32> %ctlz131}132 133define <2 x i32> @vec2_lshr_ctlz_false_neg(<2 x i32>) {134; CHECK-LABEL: define <2 x i32> @vec2_lshr_ctlz_false_neg(135; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {136; CHECK-NEXT: [[DIV:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]137; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[DIV]], i1 false)138; CHECK-NEXT: ret <2 x i32> [[CTLZ]]139;140 %div = lshr <2 x i32> <i32 8387584, i32 4276440>, %0141 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %div, i1 false)142 ret <2 x i32> %ctlz143}144 145define <2 x i32> @vec2_shl_ctlz_false_neg(<2 x i32>) {146; CHECK-LABEL: define <2 x i32> @vec2_shl_ctlz_false_neg(147; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {148; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]149; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 false)150; CHECK-NEXT: ret <2 x i32> [[CTLZ]]151;152 %shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0153 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %shl, i1 false)154 ret <2 x i32> %ctlz155}156 157define <2 x i32> @vec2_lshr_cttz_false_neg(<2 x i32>) {158; CHECK-LABEL: define <2 x i32> @vec2_lshr_cttz_false_neg(159; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {160; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]161; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[LSHR]], i1 false)162; CHECK-NEXT: ret <2 x i32> [[CTTZ]]163;164 %lshr = lshr <2 x i32> <i32 8387584, i32 4276440>, %0165 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %lshr, i1 false)166 ret <2 x i32> %cttz167}168 169define <2 x i32> @vec2_shl_cttz_false_neg(<2 x i32>) {170; CHECK-LABEL: define <2 x i32> @vec2_shl_cttz_false_neg(171; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {172; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]173; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 3, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[SHL]], i1 false)174; CHECK-NEXT: ret <2 x i32> [[CTTZ]]175;176 %shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0177 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %shl, i1 false)178 ret <2 x i32> %cttz179}180 181define i32 @lshr_ctlz_faslse_neg(i32) {182; CHECK-LABEL: define i32 @lshr_ctlz_faslse_neg(183; CHECK-SAME: i32 [[TMP0:%.*]]) {184; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]185; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)186; CHECK-NEXT: ret i32 [[CTLZ]]187;188 %lshr = lshr i32 8387584, %0189 %ctlz = call i32 @llvm.ctlz.i32(i32 %lshr, i1 false)190 ret i32 %ctlz191}192 193define i32 @shl_ctlz_false_neg(i32) {194; CHECK-LABEL: define i32 @shl_ctlz_false_neg(195; CHECK-SAME: i32 [[TMP0:%.*]]) {196; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]197; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SHL]], i1 false)198; CHECK-NEXT: ret i32 [[CTLZ]]199;200 %shl = shl i32 8387584, %0201 %ctlz = call i32 @llvm.ctlz.i32(i32 %shl, i1 false)202 ret i32 %ctlz203}204 205define i32 @lshr_cttz_false_neg(i32) {206; CHECK-LABEL: define i32 @lshr_cttz_false_neg(207; CHECK-SAME: i32 [[TMP0:%.*]]) {208; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]209; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[LSHR]], i1 false)210; CHECK-NEXT: ret i32 [[CTTZ]]211;212 %lshr = lshr i32 8387584, %0213 %cttz = call i32 @llvm.cttz.i32(i32 %lshr, i1 false)214 ret i32 %cttz215}216 217define i32 @shl_cttz_false_neg(i32) {218; CHECK-LABEL: define i32 @shl_cttz_false_neg(219; CHECK-SAME: i32 [[TMP0:%.*]]) {220; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]221; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 10, 33) i32 @llvm.cttz.i32(i32 [[SHL]], i1 false)222; CHECK-NEXT: ret i32 [[CTTZ]]223;224 %shl = shl i32 8387584, %0225 %cttz = call i32 @llvm.cttz.i32(i32 %shl, i1 false)226 ret i32 %cttz227}228