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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -S -passes=instcombine %s | FileCheck %s3 4declare void @use(i1)5 6define i1 @test_and_olt(float %x) {7; CHECK-LABEL: define i1 @test_and_olt(8; CHECK-SAME: float [[X:%.*]]) {9; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])10; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x3C0000000000000011; CHECK-NEXT: ret i1 [[COND]]12;13 %cmp1 = fcmp olt float %x, 0x3C0000000000000014 %cmp2 = fcmp ogt float %x, 0xBC0000000000000015 %cond = and i1 %cmp1, %cmp216 ret i1 %cond17}18 19define i1 @test_and_ole(float %x) {20; CHECK-LABEL: define i1 @test_and_ole(21; CHECK-SAME: float [[X:%.*]]) {22; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])23; CHECK-NEXT: [[COND:%.*]] = fcmp ole float [[TMP1]], 0x3C0000000000000024; CHECK-NEXT: ret i1 [[COND]]25;26 %cmp1 = fcmp ole float %x, 0x3C0000000000000027 %cmp2 = fcmp oge float %x, 0xBC0000000000000028 %cond = and i1 %cmp1, %cmp229 ret i1 %cond30}31 32define i1 @test_or_ogt(float %x) {33; CHECK-LABEL: define i1 @test_or_ogt(34; CHECK-SAME: float [[X:%.*]]) {35; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])36; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[TMP1]], 0x3C0000000000000037; CHECK-NEXT: ret i1 [[COND]]38;39 %cmp1 = fcmp ogt float %x, 0x3C0000000000000040 %cmp2 = fcmp olt float %x, 0xBC0000000000000041 %cond = or i1 %cmp1, %cmp242 ret i1 %cond43}44 45define i1 @test_or_oge(float %x) {46; CHECK-LABEL: define i1 @test_or_oge(47; CHECK-SAME: float [[X:%.*]]) {48; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])49; CHECK-NEXT: [[COND:%.*]] = fcmp oge float [[TMP1]], 0x3C0000000000000050; CHECK-NEXT: ret i1 [[COND]]51;52 %cmp1 = fcmp oge float %x, 0x3C0000000000000053 %cmp2 = fcmp ole float %x, 0xBC0000000000000054 %cond = or i1 %cmp1, %cmp255 ret i1 %cond56}57 58define i1 @test_and_ult(float %x) {59; CHECK-LABEL: define i1 @test_and_ult(60; CHECK-SAME: float [[X:%.*]]) {61; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])62; CHECK-NEXT: [[COND:%.*]] = fcmp ult float [[TMP1]], 0x3C0000000000000063; CHECK-NEXT: ret i1 [[COND]]64;65 %cmp1 = fcmp ult float %x, 0x3C0000000000000066 %cmp2 = fcmp ugt float %x, 0xBC0000000000000067 %cond = and i1 %cmp1, %cmp268 ret i1 %cond69}70 71define i1 @test_and_ule(float %x) {72; CHECK-LABEL: define i1 @test_and_ule(73; CHECK-SAME: float [[X:%.*]]) {74; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])75; CHECK-NEXT: [[COND:%.*]] = fcmp ule float [[TMP1]], 0x3C0000000000000076; CHECK-NEXT: ret i1 [[COND]]77;78 %cmp1 = fcmp ule float %x, 0x3C0000000000000079 %cmp2 = fcmp uge float %x, 0xBC0000000000000080 %cond = and i1 %cmp1, %cmp281 ret i1 %cond82}83 84define i1 @test_or_ugt(float %x) {85; CHECK-LABEL: define i1 @test_or_ugt(86; CHECK-SAME: float [[X:%.*]]) {87; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])88; CHECK-NEXT: [[COND:%.*]] = fcmp ugt float [[TMP1]], 0x3C0000000000000089; CHECK-NEXT: ret i1 [[COND]]90;91 %cmp1 = fcmp ugt float %x, 0x3C0000000000000092 %cmp2 = fcmp ult float %x, 0xBC0000000000000093 %cond = or i1 %cmp1, %cmp294 ret i1 %cond95}96 97define i1 @test_or_uge(float %x) {98; CHECK-LABEL: define i1 @test_or_uge(99; CHECK-SAME: float [[X:%.*]]) {100; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])101; CHECK-NEXT: [[COND:%.*]] = fcmp uge float [[TMP1]], 0x3C00000000000000102; CHECK-NEXT: ret i1 [[COND]]103;104 %cmp1 = fcmp uge float %x, 0x3C00000000000000105 %cmp2 = fcmp ule float %x, 0xBC00000000000000106 %cond = or i1 %cmp1, %cmp2107 ret i1 %cond108}109 110define i1 @test_and_olt_commuted(float %x) {111; CHECK-LABEL: define i1 @test_and_olt_commuted(112; CHECK-SAME: float [[X:%.*]]) {113; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])114; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x3C00000000000000115; CHECK-NEXT: ret i1 [[COND]]116;117 %cmp1 = fcmp olt float %x, 0x3C00000000000000118 %cmp2 = fcmp ogt float %x, 0xBC00000000000000119 %cond = and i1 %cmp2, %cmp1120 ret i1 %cond121}122 123define i1 @test_and_olt_subnormal(float %x) {124; CHECK-LABEL: define i1 @test_and_olt_subnormal(125; CHECK-SAME: float [[X:%.*]]) {126; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])127; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x36A0000000000000128; CHECK-NEXT: ret i1 [[COND]]129;130 %cmp1 = fcmp olt float %x, 0x36A0000000000000131 %cmp2 = fcmp ogt float %x, 0xB6A0000000000000132 %cond = and i1 %cmp1, %cmp2133 ret i1 %cond134}135 136define i1 @test_and_olt_infinity(float %x) {137; CHECK-LABEL: define i1 @test_and_olt_infinity(138; CHECK-SAME: float [[X:%.*]]) {139; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])140; CHECK-NEXT: [[COND:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000141; CHECK-NEXT: ret i1 [[COND]]142;143 %cmp1 = fcmp olt float %x, 0x7FF0000000000000144 %cmp2 = fcmp ogt float %x, 0xFFF0000000000000145 %cond = and i1 %cmp1, %cmp2146 ret i1 %cond147}148 149define i1 @test_and_olt_zero(float %x) {150; CHECK-LABEL: define i1 @test_and_olt_zero(151; CHECK-SAME: float [[X:%.*]]) {152; CHECK-NEXT: ret i1 false153;154 %cmp1 = fcmp olt float %x, 0x0000000000000000155 %cmp2 = fcmp ogt float %x, 0x8000000000000000156 %cond = and i1 %cmp1, %cmp2157 ret i1 %cond158}159 160define i1 @test_and_ole_zero(float %x) {161; CHECK-LABEL: define i1 @test_and_ole_zero(162; CHECK-SAME: float [[X:%.*]]) {163; CHECK-NEXT: [[COND:%.*]] = fcmp oeq float [[X]], 0.000000e+00164; CHECK-NEXT: ret i1 [[COND]]165;166 %cmp1 = fcmp ole float %x, 0x0000000000000000167 %cmp2 = fcmp oge float %x, 0x8000000000000000168 %cond = and i1 %cmp1, %cmp2169 ret i1 %cond170}171 172define i1 @test_and_olt_logical(float %x) {173; CHECK-LABEL: define i1 @test_and_olt_logical(174; CHECK-SAME: float [[X:%.*]]) {175; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])176; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x3C00000000000000177; CHECK-NEXT: ret i1 [[COND]]178;179 %cmp1 = fcmp olt float %x, 0x3C00000000000000180 %cmp2 = fcmp ogt float %x, 0xBC00000000000000181 %cond = select i1 %cmp1, i1 %cmp2, i1 false182 ret i1 %cond183}184 185define <2 x i1> @test_and_olt_poison(<2 x float> %x) {186; CHECK-LABEL: define <2 x i1> @test_and_olt_poison(187; CHECK-SAME: <2 x float> [[X:%.*]]) {188; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X]])189; CHECK-NEXT: [[COND:%.*]] = fcmp olt <2 x float> [[TMP1]], splat (float 0x3C00000000000000)190; CHECK-NEXT: ret <2 x i1> [[COND]]191;192 %cmp1 = fcmp olt <2 x float> %x, <float 0x3C00000000000000, float poison>193 %cmp2 = fcmp ogt <2 x float> %x, <float 0xBC00000000000000, float poison>194 %cond = and <2 x i1> %cmp1, %cmp2195 ret <2 x i1> %cond196}197 198define i1 @test_and_olt_nan(float %x) {199; CHECK-LABEL: define i1 @test_and_olt_nan(200; CHECK-SAME: float [[X:%.*]]) {201; CHECK-NEXT: ret i1 false202;203 %cmp1 = fcmp olt float %x, 0x7FF8000000000000204 %cmp2 = fcmp ogt float %x, 0xFFF8000000000000205 %cond = and i1 %cmp1, %cmp2206 ret i1 %cond207}208 209define i1 @test_and_ult_nan(float %x) {210; CHECK-LABEL: define i1 @test_and_ult_nan(211; CHECK-SAME: float [[X:%.*]]) {212; CHECK-NEXT: ret i1 true213;214 %cmp1 = fcmp ult float %x, 0x7FF0000020000000215 %cmp2 = fcmp ugt float %x, 0xFFF0000020000000216 %cond = and i1 %cmp1, %cmp2217 ret i1 %cond218}219 220define i1 @test_or_ogt_nan(float %x) {221; CHECK-LABEL: define i1 @test_or_ogt_nan(222; CHECK-SAME: float [[X:%.*]]) {223; CHECK-NEXT: ret i1 false224;225 %cmp1 = fcmp ogt float %x, 0x7FF0000020000000226 %cmp2 = fcmp olt float %x, 0xFFF0000020000000227 %cond = or i1 %cmp1, %cmp2228 ret i1 %cond229}230 231define i1 @test_or_ugt_nan(float %x) {232; CHECK-LABEL: define i1 @test_or_ugt_nan(233; CHECK-SAME: float [[X:%.*]]) {234; CHECK-NEXT: ret i1 true235;236 %cmp1 = fcmp ugt float %x, 0x7FF0000020000000237 %cmp2 = fcmp ult float %x, 0xFFF0000020000000238 %cond = or i1 %cmp1, %cmp2239 ret i1 %cond240}241 242define i1 @test_and_ogt(float %x) {243; CHECK-LABEL: define i1 @test_and_ogt(244; CHECK-SAME: float [[X:%.*]]) {245; CHECK-NEXT: ret i1 false246;247 %cmp1 = fcmp ogt float %x, 0x3C00000000000000248 %cmp2 = fcmp olt float %x, 0xBC00000000000000249 %cond = and i1 %cmp1, %cmp2250 ret i1 %cond251}252 253define i1 @test_or_olt(float %x) {254; CHECK-LABEL: define i1 @test_or_olt(255; CHECK-SAME: float [[X:%.*]]) {256; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])257; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[TMP1]], 0xBC00000000000000258; CHECK-NEXT: ret i1 [[COND]]259;260 %cmp1 = fcmp olt float %x, 0x3C00000000000000261 %cmp2 = fcmp ogt float %x, 0xBC00000000000000262 %cond = or i1 %cmp1, %cmp2263 ret i1 %cond264}265 266; Negative tests267 268define i1 @test_and_olt_multiuse(float %x) {269; CHECK-LABEL: define i1 @test_and_olt_multiuse(270; CHECK-SAME: float [[X:%.*]]) {271; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], 0x3C00000000000000272; CHECK-NEXT: call void @use(i1 [[CMP1]])273; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[X]], 0xBC00000000000000274; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]275; CHECK-NEXT: ret i1 [[COND]]276;277 %cmp1 = fcmp olt float %x, 0x3C00000000000000278 call void @use(i1 %cmp1)279 %cmp2 = fcmp ogt float %x, 0xBC00000000000000280 %cond = and i1 %cmp1, %cmp2281 ret i1 %cond282}283 284define i1 @test_and_olt_mismatched_lhs(float %x, float %y) {285; CHECK-LABEL: define i1 @test_and_olt_mismatched_lhs(286; CHECK-SAME: float [[X:%.*]], float [[Y:%.*]]) {287; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], 0x3C00000000000000288; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[Y]], 0xBC00000000000000289; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]290; CHECK-NEXT: ret i1 [[COND]]291;292 %cmp1 = fcmp olt float %x, 0x3C00000000000000293 %cmp2 = fcmp ogt float %y, 0xBC00000000000000294 %cond = and i1 %cmp1, %cmp2295 ret i1 %cond296}297 298define i1 @test_and_olt_same_sign(float %x) {299; CHECK-LABEL: define i1 @test_and_olt_same_sign(300; CHECK-SAME: float [[X:%.*]]) {301; CHECK-NEXT: ret i1 false302;303 %cmp1 = fcmp olt float %x, 0x3C00000000000000304 %cmp2 = fcmp ogt float %x, 0x3C00000000000000305 %cond = and i1 %cmp1, %cmp2306 ret i1 %cond307}308 309define i1 @test_and_olt_mismatched_mag(float %x) {310; CHECK-LABEL: define i1 @test_and_olt_mismatched_mag(311; CHECK-SAME: float [[X:%.*]]) {312; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], 0x3C80000000000000313; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[X]], 0xBC00000000000000314; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]315; CHECK-NEXT: ret i1 [[COND]]316;317 %cmp1 = fcmp olt float %x, 0x3C80000000000000318 %cmp2 = fcmp ogt float %x, 0xBC00000000000000319 %cond = and i1 %cmp1, %cmp2320 ret i1 %cond321}322 323define i1 @test_and_olt_wrong_pred2(float %x) {324; CHECK-LABEL: define i1 @test_and_olt_wrong_pred2(325; CHECK-SAME: float [[X:%.*]]) {326; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[X]], 0x3C00000000000000327; CHECK-NEXT: [[CMP2:%.*]] = fcmp oge float [[X]], 0xBC00000000000000328; CHECK-NEXT: [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]329; CHECK-NEXT: ret i1 [[COND]]330;331 %cmp1 = fcmp olt float %x, 0x3C00000000000000332 %cmp2 = fcmp oge float %x, 0xBC00000000000000333 %cond = and i1 %cmp1, %cmp2334 ret i1 %cond335}336 337define i1 @test_and_olt_fmf_propagation(float %x) {338; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation(339; CHECK-SAME: float [[X:%.*]]) {340; CHECK-NEXT: [[TMP1:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[X]])341; CHECK-NEXT: [[COND:%.*]] = fcmp nnan ninf nsz olt float [[TMP1]], 0x3C00000000000000342; CHECK-NEXT: ret i1 [[COND]]343;344 %cmp1 = fcmp nsz nnan ninf olt float %x, 0x3C00000000000000345 %cmp2 = fcmp nsz nnan ninf ogt float %x, 0xBC00000000000000346 %cond = and i1 %cmp1, %cmp2347 ret i1 %cond348}349 350define i1 @test_and_olt_fmf_propagation_union(float %x) {351; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union(352; CHECK-SAME: float [[X:%.*]]) {353; CHECK-NEXT: [[TMP1:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[X]])354; CHECK-NEXT: [[COND:%.*]] = fcmp nnan ninf nsz olt float [[TMP1]], 0x3C00000000000000355; CHECK-NEXT: ret i1 [[COND]]356;357 %cmp1 = fcmp nnan ninf olt float %x, 0x3C00000000000000358 %cmp2 = fcmp nsz nnan ogt float %x, 0xBC00000000000000359 %cond = and i1 %cmp1, %cmp2360 ret i1 %cond361}362 363define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(float %x) {364; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(365; CHECK-SAME: float [[X:%.*]]) {366; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])367; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x3C00000000000000368; CHECK-NEXT: ret i1 [[COND]]369;370 %cmp1 = fcmp ninf olt float %x, 0x3C00000000000000371 %cmp2 = fcmp ogt float %x, 0xBC00000000000000372 %cond = select i1 %cmp2, i1 %cmp1, i1 false373 ret i1 %cond374}375 376define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(float %x) {377; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(378; CHECK-SAME: float [[X:%.*]]) {379; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])380; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], 0x3C00000000000000381; CHECK-NEXT: ret i1 [[COND]]382;383 %cmp1 = fcmp olt float %x, 0x3C00000000000000384 %cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000385 %cond = select i1 %cmp2, i1 %cmp1, i1 false386 ret i1 %cond387}388 389define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(float %x) {390; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(391; CHECK-SAME: float [[X:%.*]]) {392; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])393; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], 0x3C00000000000000394; CHECK-NEXT: ret i1 [[COND]]395;396 %cmp1 = fcmp ninf olt float %x, 0x3C00000000000000397 %cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000398 %cond = select i1 %cmp2, i1 %cmp1, i1 false399 ret i1 %cond400}401