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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare float @llvm.minimum.f32(float %Val0, float %Val1)5declare float @llvm.maximum.f32(float %Val0, float %Val1)6declare <4 x float> @llvm.minimum.v4f32(<4 x float> %Val0, <4 x float> %Val1)7declare <4 x float> @llvm.maximum.v4f32(<4 x float> %Val0, <4 x float> %Val1)8 9define float @test(float %a, float %b) {10; CHECK-LABEL: @test(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[RES:%.*]] = fmul float [[A:%.*]], [[B:%.*]]13; CHECK-NEXT: ret float [[RES]]14;15entry:16 %min = call float @llvm.minimum.f32(float %a, float %b)17 %max = call float @llvm.maximum.f32(float %a, float %b)18 %res = fmul float %min, %max19 ret float %res20}21 22define float @test_comm1(float %a, float %b) {23; CHECK-LABEL: @test_comm1(24; CHECK-NEXT: entry:25; CHECK-NEXT: [[RES:%.*]] = fmul float [[A:%.*]], [[B:%.*]]26; CHECK-NEXT: ret float [[RES]]27;28entry:29 %min = call float @llvm.minimum.f32(float %a, float %b)30 %max = call float @llvm.maximum.f32(float %a, float %b)31 %res = fmul float %max, %min32 ret float %res33}34 35define float @test_comm2(float %a, float %b) {36; CHECK-LABEL: @test_comm2(37; CHECK-NEXT: entry:38; CHECK-NEXT: [[RES:%.*]] = fmul float [[B:%.*]], [[A:%.*]]39; CHECK-NEXT: ret float [[RES]]40;41entry:42 %min = call float @llvm.minimum.f32(float %a, float %b)43 %max = call float @llvm.maximum.f32(float %b, float %a)44 %res = fmul float %min, %max45 ret float %res46}47 48 49define float @test_comm3(float %a, float %b) {50; CHECK-LABEL: @test_comm3(51; CHECK-NEXT: entry:52; CHECK-NEXT: [[RES:%.*]] = fmul float [[B:%.*]], [[A:%.*]]53; CHECK-NEXT: ret float [[RES]]54;55entry:56 %min = call float @llvm.minimum.f32(float %a, float %b)57 %max = call float @llvm.maximum.f32(float %b, float %a)58 %res = fmul float %max, %min59 ret float %res60}61 62define <4 x float> @test_vect(<4 x float> %a, <4 x float> %b) {63; CHECK-LABEL: @test_vect(64; CHECK-NEXT: entry:65; CHECK-NEXT: [[RES:%.*]] = fmul <4 x float> [[B:%.*]], [[A:%.*]]66; CHECK-NEXT: ret <4 x float> [[RES]]67;68entry:69 %min = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)70 %max = call <4 x float> @llvm.maximum.v4f32(<4 x float> %b, <4 x float> %a)71 %res = fmul <4 x float> %min, %max72 ret <4 x float> %res73}74 75define float @test_flags(float %a, float %b) {76; CHECK-LABEL: @test_flags(77; CHECK-NEXT: entry:78; CHECK-NEXT: [[RES:%.*]] = fmul fast float [[A:%.*]], [[B:%.*]]79; CHECK-NEXT: ret float [[RES]]80;81entry:82 %min = call float @llvm.minimum.f32(float %a, float %b)83 %max = call float @llvm.maximum.f32(float %a, float %b)84 %res = fmul fast float %min, %max85 ret float %res86}87 88define float @test_flags2(float %a, float %b) {89; CHECK-LABEL: @test_flags2(90; CHECK-NEXT: entry:91; CHECK-NEXT: [[RES:%.*]] = fmul reassoc nsz arcp contract afn float [[A:%.*]], [[B:%.*]]92; CHECK-NEXT: ret float [[RES]]93;94entry:95 %min = call float @llvm.minimum.f32(float %a, float %b)96 %max = call float @llvm.maximum.f32(float %a, float %b)97 %res = fmul reassoc ninf nsz arcp contract afn float %min, %max98 ret float %res99}100