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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare void @use(i32)5 6; PR19497 8; negative test for zext/zext additions with i169define i1 @cvt_icmp_0_zext_plus_zext_eq_i16(i16 %arg, i16 %arg1) {10; CHECK-LABEL: @cvt_icmp_0_zext_plus_zext_eq_i16(11; CHECK-NEXT: bb:12; CHECK-NEXT: [[TMP0:%.*]] = or i16 [[ARG1:%.*]], [[ARG:%.*]]13; CHECK-NEXT: [[I4:%.*]] = icmp eq i16 [[TMP0]], 014; CHECK-NEXT: ret i1 [[I4]]15;16bb:17 %i = zext i16 %arg to i3218 %i2 = zext i16 %arg1 to i3219 %i3 = add i32 %i2, %i20 %i4 = icmp eq i32 %i3, 021 ret i1 %i422}23 24; negative test for zext/zext addtions with i825define i1 @cvt_icmp_0_zext_plus_zext_eq_i8(i8 %arg, i8 %arg1) {26; CHECK-LABEL: @cvt_icmp_0_zext_plus_zext_eq_i8(27; CHECK-NEXT: bb:28; CHECK-NEXT: [[TMP0:%.*]] = or i8 [[ARG1:%.*]], [[ARG:%.*]]29; CHECK-NEXT: [[I4:%.*]] = icmp eq i8 [[TMP0]], 030; CHECK-NEXT: ret i1 [[I4]]31;32bb:33 %i = zext i8 %arg to i3234 %i2 = zext i8 %arg1 to i3235 %i3 = add i32 %i2, %i36 %i4 = icmp eq i32 %i3, 037 ret i1 %i438}39 40; start of positive tests41define i1 @cvt_icmp_neg_2_zext_plus_zext_eq(i1 %arg, i1 %arg1) {42; CHECK-LABEL: @cvt_icmp_neg_2_zext_plus_zext_eq(43; CHECK-NEXT: bb:44; CHECK-NEXT: ret i1 false45;46bb:47 %i = zext i1 %arg to i3248 %i2 = zext i1 %arg1 to i3249 %i3 = add i32 %i2, %i50 %i4 = icmp eq i32 %i3, -251 ret i1 %i452}53 54define i1 @cvt_icmp_neg_1_zext_plus_zext_eq(i1 %arg, i1 %arg1) {55; CHECK-LABEL: @cvt_icmp_neg_1_zext_plus_zext_eq(56; CHECK-NEXT: bb:57; CHECK-NEXT: ret i1 false58;59bb:60 %i = zext i1 %arg to i3261 %i2 = zext i1 %arg1 to i3262 %i3 = add i32 %i2, %i63 %i4 = icmp eq i32 %i3, -164 ret i1 %i465}66 67define i1 @cvt_icmp_0_zext_plus_zext_eq(i1 %arg, i1 %arg1) {68; CHECK-LABEL: @cvt_icmp_0_zext_plus_zext_eq(69; CHECK-NEXT: bb:70; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]71; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true72; CHECK-NEXT: ret i1 [[I4]]73;74bb:75 %i = zext i1 %arg to i3276 %i2 = zext i1 %arg1 to i3277 %i3 = add i32 %i2, %i78 %i4 = icmp eq i32 %i3, 079 ret i1 %i480}81 82define i1 @cvt_icmp_0_zext_plus_zext_eq_i2(i1 %a, i1 %b) {83; CHECK-LABEL: @cvt_icmp_0_zext_plus_zext_eq_i2(84; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[A:%.*]], [[B:%.*]]85; CHECK-NEXT: [[CMP:%.*]] = xor i1 [[TMP1]], true86; CHECK-NEXT: ret i1 [[CMP]]87;88 %a.ext = zext i1 %a to i289 %b.ext = zext i1 %b to i290 %add = add i2 %a.ext, %b.ext91 %cmp = icmp eq i2 %add, 092 ret i1 %cmp93}94 95define i1 @cvt_icmp_1_zext_plus_zext_eq(i1 %arg, i1 %arg1) {96; CHECK-LABEL: @cvt_icmp_1_zext_plus_zext_eq(97; CHECK-NEXT: bb:98; CHECK-NEXT: [[I4:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]99; CHECK-NEXT: ret i1 [[I4]]100;101bb:102 %i = zext i1 %arg to i32103 %i2 = zext i1 %arg1 to i32104 %i3 = add i32 %i2, %i105 %i4 = icmp eq i32 %i3, 1106 ret i1 %i4107}108 109define <2 x i1> @cvt_icmp_1_zext_plus_zext_eq_vec(<2 x i1> %arg, <2 x i1> %arg1) {110; CHECK-LABEL: @cvt_icmp_1_zext_plus_zext_eq_vec(111; CHECK-NEXT: bb:112; CHECK-NEXT: [[I4:%.*]] = xor <2 x i1> [[ARG1:%.*]], [[ARG:%.*]]113; CHECK-NEXT: ret <2 x i1> [[I4]]114;115bb:116 %i = zext <2 x i1> %arg to <2 x i32>117 %i2 = zext <2 x i1> %arg1 to <2 x i32>118 %i3 = add <2 x i32> %i2, %i119 %i4 = icmp eq <2 x i32> %i3, <i32 1, i32 1>120 ret <2 x i1> %i4121}122 123define i1 @cvt_icmp_2_zext_plus_zext_eq(i1 %arg, i1 %arg1) {124; CHECK-LABEL: @cvt_icmp_2_zext_plus_zext_eq(125; CHECK-NEXT: bb:126; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG:%.*]], [[ARG1:%.*]]127; CHECK-NEXT: ret i1 [[T]]128;129bb:130 %i = zext i1 %arg to i32131 %i2 = zext i1 %arg1 to i32132 %i3 = add i32 %i, %i2133 %t = icmp eq i32 %i3, 2134 ret i1 %t135}136 137define i1 @cvt_icmp_neg_2_sext_plus_sext_eq(i1 %arg, i1 %arg1) {138; CHECK-LABEL: @cvt_icmp_neg_2_sext_plus_sext_eq(139; CHECK-NEXT: bb:140; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG:%.*]], [[ARG1:%.*]]141; CHECK-NEXT: ret i1 [[T]]142;143bb:144 %i = sext i1 %arg to i32145 %i2 = sext i1 %arg1 to i32146 %i3 = add i32 %i, %i2147 %t = icmp eq i32 %i3, -2148 ret i1 %t149}150 151define i1 @cvt_icmp_neg_1_sext_plus_sext_eq(i1 %arg, i1 %arg1) {152; CHECK-LABEL: @cvt_icmp_neg_1_sext_plus_sext_eq(153; CHECK-NEXT: bb:154; CHECK-NEXT: [[T:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]155; CHECK-NEXT: ret i1 [[T]]156;157bb:158 %i = sext i1 %arg to i32159 %i2 = sext i1 %arg1 to i32160 %i3 = add i32 %i, %i2161 %t = icmp eq i32 %i3, -1162 ret i1 %t163}164 165define i1 @cvt_icmp_0_sext_plus_sext_eq(i1 %arg, i1 %arg1) {166; CHECK-LABEL: @cvt_icmp_0_sext_plus_sext_eq(167; CHECK-NEXT: bb:168; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG:%.*]], [[ARG1:%.*]]169; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true170; CHECK-NEXT: ret i1 [[T]]171;172bb:173 %i = sext i1 %arg to i32174 %i2 = sext i1 %arg1 to i32175 %i3 = add i32 %i, %i2176 %t = icmp eq i32 %i3, 0177 ret i1 %t178}179 180define i1 @cvt_icmp_1_sext_plus_sext_eq(i1 %arg, i1 %arg1) {181; CHECK-LABEL: @cvt_icmp_1_sext_plus_sext_eq(182; CHECK-NEXT: bb:183; CHECK-NEXT: ret i1 false184;185bb:186 %i = sext i1 %arg to i32187 %i2 = sext i1 %arg1 to i32188 %i3 = add i32 %i, %i2189 %t = icmp eq i32 %i3, 1190 ret i1 %t191}192 193define i1 @cvt_icmp_2_sext_plus_sext_eq(i1 %arg, i1 %arg1) {194; CHECK-LABEL: @cvt_icmp_2_sext_plus_sext_eq(195; CHECK-NEXT: bb:196; CHECK-NEXT: ret i1 false197;198bb:199 %i = sext i1 %arg to i32200 %i2 = sext i1 %arg1 to i32201 %i3 = add i32 %i, %i2202 %t = icmp eq i32 %i3, 2203 ret i1 %t204}205 206define i1 @cvt_icmp_neg_2_sext_plus_zext_eq(i1 %arg, i1 %arg1) {207; CHECK-LABEL: @cvt_icmp_neg_2_sext_plus_zext_eq(208; CHECK-NEXT: bb:209; CHECK-NEXT: ret i1 false210;211bb:212 %i = sext i1 %arg to i32213 %i2 = zext i1 %arg1 to i32214 %i3 = add i32 %i, %i2215 %t = icmp eq i32 %i3, -2216 ret i1 %t217}218 219define i1 @cvt_icmp_neg_1_sext_plus_zext_eq(i1 %arg, i1 %arg1) {220; CHECK-LABEL: @cvt_icmp_neg_1_sext_plus_zext_eq(221; CHECK-NEXT: bb:222; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true223; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG:%.*]], [[TMP0]]224; CHECK-NEXT: ret i1 [[T]]225;226bb:227 %i = sext i1 %arg to i32228 %i2 = zext i1 %arg1 to i32229 %i3 = add i32 %i, %i2230 %t = icmp eq i32 %i3, -1231 ret i1 %t232}233 234define i1 @cvt_icmp_0_sext_plus_zext_eq(i1 %arg, i1 %arg1) {235; CHECK-LABEL: @cvt_icmp_0_sext_plus_zext_eq(236; CHECK-NEXT: bb:237; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]238; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true239; CHECK-NEXT: ret i1 [[T]]240;241bb:242 %i = sext i1 %arg to i32243 %i2 = zext i1 %arg1 to i32244 %i3 = add i32 %i, %i2245 %t = icmp eq i32 %i3, 0246 ret i1 %t247}248 249define i1 @cvt_icmp_1_sext_plus_zext_eq(i1 %arg, i1 %arg1) {250; CHECK-LABEL: @cvt_icmp_1_sext_plus_zext_eq(251; CHECK-NEXT: bb:252; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true253; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]254; CHECK-NEXT: ret i1 [[T]]255;256bb:257 %i = sext i1 %arg to i32258 %i2 = zext i1 %arg1 to i32259 %i3 = add i32 %i, %i2260 %t = icmp eq i32 %i3, 1261 ret i1 %t262}263 264define i1 @cvt_icmp_2_sext_plus_zext_eq(i1 %arg, i1 %arg1) {265; CHECK-LABEL: @cvt_icmp_2_sext_plus_zext_eq(266; CHECK-NEXT: bb:267; CHECK-NEXT: ret i1 false268;269bb:270 %i = sext i1 %arg to i32271 %i2 = zext i1 %arg1 to i32272 %i3 = add i32 %i, %i2273 %t = icmp eq i32 %i3, 2274 ret i1 %t275}276 277define i1 @cvt_icmp_neg_2_zext_plus_zext_ne(i1 %arg, i1 %arg1) {278; CHECK-LABEL: @cvt_icmp_neg_2_zext_plus_zext_ne(279; CHECK-NEXT: bb:280; CHECK-NEXT: ret i1 true281;282bb:283 %i = zext i1 %arg to i32284 %i2 = zext i1 %arg1 to i32285 %i3 = add i32 %i2, %i286 %i4 = icmp ne i32 %i3, -2287 ret i1 %i4288}289 290define i1 @cvt_icmp_neg_1_zext_plus_zext_ne(i1 %arg, i1 %arg1) {291; CHECK-LABEL: @cvt_icmp_neg_1_zext_plus_zext_ne(292; CHECK-NEXT: bb:293; CHECK-NEXT: ret i1 true294;295bb:296 %i = zext i1 %arg to i32297 %i2 = zext i1 %arg1 to i32298 %i3 = add i32 %i2, %i299 %i4 = icmp ne i32 %i3, -1300 ret i1 %i4301}302 303define i1 @cvt_icmp_0_zext_plus_zext_ne(i1 %arg, i1 %arg1) {304; CHECK-LABEL: @cvt_icmp_0_zext_plus_zext_ne(305; CHECK-NEXT: bb:306; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]307; CHECK-NEXT: ret i1 [[I4]]308;309bb:310 %i = zext i1 %arg to i32311 %i2 = zext i1 %arg1 to i32312 %i3 = add i32 %i2, %i313 %i4 = icmp ne i32 %i3, 0314 ret i1 %i4315}316 317define i1 @cvt_icmp_1_zext_plus_zext_ne(i1 %arg, i1 %arg1) {318; CHECK-LABEL: @cvt_icmp_1_zext_plus_zext_ne(319; CHECK-NEXT: bb:320; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]321; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true322; CHECK-NEXT: ret i1 [[I4]]323;324bb:325 %i = zext i1 %arg to i32326 %i2 = zext i1 %arg1 to i32327 %i3 = add i32 %i2, %i328 %i4 = icmp ne i32 %i3, 1329 ret i1 %i4330}331 332define i1 @cvt_icmp_1_zext_plus_zext_ne_extra_use_1(i1 %arg, i1 %arg1) {333; CHECK-LABEL: @cvt_icmp_1_zext_plus_zext_ne_extra_use_1(334; CHECK-NEXT: bb:335; CHECK-NEXT: [[I:%.*]] = zext i1 [[ARG:%.*]] to i32336; CHECK-NEXT: [[I2:%.*]] = zext i1 [[ARG1:%.*]] to i32337; CHECK-NEXT: [[I3:%.*]] = add nuw nsw i32 [[I2]], [[I]]338; CHECK-NEXT: call void @use(i32 [[I3]])339; CHECK-NEXT: [[I4:%.*]] = icmp ne i32 [[I3]], 1340; CHECK-NEXT: ret i1 [[I4]]341;342bb:343 %i = zext i1 %arg to i32344 %i2 = zext i1 %arg1 to i32345 %i3 = add i32 %i2, %i346 call void @use(i32 %i3)347 %i4 = icmp ne i32 %i3, 1348 ret i1 %i4349}350 351define i1 @cvt_icmp_1_zext_plus_zext_ne_extra_use_2(i1 %arg, i1 %arg1) {352; CHECK-LABEL: @cvt_icmp_1_zext_plus_zext_ne_extra_use_2(353; CHECK-NEXT: bb:354; CHECK-NEXT: [[I:%.*]] = zext i1 [[ARG:%.*]] to i32355; CHECK-NEXT: call void @use(i32 [[I]])356; CHECK-NEXT: [[I2:%.*]] = zext i1 [[ARG1:%.*]] to i32357; CHECK-NEXT: call void @use(i32 [[I2]])358; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1]], [[ARG]]359; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true360; CHECK-NEXT: ret i1 [[I4]]361;362bb:363 %i = zext i1 %arg to i32364 call void @use(i32 %i)365 %i2 = zext i1 %arg1 to i32366 call void @use(i32 %i2)367 %i3 = add i32 %i2, %i368 %i4 = icmp ne i32 %i3, 1369 ret i1 %i4370}371 372define i1 @cvt_icmp_2_zext_plus_zext_ne(i1 %arg, i1 %arg1) {373; CHECK-LABEL: @cvt_icmp_2_zext_plus_zext_ne(374; CHECK-NEXT: bb:375; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG:%.*]], [[ARG1:%.*]]376; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true377; CHECK-NEXT: ret i1 [[T]]378;379bb:380 %i = zext i1 %arg to i32381 %i2 = zext i1 %arg1 to i32382 %i3 = add i32 %i, %i2383 %t = icmp ne i32 %i3, 2384 ret i1 %t385}386 387define i1 @cvt_icmp_neg_2_sext_plus_sext_ne(i1 %arg, i1 %arg1) {388; CHECK-LABEL: @cvt_icmp_neg_2_sext_plus_sext_ne(389; CHECK-NEXT: bb:390; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG:%.*]], [[ARG1:%.*]]391; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true392; CHECK-NEXT: ret i1 [[T]]393;394bb:395 %i = sext i1 %arg to i32396 %i2 = sext i1 %arg1 to i32397 %i3 = add i32 %i, %i2398 %t = icmp ne i32 %i3, -2399 ret i1 %t400}401 402define i1 @cvt_icmp_neg_1_sext_plus_sext_ne(i1 %arg, i1 %arg1) {403; CHECK-LABEL: @cvt_icmp_neg_1_sext_plus_sext_ne(404; CHECK-NEXT: bb:405; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]406; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true407; CHECK-NEXT: ret i1 [[T]]408;409bb:410 %i = sext i1 %arg to i32411 %i2 = sext i1 %arg1 to i32412 %i3 = add i32 %i, %i2413 %t = icmp ne i32 %i3, -1414 ret i1 %t415}416 417define i1 @cvt_icmp_0_sext_plus_sext_ne(i1 %arg, i1 %arg1) {418; CHECK-LABEL: @cvt_icmp_0_sext_plus_sext_ne(419; CHECK-NEXT: bb:420; CHECK-NEXT: [[T:%.*]] = or i1 [[ARG:%.*]], [[ARG1:%.*]]421; CHECK-NEXT: ret i1 [[T]]422;423bb:424 %i = sext i1 %arg to i32425 %i2 = sext i1 %arg1 to i32426 %i3 = add i32 %i, %i2427 %t = icmp ne i32 %i3, 0428 ret i1 %t429}430 431define i1 @cvt_icmp_1_sext_plus_sext_ne(i1 %arg, i1 %arg1) {432; CHECK-LABEL: @cvt_icmp_1_sext_plus_sext_ne(433; CHECK-NEXT: bb:434; CHECK-NEXT: ret i1 true435;436bb:437 %i = sext i1 %arg to i32438 %i2 = sext i1 %arg1 to i32439 %i3 = add i32 %i, %i2440 %t = icmp ne i32 %i3, 1441 ret i1 %t442}443 444define i1 @cvt_icmp_2_sext_plus_sext_ne(i1 %arg, i1 %arg1) {445; CHECK-LABEL: @cvt_icmp_2_sext_plus_sext_ne(446; CHECK-NEXT: bb:447; CHECK-NEXT: ret i1 true448;449bb:450 %i = sext i1 %arg to i32451 %i2 = sext i1 %arg1 to i32452 %i3 = add i32 %i, %i2453 %t = icmp ne i32 %i3, 2454 ret i1 %t455}456 457define i1 @cvt_icmp_neg_2_sext_plus_zext_ne(i1 %arg, i1 %arg1) {458; CHECK-LABEL: @cvt_icmp_neg_2_sext_plus_zext_ne(459; CHECK-NEXT: bb:460; CHECK-NEXT: ret i1 true461;462bb:463 %i = sext i1 %arg to i32464 %i2 = zext i1 %arg1 to i32465 %i3 = add i32 %i, %i2466 %t = icmp ne i32 %i3, -2467 ret i1 %t468}469 470define i1 @cvt_icmp_neg_1_sext_plus_zext_ne(i1 %arg, i1 %arg1) {471; CHECK-LABEL: @cvt_icmp_neg_1_sext_plus_zext_ne(472; CHECK-NEXT: bb:473; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true474; CHECK-NEXT: [[T:%.*]] = or i1 [[ARG1:%.*]], [[TMP0]]475; CHECK-NEXT: ret i1 [[T]]476;477bb:478 %i = sext i1 %arg to i32479 %i2 = zext i1 %arg1 to i32480 %i3 = add i32 %i, %i2481 %t = icmp ne i32 %i3, -1482 ret i1 %t483}484 485define i1 @cvt_icmp_0_sext_plus_zext_ne(i1 %arg, i1 %arg1) {486; CHECK-LABEL: @cvt_icmp_0_sext_plus_zext_ne(487; CHECK-NEXT: bb:488; CHECK-NEXT: [[T:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]489; CHECK-NEXT: ret i1 [[T]]490;491bb:492 %i = sext i1 %arg to i32493 %i2 = zext i1 %arg1 to i32494 %i3 = add i32 %i, %i2495 %t = icmp ne i32 %i3, 0496 ret i1 %t497}498 499define i1 @cvt_icmp_1_sext_plus_zext_ne(i1 %arg, i1 %arg1) {500; CHECK-LABEL: @cvt_icmp_1_sext_plus_zext_ne(501; CHECK-NEXT: bb:502; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true503; CHECK-NEXT: [[T:%.*]] = or i1 [[ARG:%.*]], [[TMP0]]504; CHECK-NEXT: ret i1 [[T]]505;506bb:507 %i = sext i1 %arg to i32508 %i2 = zext i1 %arg1 to i32509 %i3 = add i32 %i, %i2510 %t = icmp ne i32 %i3, 1511 ret i1 %t512}513 514define i1 @cvt_icmp_2_sext_plus_zext_ne(i1 %arg, i1 %arg1) {515; CHECK-LABEL: @cvt_icmp_2_sext_plus_zext_ne(516; CHECK-NEXT: bb:517; CHECK-NEXT: ret i1 true518;519bb:520 %i = sext i1 %arg to i32521 %i2 = zext i1 %arg1 to i32522 %i3 = add i32 %i, %i2523 %t = icmp ne i32 %i3, 2524 ret i1 %t525}526 527define <2 x i1> @cvt_icmp_2_sext_plus_zext_ne_vec(<2 x i1> %arg, <2 x i1> %arg1) {528; CHECK-LABEL: @cvt_icmp_2_sext_plus_zext_ne_vec(529; CHECK-NEXT: bb:530; CHECK-NEXT: ret <2 x i1> splat (i1 true)531;532bb:533 %i = sext <2 x i1> %arg to <2 x i32>534 %i2 = zext <2 x i1> %arg1 to <2 x i32>535 %i3 = add nsw <2 x i32> %i, %i2536 %i4 = icmp ne <2 x i32> %i3, <i32 2, i32 2>537 ret <2 x i1> %i4538}539 540; test if zext i1 X + sext i1 Y converted to sext i1 X + zext i1 Y541; and then processed542 543define i1 @cvt_icmp_neg_2_zext_plus_sext_eq(i1 %arg, i1 %arg1) {544; CHECK-LABEL: @cvt_icmp_neg_2_zext_plus_sext_eq(545; CHECK-NEXT: bb:546; CHECK-NEXT: ret i1 false547;548bb:549 %i = zext i1 %arg to i32550 %i2 = sext i1 %arg1 to i32551 %i3 = add i32 %i, %i2552 %t = icmp eq i32 %i3, -2553 ret i1 %t554}555 556define <2 x i1> @cvt_icmp_neg_2_zext_plus_sext_eq_vec(<2 x i1> %arg, <2 x i1> %arg1) {557; CHECK-LABEL: @cvt_icmp_neg_2_zext_plus_sext_eq_vec(558; CHECK-NEXT: bb:559; CHECK-NEXT: ret <2 x i1> zeroinitializer560;561bb:562 %i = zext <2 x i1> %arg to <2 x i32>563 %i2 = sext <2 x i1> %arg1 to <2 x i32>564 %i3 = add nsw <2 x i32> %i2, %i565 %i4 = icmp eq <2 x i32> %i3, <i32 2, i32 2>566 ret <2 x i1> %i4567}568 569define i1 @cvt_icmp_neg_1_zext_plus_sext_eq(i1 %arg, i1 %arg1) {570; CHECK-LABEL: @cvt_icmp_neg_1_zext_plus_sext_eq(571; CHECK-NEXT: bb:572; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true573; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]574; CHECK-NEXT: ret i1 [[T]]575;576bb:577 %i = zext i1 %arg to i32578 %i2 = sext i1 %arg1 to i32579 %i3 = add i32 %i, %i2580 %t = icmp eq i32 %i3, -1581 ret i1 %t582}583 584define i1 @cvt_icmp_0_zext_plus_sext_eq(i1 %arg, i1 %arg1) {585; CHECK-LABEL: @cvt_icmp_0_zext_plus_sext_eq(586; CHECK-NEXT: bb:587; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]588; CHECK-NEXT: [[T:%.*]] = xor i1 [[TMP0]], true589; CHECK-NEXT: ret i1 [[T]]590;591bb:592 %i = zext i1 %arg to i32593 %i2 = sext i1 %arg1 to i32594 %i3 = add i32 %i, %i2595 %t = icmp eq i32 %i3, 0596 ret i1 %t597}598 599define i1 @cvt_icmp_1_zext_plus_sext_eq(i1 %arg, i1 %arg1) {600; CHECK-LABEL: @cvt_icmp_1_zext_plus_sext_eq(601; CHECK-NEXT: bb:602; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true603; CHECK-NEXT: [[T:%.*]] = and i1 [[ARG:%.*]], [[TMP0]]604; CHECK-NEXT: ret i1 [[T]]605;606bb:607 %i = zext i1 %arg to i32608 %i2 = sext i1 %arg1 to i32609 %i3 = add i32 %i, %i2610 %t = icmp eq i32 %i3, 1611 ret i1 %t612}613 614define i1 @cvt_icmp_2_zext_plus_sext_eq(i1 %arg, i1 %arg1) {615; CHECK-LABEL: @cvt_icmp_2_zext_plus_sext_eq(616; CHECK-NEXT: bb:617; CHECK-NEXT: ret i1 false618;619bb:620 %i = zext i1 %arg to i32621 %i2 = sext i1 %arg1 to i32622 %i3 = add i32 %i, %i2623 %t = icmp eq i32 %i3, 2624 ret i1 %t625}626 627define i1 @cvt_icmp_neg_2_zext_plus_sext_ne(i1 %arg, i1 %arg1) {628; CHECK-LABEL: @cvt_icmp_neg_2_zext_plus_sext_ne(629; CHECK-NEXT: bb:630; CHECK-NEXT: ret i1 true631;632bb:633 %i = zext i1 %arg to i32634 %i2 = sext i1 %arg1 to i32635 %i3 = add i32 %i, %i2636 %t = icmp ne i32 %i3, -2637 ret i1 %t638}639 640define i1 @cvt_icmp_neg_1_zext_plus_sext_ne(i1 %arg, i1 %arg1) {641; CHECK-LABEL: @cvt_icmp_neg_1_zext_plus_sext_ne(642; CHECK-NEXT: bb:643; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true644; CHECK-NEXT: [[T:%.*]] = or i1 [[ARG:%.*]], [[TMP0]]645; CHECK-NEXT: ret i1 [[T]]646;647bb:648 %i = zext i1 %arg to i32649 %i2 = sext i1 %arg1 to i32650 %i3 = add i32 %i, %i2651 %t = icmp ne i32 %i3, -1652 ret i1 %t653}654 655define i1 @cvt_icmp_0_zext_plus_sext_ne(i1 %arg, i1 %arg1) {656; CHECK-LABEL: @cvt_icmp_0_zext_plus_sext_ne(657; CHECK-NEXT: bb:658; CHECK-NEXT: [[T:%.*]] = xor i1 [[ARG:%.*]], [[ARG1:%.*]]659; CHECK-NEXT: ret i1 [[T]]660;661bb:662 %i = zext i1 %arg to i32663 %i2 = sext i1 %arg1 to i32664 %i3 = add i32 %i, %i2665 %t = icmp ne i32 %i3, 0666 ret i1 %t667}668 669define i1 @cvt_icmp_1_zext_plus_sext_ne(i1 %arg, i1 %arg1) {670; CHECK-LABEL: @cvt_icmp_1_zext_plus_sext_ne(671; CHECK-NEXT: bb:672; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true673; CHECK-NEXT: [[T:%.*]] = or i1 [[ARG1:%.*]], [[TMP0]]674; CHECK-NEXT: ret i1 [[T]]675;676bb:677 %i = zext i1 %arg to i32678 %i2 = sext i1 %arg1 to i32679 %i3 = add i32 %i, %i2680 %t = icmp ne i32 %i3, 1681 ret i1 %t682}683 684define i1 @cvt_icmp_2_zext_plus_sext_ne(i1 %arg, i1 %arg1) {685; CHECK-LABEL: @cvt_icmp_2_zext_plus_sext_ne(686; CHECK-NEXT: bb:687; CHECK-NEXT: ret i1 true688;689bb:690 %i = zext i1 %arg to i32691 %i2 = sext i1 %arg1 to i32692 %i3 = add i32 %i, %i2693 %t = icmp ne i32 %i3, 2694 ret i1 %t695}696 697; test zext/zext additions with more than one use698 699define i1 @test_cvt_icmp1(i1 %arg, i1 %arg1, ptr %p) {700; CHECK-LABEL: @test_cvt_icmp1(701; CHECK-NEXT: bb:702; CHECK-NEXT: [[I2:%.*]] = zext i1 [[ARG:%.*]] to i32703; CHECK-NEXT: store i32 [[I2]], ptr [[P:%.*]], align 4704; CHECK-NEXT: ret i1 false705;706bb:707 %i = zext i1 %arg to i32708 %i2 = zext i1 %arg to i32709 store i32 %i2, ptr %p710 %i3 = load i32, ptr %p711 %i4 = add i32 %i3, %i712 %t = icmp eq i32 %i4, 1713 ret i1 %t714}715 716define i1 @test_cvt_icmp2(i1 %arg, i1 %arg1, ptr %p) {717; CHECK-LABEL: @test_cvt_icmp2(718; CHECK-NEXT: bb:719; CHECK-NEXT: [[I2:%.*]] = zext i1 [[ARG:%.*]] to i32720; CHECK-NEXT: store i32 [[I2]], ptr [[P:%.*]], align 4721; CHECK-NEXT: ret i1 false722;723bb:724 %i = sext i1 %arg to i32725 %i2 = zext i1 %arg to i32726 store i32 %i2, ptr %p727 %i3 = load i32, ptr %p728 %i4 = add i32 %i3, %i729 %t = icmp eq i32 %i4, 1730 ret i1 %t731}732 733; tests for ult734define i1 @test_zext_zext_cvt_neg_2_ult_icmp(i1 %arg, i1 %arg1) {735; CHECK-LABEL: @test_zext_zext_cvt_neg_2_ult_icmp(736; CHECK-NEXT: bb:737; CHECK-NEXT: ret i1 true738;739bb:740 %i = zext i1 %arg to i32741 %i2 = zext i1 %arg1 to i32742 %i3 = add i32 %i2, %i743 %i4 = icmp ult i32 %i3, -2744 ret i1 %i4745}746 747define i1 @test_zext_zext_cvt_neg_1_ult_icmp(i1 %arg, i1 %arg1) {748; CHECK-LABEL: @test_zext_zext_cvt_neg_1_ult_icmp(749; CHECK-NEXT: bb:750; CHECK-NEXT: ret i1 true751;752bb:753 %i = zext i1 %arg to i32754 %i2 = zext i1 %arg1 to i32755 %i3 = add i32 %i2, %i756 %i4 = icmp ult i32 %i3, -1757 ret i1 %i4758}759 760define i1 @test_zext_zext_cvt_0_ult_icmp(i1 %arg, i1 %arg1) {761; CHECK-LABEL: @test_zext_zext_cvt_0_ult_icmp(762; CHECK-NEXT: bb:763; CHECK-NEXT: ret i1 false764;765bb:766 %i = zext i1 %arg to i32767 %i2 = zext i1 %arg1 to i32768 %i3 = add i32 %i2, %i769 %i4 = icmp ult i32 %i3, 0770 ret i1 %i4771}772 773define i1 @test_zext_zext_cvt_2_ult_icmp(i1 %arg, i1 %arg1) {774; CHECK-LABEL: @test_zext_zext_cvt_2_ult_icmp(775; CHECK-NEXT: bb:776; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]777; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true778; CHECK-NEXT: ret i1 [[I4]]779;780bb:781 %i = zext i1 %arg to i32782 %i2 = zext i1 %arg1 to i32783 %i3 = add i32 %i2, %i784 %i4 = icmp ult i32 %i3, 2785 ret i1 %i4786}787 788define i1 @test_sext_sext_cvt_neg_2_ult_icmp(i1 %arg, i1 %arg1) {789; CHECK-LABEL: @test_sext_sext_cvt_neg_2_ult_icmp(790; CHECK-NEXT: bb:791; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]792; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true793; CHECK-NEXT: ret i1 [[I4]]794;795bb:796 %i = sext i1 %arg to i32797 %i2 = sext i1 %arg1 to i32798 %i3 = add i32 %i2, %i799 %i4 = icmp ult i32 %i3, -2800 ret i1 %i4801}802 803define i1 @test_sext_sext_cvt_neg_1_ult_icmp(i1 %arg, i1 %arg1) {804; CHECK-LABEL: @test_sext_sext_cvt_neg_1_ult_icmp(805; CHECK-NEXT: bb:806; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]807; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true808; CHECK-NEXT: ret i1 [[I4]]809;810bb:811 %i = sext i1 %arg to i32812 %i2 = sext i1 %arg1 to i32813 %i3 = add i32 %i2, %i814 %i4 = icmp ult i32 %i3, -1815 ret i1 %i4816}817 818define i1 @test_sext_sext_cvt_0_ult_icmp(i1 %arg, i1 %arg1) {819; CHECK-LABEL: @test_sext_sext_cvt_0_ult_icmp(820; CHECK-NEXT: bb:821; CHECK-NEXT: ret i1 false822;823bb:824 %i = sext i1 %arg to i32825 %i2 = sext i1 %arg1 to i32826 %i3 = add i32 %i2, %i827 %i4 = icmp ult i32 %i3, 0828 ret i1 %i4829}830 831define i1 @test_sext_sext_cvt_1_ult_icmp(i1 %arg, i1 %arg1) {832; CHECK-LABEL: @test_sext_sext_cvt_1_ult_icmp(833; CHECK-NEXT: bb:834; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]835; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true836; CHECK-NEXT: ret i1 [[I4]]837;838bb:839 %i = sext i1 %arg to i32840 %i2 = sext i1 %arg1 to i32841 %i3 = add i32 %i2, %i842 %i4 = icmp ult i32 %i3, 1843 ret i1 %i4844}845 846define i1 @test_sext_sext_cvt_2_ult_icmp(i1 %arg, i1 %arg1) {847; CHECK-LABEL: @test_sext_sext_cvt_2_ult_icmp(848; CHECK-NEXT: bb:849; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]850; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true851; CHECK-NEXT: ret i1 [[I4]]852;853bb:854 %i = sext i1 %arg to i32855 %i2 = sext i1 %arg1 to i32856 %i3 = add i32 %i2, %i857 %i4 = icmp ult i32 %i3, 2858 ret i1 %i4859}860 861define i1 @test_sext_zext_cvt_neg_2_ult_icmp(i1 %arg, i1 %arg1) {862; CHECK-LABEL: @test_sext_zext_cvt_neg_2_ult_icmp(863; CHECK-NEXT: bb:864; CHECK-NEXT: [[ARG_NOT:%.*]] = xor i1 [[ARG:%.*]], true865; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG_NOT]]866; CHECK-NEXT: ret i1 [[I4]]867;868bb:869 %i = sext i1 %arg to i32870 %i2 = zext i1 %arg1 to i32871 %i3 = add i32 %i2, %i872 %i4 = icmp ult i32 %i3, -2873 ret i1 %i4874}875 876define i1 @test_sext_zext_cvt_neg_1_ult_icmp(i1 %arg, i1 %arg1) {877; CHECK-LABEL: @test_sext_zext_cvt_neg_1_ult_icmp(878; CHECK-NEXT: bb:879; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true880; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[TMP0]]881; CHECK-NEXT: ret i1 [[I4]]882;883bb:884 %i = sext i1 %arg to i32885 %i2 = zext i1 %arg1 to i32886 %i3 = add i32 %i2, %i887 %i4 = icmp ult i32 %i3, -1888 ret i1 %i4889}890 891define i1 @test_sext_zext_cvt_0_ult_icmp(i1 %arg, i1 %arg1) {892; CHECK-LABEL: @test_sext_zext_cvt_0_ult_icmp(893; CHECK-NEXT: bb:894; CHECK-NEXT: ret i1 false895;896bb:897 %i = sext i1 %arg to i32898 %i2 = zext i1 %arg1 to i32899 %i3 = add i32 %i2, %i900 %i4 = icmp ult i32 %i3, 0901 ret i1 %i4902}903 904define i1 @test_sext_zext_cvt_2_ult_icmp(i1 %arg, i1 %arg1) {905; CHECK-LABEL: @test_sext_zext_cvt_2_ult_icmp(906; CHECK-NEXT: bb:907; CHECK-NEXT: [[ARG_NOT:%.*]] = xor i1 [[ARG:%.*]], true908; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG_NOT]]909; CHECK-NEXT: ret i1 [[I4]]910;911bb:912 %i = sext i1 %arg to i32913 %i2 = zext i1 %arg1 to i32914 %i3 = add i32 %i2, %i915 %i4 = icmp ult i32 %i3, 2916 ret i1 %i4917}918 919define i1 @test_zext_sext_cvt_neg_1_ult_icmp(i1 %arg, i1 %arg1) {920; CHECK-LABEL: @test_zext_sext_cvt_neg_1_ult_icmp(921; CHECK-NEXT: bb:922; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true923; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG:%.*]], [[TMP0]]924; CHECK-NEXT: ret i1 [[I4]]925;926bb:927 %i = zext i1 %arg to i32928 %i2 = sext i1 %arg1 to i32929 %i3 = add i32 %i2, %i930 %i4 = icmp ult i32 %i3, -1931 ret i1 %i4932}933 934define i1 @test_zext_sext_cvt_0_ult_icmp(i1 %arg, i1 %arg1) {935; CHECK-LABEL: @test_zext_sext_cvt_0_ult_icmp(936; CHECK-NEXT: bb:937; CHECK-NEXT: ret i1 false938;939bb:940 %i = zext i1 %arg to i32941 %i2 = sext i1 %arg1 to i32942 %i3 = add i32 %i2, %i943 %i4 = icmp ult i32 %i3, 0944 ret i1 %i4945}946 947define i1 @test_zext_sext_cvt_1_ult_icmp(i1 %arg, i1 %arg1) {948; CHECK-LABEL: @test_zext_sext_cvt_1_ult_icmp(949; CHECK-NEXT: bb:950; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]951; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true952; CHECK-NEXT: ret i1 [[I4]]953;954bb:955 %i = zext i1 %arg to i32956 %i2 = sext i1 %arg1 to i32957 %i3 = add i32 %i2, %i958 %i4 = icmp ult i32 %i3, 1959 ret i1 %i4960}961 962; tests for ugt963define i1 @test_cvt_icmp4(i1 %arg, i1 %arg1) {964; CHECK-LABEL: @test_cvt_icmp4(965; CHECK-NEXT: bb:966; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]967; CHECK-NEXT: ret i1 [[I4]]968;969bb:970 %i = zext i1 %arg to i32971 %i2 = zext i1 %arg1 to i32972 %i3 = add i32 %i2, %i973 %i4 = icmp ugt i32 %i3, 0974 ret i1 %i4975}976 977define i1 @test_zext_zext_cvt_neg_2_ugt_icmp(i1 %arg, i1 %arg1) {978; CHECK-LABEL: @test_zext_zext_cvt_neg_2_ugt_icmp(979; CHECK-NEXT: bb:980; CHECK-NEXT: ret i1 false981;982bb:983 %i = zext i1 %arg to i32984 %i2 = zext i1 %arg1 to i32985 %i3 = add i32 %i2, %i986 %i4 = icmp ugt i32 %i3, -2987 ret i1 %i4988}989 990define i1 @test_zext_zext_cvt_1_ugt_icmp(i1 %arg, i1 %arg1) {991; CHECK-LABEL: @test_zext_zext_cvt_1_ugt_icmp(992; CHECK-NEXT: bb:993; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]994; CHECK-NEXT: ret i1 [[I4]]995;996bb:997 %i = zext i1 %arg to i32998 %i2 = zext i1 %arg1 to i32999 %i3 = add i32 %i2, %i1000 %i4 = icmp ugt i32 %i3, 11001 ret i1 %i41002}1003 1004define i1 @test_zext_zext_cvt_2_ugt_icmp(i1 %arg, i1 %arg1) {1005; CHECK-LABEL: @test_zext_zext_cvt_2_ugt_icmp(1006; CHECK-NEXT: bb:1007; CHECK-NEXT: ret i1 false1008;1009bb:1010 %i = zext i1 %arg to i321011 %i2 = zext i1 %arg1 to i321012 %i3 = add i32 %i2, %i1013 %i4 = icmp ugt i32 %i3, 21014 ret i1 %i41015}1016 1017define i1 @test_sext_sext_cvt_neg_2_ugt_icmp(i1 %arg, i1 %arg1) {1018; CHECK-LABEL: @test_sext_sext_cvt_neg_2_ugt_icmp(1019; CHECK-NEXT: bb:1020; CHECK-NEXT: [[I4:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]1021; CHECK-NEXT: ret i1 [[I4]]1022;1023bb:1024 %i = sext i1 %arg to i321025 %i2 = sext i1 %arg1 to i321026 %i3 = add i32 %i2, %i1027 %i4 = icmp ugt i32 %i3, -21028 ret i1 %i41029}1030 1031define i1 @test_sext_sext_cvt_0_ugt_icmp(i1 %arg, i1 %arg1) {1032; CHECK-LABEL: @test_sext_sext_cvt_0_ugt_icmp(1033; CHECK-NEXT: bb:1034; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1035; CHECK-NEXT: ret i1 [[I4]]1036;1037bb:1038 %i = sext i1 %arg to i321039 %i2 = sext i1 %arg1 to i321040 %i3 = add i32 %i2, %i1041 %i4 = icmp ugt i32 %i3, 01042 ret i1 %i41043}1044 1045define i1 @test_sext_sext_cvt_2_ugt_icmp(i1 %arg, i1 %arg1) {1046; CHECK-LABEL: @test_sext_sext_cvt_2_ugt_icmp(1047; CHECK-NEXT: bb:1048; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1049; CHECK-NEXT: ret i1 [[I4]]1050;1051bb:1052 %i = sext i1 %arg to i321053 %i2 = sext i1 %arg1 to i321054 %i3 = add i32 %i2, %i1055 %i4 = icmp ugt i32 %i3, 21056 ret i1 %i41057}1058 1059define i1 @test_zext_sext_cvt_neg_2_ugt_icmp(i1 %arg, i1 %arg1) {1060; CHECK-LABEL: @test_zext_sext_cvt_neg_2_ugt_icmp(1061; CHECK-NEXT: bb:1062; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1063; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]1064; CHECK-NEXT: ret i1 [[I4]]1065;1066bb:1067 %i = zext i1 %arg to i321068 %i2 = sext i1 %arg1 to i321069 %i3 = add i32 %i2, %i1070 %i4 = icmp ugt i32 %i3, -21071 ret i1 %i41072}1073 1074define i1 @test_zext_sext_cvt_neg_1_ugt_icmp(i1 %arg, i1 %arg1) {1075; CHECK-LABEL: @test_zext_sext_cvt_neg_1_ugt_icmp(1076; CHECK-NEXT: bb:1077; CHECK-NEXT: ret i1 false1078;1079bb:1080 %i = zext i1 %arg to i321081 %i2 = sext i1 %arg1 to i321082 %i3 = add i32 %i2, %i1083 %i4 = icmp ugt i32 %i3, -11084 ret i1 %i41085}1086 1087define i1 @test_zext_sext_cvt_0_ugt_icmp(i1 %arg, i1 %arg1) {1088; CHECK-LABEL: @test_zext_sext_cvt_0_ugt_icmp(1089; CHECK-NEXT: bb:1090; CHECK-NEXT: [[I4:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]1091; CHECK-NEXT: ret i1 [[I4]]1092;1093bb:1094 %i = zext i1 %arg to i321095 %i2 = sext i1 %arg1 to i321096 %i3 = add i32 %i2, %i1097 %i4 = icmp ugt i32 %i3, 01098 ret i1 %i41099}1100 1101define i1 @test_zext_sext_cvt_1_ugt_icmp(i1 %arg, i1 %arg1) {1102; CHECK-LABEL: @test_zext_sext_cvt_1_ugt_icmp(1103; CHECK-NEXT: bb:1104; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1105; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]1106; CHECK-NEXT: ret i1 [[TMP1]]1107;1108bb:1109 %i = zext i1 %arg to i321110 %i2 = sext i1 %arg1 to i321111 %i3 = add i32 %i2, %i1112 %i4 = icmp ugt i32 %i3, 11113 ret i1 %i41114}1115 1116define i1 @test_zext_sext_cvt_2_ugt_icmp(i1 %arg, i1 %arg1) {1117; CHECK-LABEL: @test_zext_sext_cvt_2_ugt_icmp(1118; CHECK-NEXT: bb:1119; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1120; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]1121; CHECK-NEXT: ret i1 [[I4]]1122;1123bb:1124 %i = zext i1 %arg to i321125 %i2 = sext i1 %arg1 to i321126 %i3 = add i32 %i2, %i1127 %i4 = icmp ugt i32 %i3, 21128 ret i1 %i41129}1130 1131define i1 @test_cvt_icmp5(i1 %arg, i1 %arg1) {1132; CHECK-LABEL: @test_cvt_icmp5(1133; CHECK-NEXT: bb:1134; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1135; CHECK-NEXT: ret i1 [[I4]]1136;1137bb:1138 %i = zext i1 %arg to i321139 %i2 = zext i1 %arg1 to i321140 %i3 = add i32 %i2, %i1141 %i4 = icmp uge i32 %i3, 11142 ret i1 %i41143}1144 1145define i1 @test_cvt_icmp6(i1 %arg, i1 %arg1) {1146; CHECK-LABEL: @test_cvt_icmp6(1147; CHECK-NEXT: bb:1148; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]1149; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1150; CHECK-NEXT: ret i1 [[I4]]1151;1152bb:1153 %i = zext i1 %arg to i321154 %i2 = zext i1 %arg1 to i321155 %i3 = add i32 %i2, %i1156 %i4 = icmp ule i32 %i3, 11157 ret i1 %i41158}1159 1160; tests for sgt1161define i1 @test_cvt_icmp7(i1 %arg, i1 %arg1) {1162; CHECK-LABEL: @test_cvt_icmp7(1163; CHECK-NEXT: bb:1164; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]1165; CHECK-NEXT: ret i1 [[I4]]1166;1167bb:1168 %i = zext i1 %arg to i321169 %i2 = zext i1 %arg1 to i321170 %i3 = add i32 %i2, %i1171 %i4 = icmp sgt i32 %i3, 11172 ret i1 %i41173}1174 1175define i1 @test_zext_zext_cvt_neg_2_sgt_icmp(i1 %arg, i1 %arg1) {1176; CHECK-LABEL: @test_zext_zext_cvt_neg_2_sgt_icmp(1177; CHECK-NEXT: bb:1178; CHECK-NEXT: ret i1 true1179;1180bb:1181 %i = zext i1 %arg to i321182 %i2 = zext i1 %arg1 to i321183 %i3 = add i32 %i2, %i1184 %i4 = icmp sgt i32 %i3, -21185 ret i1 %i41186}1187 1188define i1 @test_zext_zext_cvt_neg_1_sgt_icmp(i1 %arg, i1 %arg1) {1189; CHECK-LABEL: @test_zext_zext_cvt_neg_1_sgt_icmp(1190; CHECK-NEXT: bb:1191; CHECK-NEXT: ret i1 true1192;1193bb:1194 %i = zext i1 %arg to i321195 %i2 = zext i1 %arg1 to i321196 %i3 = add i32 %i2, %i1197 %i4 = icmp sgt i32 %i3, -11198 ret i1 %i41199}1200 1201define i1 @test_zext_zext_cvt_2_sgt_icmp(i1 %arg, i1 %arg1) {1202; CHECK-LABEL: @test_zext_zext_cvt_2_sgt_icmp(1203; CHECK-NEXT: bb:1204; CHECK-NEXT: ret i1 false1205;1206bb:1207 %i = zext i1 %arg to i321208 %i2 = zext i1 %arg1 to i321209 %i3 = add i32 %i2, %i1210 %i4 = icmp sgt i32 %i3, 21211 ret i1 %i41212}1213 1214define i1 @test_sext_sext_cvt_neg_2_sgt_icmp(i1 %arg, i1 %arg1) {1215; CHECK-LABEL: @test_sext_sext_cvt_neg_2_sgt_icmp(1216; CHECK-NEXT: bb:1217; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]1218; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1219; CHECK-NEXT: ret i1 [[I4]]1220;1221bb:1222 %i = sext i1 %arg to i321223 %i2 = sext i1 %arg1 to i321224 %i3 = add i32 %i2, %i1225 %i4 = icmp sgt i32 %i3, -21226 ret i1 %i41227}1228 1229define i1 @test_sext_sext_cvt_0_sgt_icmp(i1 %arg, i1 %arg1) {1230; CHECK-LABEL: @test_sext_sext_cvt_0_sgt_icmp(1231; CHECK-NEXT: bb:1232; CHECK-NEXT: ret i1 false1233;1234bb:1235 %i = sext i1 %arg to i321236 %i2 = sext i1 %arg1 to i321237 %i3 = add i32 %i2, %i1238 %i4 = icmp sgt i32 %i3, 01239 ret i1 %i41240}1241 1242define i1 @test_sext_sext_cvt_2_sgt_icmp(i1 %arg, i1 %arg1) {1243; CHECK-LABEL: @test_sext_sext_cvt_2_sgt_icmp(1244; CHECK-NEXT: bb:1245; CHECK-NEXT: ret i1 false1246;1247bb:1248 %i = sext i1 %arg to i321249 %i2 = sext i1 %arg1 to i321250 %i3 = add i32 %i2, %i1251 %i4 = icmp sgt i32 %i3, 21252 ret i1 %i41253}1254 1255define i1 @test_zext_sext_cvt_neg_2_sgt_icmp(i1 %arg, i1 %arg1) {1256; CHECK-LABEL: @test_zext_sext_cvt_neg_2_sgt_icmp(1257; CHECK-NEXT: bb:1258; CHECK-NEXT: ret i1 true1259;1260bb:1261 %i = zext i1 %arg to i321262 %i2 = sext i1 %arg1 to i321263 %i3 = add i32 %i2, %i1264 %i4 = icmp sgt i32 %i3, -21265 ret i1 %i41266}1267 1268define i1 @test_zext_sext_cvt_neg_1_sgt_icmp(i1 %arg, i1 %arg1) {1269; CHECK-LABEL: @test_zext_sext_cvt_neg_1_sgt_icmp(1270; CHECK-NEXT: bb:1271; CHECK-NEXT: [[ARG1_NOT:%.*]] = xor i1 [[ARG1:%.*]], true1272; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG:%.*]], [[ARG1_NOT]]1273; CHECK-NEXT: ret i1 [[I4]]1274;1275bb:1276 %i = zext i1 %arg to i321277 %i2 = sext i1 %arg1 to i321278 %i3 = add i32 %i2, %i1279 %i4 = icmp sgt i32 %i3, -11280 ret i1 %i41281}1282 1283define i1 @test_zext_sext_cvt_0_sgt_icmp(i1 %arg, i1 %arg1) {1284; CHECK-LABEL: @test_zext_sext_cvt_0_sgt_icmp(1285; CHECK-NEXT: bb:1286; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true1287; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG:%.*]], [[TMP0]]1288; CHECK-NEXT: ret i1 [[I4]]1289;1290bb:1291 %i = zext i1 %arg to i321292 %i2 = sext i1 %arg1 to i321293 %i3 = add i32 %i2, %i1294 %i4 = icmp sgt i32 %i3, 01295 ret i1 %i41296}1297 1298define i1 @test_zext_sext_cvt_1_sgt_icmp(i1 %arg, i1 %arg1) {1299; CHECK-LABEL: @test_zext_sext_cvt_1_sgt_icmp(1300; CHECK-NEXT: bb:1301; CHECK-NEXT: ret i1 false1302;1303bb:1304 %i = zext i1 %arg to i321305 %i2 = sext i1 %arg1 to i321306 %i3 = add i32 %i2, %i1307 %i4 = icmp sgt i32 %i3, 11308 ret i1 %i41309}1310 1311define i1 @test_zext_sext_cvt_2_sgt_icmp(i1 %arg, i1 %arg1) {1312; CHECK-LABEL: @test_zext_sext_cvt_2_sgt_icmp(1313; CHECK-NEXT: bb:1314; CHECK-NEXT: ret i1 false1315;1316bb:1317 %i = zext i1 %arg to i321318 %i2 = sext i1 %arg1 to i321319 %i3 = add i32 %i2, %i1320 %i4 = icmp sgt i32 %i3, 21321 ret i1 %i41322}1323 1324; tests for slt1325define i1 @test_zext_zext_cvt_neg_2_slt_icmp(i1 %arg, i1 %arg1) {1326; CHECK-LABEL: @test_zext_zext_cvt_neg_2_slt_icmp(1327; CHECK-NEXT: bb:1328; CHECK-NEXT: ret i1 false1329;1330bb:1331 %i = zext i1 %arg to i321332 %i2 = zext i1 %arg1 to i321333 %i3 = add i32 %i2, %i1334 %i4 = icmp slt i32 %i3, -21335 ret i1 %i41336}1337 1338define i1 @test_zext_zext_cvt_neg_1_slt_icmp(i1 %arg, i1 %arg1) {1339; CHECK-LABEL: @test_zext_zext_cvt_neg_1_slt_icmp(1340; CHECK-NEXT: bb:1341; CHECK-NEXT: ret i1 false1342;1343bb:1344 %i = zext i1 %arg to i321345 %i2 = zext i1 %arg1 to i321346 %i3 = add i32 %i2, %i1347 %i4 = icmp slt i32 %i3, -11348 ret i1 %i41349}1350 1351define i1 @test_zext_zext_cvt_2_slt_icmp(i1 %arg, i1 %arg1) {1352; CHECK-LABEL: @test_zext_zext_cvt_2_slt_icmp(1353; CHECK-NEXT: bb:1354; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]1355; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1356; CHECK-NEXT: ret i1 [[I4]]1357;1358bb:1359 %i = zext i1 %arg to i321360 %i2 = zext i1 %arg1 to i321361 %i3 = add i32 %i2, %i1362 %i4 = icmp slt i32 %i3, 21363 ret i1 %i41364}1365 1366define i1 @test_sext_sext_cvt_neg_2_slt_icmp(i1 %arg, i1 %arg1) {1367; CHECK-LABEL: @test_sext_sext_cvt_neg_2_slt_icmp(1368; CHECK-NEXT: bb:1369; CHECK-NEXT: ret i1 false1370;1371bb:1372 %i = sext i1 %arg to i321373 %i2 = sext i1 %arg1 to i321374 %i3 = add i32 %i2, %i1375 %i4 = icmp slt i32 %i3, -21376 ret i1 %i41377}1378 1379define i1 @test_sext_sext_cvt_0_slt_icmp(i1 %arg, i1 %arg1) {1380; CHECK-LABEL: @test_sext_sext_cvt_0_slt_icmp(1381; CHECK-NEXT: bb:1382; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1383; CHECK-NEXT: ret i1 [[TMP0]]1384;1385bb:1386 %i = sext i1 %arg to i321387 %i2 = sext i1 %arg1 to i321388 %i3 = add i32 %i2, %i1389 %i4 = icmp slt i32 %i3, 01390 ret i1 %i41391}1392 1393define i1 @test_sext_sext_cvt_2_slt_icmp(i1 %arg, i1 %arg1) {1394; CHECK-LABEL: @test_sext_sext_cvt_2_slt_icmp(1395; CHECK-NEXT: bb:1396; CHECK-NEXT: ret i1 true1397;1398bb:1399 %i = sext i1 %arg to i321400 %i2 = sext i1 %arg1 to i321401 %i3 = add i32 %i2, %i1402 %i4 = icmp slt i32 %i3, 21403 ret i1 %i41404}1405 1406define i1 @test_zext_sext_cvt_neg_2_slt_icmp(i1 %arg, i1 %arg1) {1407; CHECK-LABEL: @test_zext_sext_cvt_neg_2_slt_icmp(1408; CHECK-NEXT: bb:1409; CHECK-NEXT: ret i1 false1410;1411bb:1412 %i = zext i1 %arg to i321413 %i2 = sext i1 %arg1 to i321414 %i3 = add i32 %i2, %i1415 %i4 = icmp slt i32 %i3, -21416 ret i1 %i41417}1418 1419define i1 @test_zext_sext_cvt_neg_1_slt_icmp(i1 %arg, i1 %arg1) {1420; CHECK-LABEL: @test_zext_sext_cvt_neg_1_slt_icmp(1421; CHECK-NEXT: bb:1422; CHECK-NEXT: ret i1 false1423;1424bb:1425 %i = zext i1 %arg to i321426 %i2 = sext i1 %arg1 to i321427 %i3 = add i32 %i2, %i1428 %i4 = icmp slt i32 %i3, -11429 ret i1 %i41430}1431 1432define i1 @test_zext_sext_cvt_0_slt_icmp(i1 %arg, i1 %arg1) {1433; CHECK-LABEL: @test_zext_sext_cvt_0_slt_icmp(1434; CHECK-NEXT: bb:1435; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1436; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[ARG1:%.*]], [[TMP0]]1437; CHECK-NEXT: ret i1 [[TMP1]]1438;1439bb:1440 %i = zext i1 %arg to i321441 %i2 = sext i1 %arg1 to i321442 %i3 = add i32 %i2, %i1443 %i4 = icmp slt i32 %i3, 01444 ret i1 %i41445}1446 1447define i1 @test_zext_sext_cvt_1_slt_icmp(i1 %arg, i1 %arg1) {1448; CHECK-LABEL: @test_zext_sext_cvt_1_slt_icmp(1449; CHECK-NEXT: bb:1450; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1451; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[TMP0]]1452; CHECK-NEXT: ret i1 [[I4]]1453;1454bb:1455 %i = zext i1 %arg to i321456 %i2 = sext i1 %arg1 to i321457 %i3 = add i32 %i2, %i1458 %i4 = icmp slt i32 %i3, 11459 ret i1 %i41460}1461 1462define i1 @test_zext_sext_cvt_2_slt_icmp(i1 %arg, i1 %arg1) {1463; CHECK-LABEL: @test_zext_sext_cvt_2_slt_icmp(1464; CHECK-NEXT: bb:1465; CHECK-NEXT: ret i1 true1466;1467bb:1468 %i = zext i1 %arg to i321469 %i2 = sext i1 %arg1 to i321470 %i3 = add i32 %i2, %i1471 %i4 = icmp slt i32 %i3, 21472 ret i1 %i41473}1474 1475define i1 @test_cvt_icmp8(i1 %arg, i1 %arg1) {1476; CHECK-LABEL: @test_cvt_icmp8(1477; CHECK-NEXT: bb:1478; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1479; CHECK-NEXT: ret i1 [[I4]]1480;1481bb:1482 %i = zext i1 %arg to i321483 %i2 = zext i1 %arg1 to i321484 %i3 = add i32 %i2, %i1485 %i4 = icmp sge i32 %i3, 11486 ret i1 %i41487}1488 1489define i1 @test_cvt_icmp9(i1 %arg, i1 %arg1) {1490; CHECK-LABEL: @test_cvt_icmp9(1491; CHECK-NEXT: bb:1492; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1493; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1494; CHECK-NEXT: ret i1 [[I4]]1495;1496bb:1497 %i = zext i1 %arg to i321498 %i2 = zext i1 %arg1 to i321499 %i3 = add i32 %i2, %i1500 %i4 = icmp slt i32 %i3, 11501 ret i1 %i41502}1503 1504define i1 @test_cvt_icmp10(i1 %arg, i1 %arg1) {1505; CHECK-LABEL: @test_cvt_icmp10(1506; CHECK-NEXT: bb:1507; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[ARG1:%.*]], [[ARG:%.*]]1508; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1509; CHECK-NEXT: ret i1 [[I4]]1510;1511bb:1512 %i = zext i1 %arg to i321513 %i2 = zext i1 %arg1 to i321514 %i3 = add i32 %i2, %i1515 %i4 = icmp sle i32 %i3, 11516 ret i1 %i41517}1518 1519define i1 @test_cvt_icmp11(i1 %arg, i1 %arg1) {1520; CHECK-LABEL: @test_cvt_icmp11(1521; CHECK-NEXT: bb:1522; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1523; CHECK-NEXT: ret i1 [[I4]]1524;1525bb:1526 %i = sext i1 %arg to i321527 %i2 = sext i1 %arg1 to i321528 %i3 = add i32 %i2, %i1529 %i4 = icmp ugt i32 %i3, 21530 ret i1 %i41531}1532 1533define i1 @test_cvt_icmp12(i1 %arg, i1 %arg1) {1534; CHECK-LABEL: @test_cvt_icmp12(1535; CHECK-NEXT: bb:1536; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1537; CHECK-NEXT: ret i1 [[I4]]1538;1539bb:1540 %i = sext i1 %arg to i321541 %i2 = sext i1 %arg1 to i321542 %i3 = add i32 %i2, %i1543 %i4 = icmp uge i32 %i3, 11544 ret i1 %i41545}1546 1547define i1 @test_cvt_icmp13(i1 %arg, i1 %arg1) {1548; CHECK-LABEL: @test_cvt_icmp13(1549; CHECK-NEXT: bb:1550; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1551; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1552; CHECK-NEXT: ret i1 [[I4]]1553;1554bb:1555 %i = sext i1 %arg to i321556 %i2 = sext i1 %arg1 to i321557 %i3 = add i32 %i2, %i1558 %i4 = icmp ult i32 %i3, 11559 ret i1 %i41560}1561 1562define i1 @test_cvt_icmp14(i1 %arg, i1 %arg1) {1563; CHECK-LABEL: @test_cvt_icmp14(1564; CHECK-NEXT: bb:1565; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[ARG1:%.*]], [[ARG:%.*]]1566; CHECK-NEXT: [[I4:%.*]] = xor i1 [[TMP0]], true1567; CHECK-NEXT: ret i1 [[I4]]1568;1569bb:1570 %i = sext i1 %arg to i321571 %i2 = sext i1 %arg1 to i321572 %i3 = add i32 %i2, %i1573 %i4 = icmp ule i32 %i3, 21574 ret i1 %i41575}1576 1577define i1 @test_cvt_icmp15(i1 %arg, i1 %arg1) {1578; CHECK-LABEL: @test_cvt_icmp15(1579; CHECK-NEXT: bb:1580; CHECK-NEXT: ret i1 false1581;1582bb:1583 %i = sext i1 %arg to i321584 %i2 = sext i1 %arg1 to i321585 %i3 = add i32 %i2, %i1586 %i4 = icmp sgt i32 %i3, 21587 ret i1 %i41588}1589 1590define i1 @test_cvt_icmp16(i1 %arg, i1 %arg1) {1591; CHECK-LABEL: @test_cvt_icmp16(1592; CHECK-NEXT: bb:1593; CHECK-NEXT: ret i1 false1594;1595bb:1596 %i = sext i1 %arg to i321597 %i2 = sext i1 %arg1 to i321598 %i3 = add i32 %i2, %i1599 %i4 = icmp sge i32 %i3, 21600 ret i1 %i41601}1602 1603define i1 @test_cvt_icmp17(i1 %arg, i1 %arg1) {1604; CHECK-LABEL: @test_cvt_icmp17(1605; CHECK-NEXT: bb:1606; CHECK-NEXT: ret i1 true1607;1608bb:1609 %i = sext i1 %arg to i321610 %i2 = sext i1 %arg1 to i321611 %i3 = add i32 %i2, %i1612 %i4 = icmp slt i32 %i3, 21613 ret i1 %i41614}1615 1616define i1 @test_cvt_icmp18(i1 %arg, i1 %arg1) {1617; CHECK-LABEL: @test_cvt_icmp18(1618; CHECK-NEXT: bb:1619; CHECK-NEXT: ret i1 true1620;1621bb:1622 %i = sext i1 %arg to i321623 %i2 = sext i1 %arg1 to i321624 %i3 = add i32 %i2, %i1625 %i4 = icmp sle i32 %i3, 21626 ret i1 %i41627}1628 1629define i1 @test_cvt_icmp19(i1 %arg, i1 %arg1) {1630; CHECK-LABEL: @test_cvt_icmp19(1631; CHECK-NEXT: bb:1632; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true1633; CHECK-NEXT: [[I4:%.*]] = and i1 [[ARG:%.*]], [[TMP0]]1634; CHECK-NEXT: ret i1 [[I4]]1635;1636bb:1637 %i = sext i1 %arg to i321638 %i2 = zext i1 %arg1 to i321639 %i3 = add i32 %i2, %i1640 %i4 = icmp ugt i32 %i3, 21641 ret i1 %i41642}1643 1644define i1 @test_cvt_icmp20(i1 %arg, i1 %arg1) {1645; CHECK-LABEL: @test_cvt_icmp20(1646; CHECK-NEXT: bb:1647; CHECK-NEXT: [[I4:%.*]] = xor i1 [[ARG1:%.*]], [[ARG:%.*]]1648; CHECK-NEXT: ret i1 [[I4]]1649;1650bb:1651 %i = sext i1 %arg to i321652 %i2 = zext i1 %arg1 to i321653 %i3 = add i32 %i2, %i1654 %i4 = icmp uge i32 %i3, 11655 ret i1 %i41656}1657 1658define i1 @test_cvt_icmp21(i1 %arg, i1 %arg1) {1659; CHECK-LABEL: @test_cvt_icmp21(1660; CHECK-NEXT: bb:1661; CHECK-NEXT: [[ARG_NOT:%.*]] = xor i1 [[ARG:%.*]], true1662; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG_NOT]]1663; CHECK-NEXT: ret i1 [[I4]]1664;1665bb:1666 %i = sext i1 %arg to i321667 %i2 = zext i1 %arg1 to i321668 %i3 = add i32 %i2, %i1669 %i4 = icmp ult i32 %i3, 21670 ret i1 %i41671}1672 1673define i1 @test_cvt_icmp22(i1 %arg, i1 %arg1) {1674; CHECK-LABEL: @test_cvt_icmp22(1675; CHECK-NEXT: bb:1676; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG:%.*]], true1677; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[TMP0]]1678; CHECK-NEXT: ret i1 [[I4]]1679;1680bb:1681 %i = sext i1 %arg to i321682 %i2 = zext i1 %arg1 to i321683 %i3 = add i32 %i2, %i1684 %i4 = icmp ule i32 %i3, 21685 ret i1 %i41686}1687 1688define i1 @test_cvt_icmp23(i1 %arg, i1 %arg1) {1689; CHECK-LABEL: @test_cvt_icmp23(1690; CHECK-NEXT: bb:1691; CHECK-NEXT: ret i1 false1692;1693bb:1694 %i = sext i1 %arg to i321695 %i2 = zext i1 %arg1 to i321696 %i3 = add i32 %i2, %i1697 %i4 = icmp sgt i32 %i3, 21698 ret i1 %i41699}1700 1701define i1 @test_cvt_icmp24(i1 %arg, i1 %arg1) {1702; CHECK-LABEL: @test_cvt_icmp24(1703; CHECK-NEXT: bb:1704; CHECK-NEXT: [[ARG_NOT:%.*]] = xor i1 [[ARG:%.*]], true1705; CHECK-NEXT: [[I4:%.*]] = or i1 [[ARG1:%.*]], [[ARG_NOT]]1706; CHECK-NEXT: ret i1 [[I4]]1707;1708bb:1709 %i = sext i1 %arg to i321710 %i2 = zext i1 %arg1 to i321711 %i3 = add i32 %i2, %i1712 %i4 = icmp sge i32 %i3, 01713 ret i1 %i41714}1715 1716define i1 @test_cvt_icmp25(i1 %arg, i1 %arg1) {1717; CHECK-LABEL: @test_cvt_icmp25(1718; CHECK-NEXT: bb:1719; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[ARG1:%.*]], true1720; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[ARG:%.*]], [[TMP0]]1721; CHECK-NEXT: ret i1 [[TMP1]]1722;1723bb:1724 %i = sext i1 %arg to i321725 %i2 = zext i1 %arg1 to i321726 %i3 = add i32 %i2, %i1727 %i4 = icmp slt i32 %i3, 01728 ret i1 %i41729}1730 1731define i1 @test_cvt_icmp26(i1 %arg, i1 %arg1) {1732; CHECK-LABEL: @test_cvt_icmp26(1733; CHECK-NEXT: bb:1734; CHECK-NEXT: ret i1 true1735;1736bb:1737 %i = sext i1 %arg to i321738 %i2 = zext i1 %arg1 to i321739 %i3 = add i32 %i2, %i1740 %i4 = icmp sle i32 %i3, 11741 ret i1 %i41742}1743 1744define i1 @test1(i32 %a) {1745; CHECK-LABEL: @test1(1746; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[A:%.*]], -51747; CHECK-NEXT: ret i1 [[C]]1748;1749 %b = add i32 %a, 41750 %c = icmp ult i32 %b, 41751 ret i1 %c1752}1753 1754define <2 x i1> @test1vec(<2 x i32> %a) {1755; CHECK-LABEL: @test1vec(1756; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> [[A:%.*]], splat (i32 -5)1757; CHECK-NEXT: ret <2 x i1> [[C]]1758;1759 %b = add <2 x i32> %a, <i32 4, i32 4>1760 %c = icmp ult <2 x i32> %b, <i32 4, i32 4>1761 ret <2 x i1> %c1762}1763 1764define i1 @test2(i32 %a) {1765; CHECK-LABEL: @test2(1766; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A:%.*]], 41767; CHECK-NEXT: ret i1 [[C]]1768;1769 %b = sub i32 %a, 41770 %c = icmp ugt i32 %b, -51771 ret i1 %c1772}1773 1774define <2 x i1> @test2vec(<2 x i32> %a) {1775; CHECK-LABEL: @test2vec(1776; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i32> [[A:%.*]], splat (i32 4)1777; CHECK-NEXT: ret <2 x i1> [[C]]1778;1779 %b = sub <2 x i32> %a, <i32 4, i32 4>1780 %c = icmp ugt <2 x i32> %b, <i32 -5, i32 -5>1781 ret <2 x i1> %c1782}1783 1784define i1 @test3(i32 %a) {1785; CHECK-LABEL: @test3(1786; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A:%.*]], 21474836431787; CHECK-NEXT: ret i1 [[C]]1788;1789 %b = add i32 %a, 41790 %c = icmp slt i32 %b, 21474836521791 ret i1 %c1792}1793 1794define <2 x i1> @test3vec(<2 x i32> %a) {1795; CHECK-LABEL: @test3vec(1796; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[A:%.*]], splat (i32 2147483643)1797; CHECK-NEXT: ret <2 x i1> [[C]]1798;1799 %b = add <2 x i32> %a, <i32 4, i32 4>1800 %c = icmp slt <2 x i32> %b, <i32 2147483652, i32 2147483652>1801 ret <2 x i1> %c1802}1803 1804define i1 @test4(i32 %a) {1805; CHECK-LABEL: @test4(1806; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A:%.*]], -41807; CHECK-NEXT: ret i1 [[C]]1808;1809 %b = add i32 %a, 21474836521810 %c = icmp sge i32 %b, 41811 ret i1 %c1812}1813 1814define { i32, i1 } @test4multiuse(i32 %a) {1815; CHECK-LABEL: @test4multiuse(1816; CHECK-NEXT: [[B:%.*]] = add nsw i32 [[A:%.*]], -21474836441817; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 21474836401818; CHECK-NEXT: [[TMP:%.*]] = insertvalue { i32, i1 } undef, i32 [[B]], 01819; CHECK-NEXT: [[RES:%.*]] = insertvalue { i32, i1 } [[TMP]], i1 [[C]], 11820; CHECK-NEXT: ret { i32, i1 } [[RES]]1821;1822 1823 %b = add nsw i32 %a, -21474836441824 %c = icmp slt i32 %b, -41825 1826 %tmp = insertvalue { i32, i1 } undef, i32 %b, 01827 %res = insertvalue { i32, i1 } %tmp, i1 %c, 11828 1829 ret { i32, i1 } %res1830}1831 1832define <2 x i1> @test4vec(<2 x i32> %a) {1833; CHECK-LABEL: @test4vec(1834; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[A:%.*]], splat (i32 -4)1835; CHECK-NEXT: ret <2 x i1> [[C]]1836;1837 %b = add <2 x i32> %a, <i32 2147483652, i32 2147483652>1838 %c = icmp sge <2 x i32> %b, <i32 4, i32 4>1839 ret <2 x i1> %c1840}1841 1842; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1843; This becomes equality because it's at the limit.1844 1845define i1 @nsw_slt1(i8 %a) {1846; CHECK-LABEL: @nsw_slt1(1847; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], -1281848; CHECK-NEXT: ret i1 [[C]]1849;1850 %b = add nsw i8 %a, 1001851 %c = icmp slt i8 %b, -271852 ret i1 %c1853}1854 1855define <2 x i1> @nsw_slt1_splat_vec(<2 x i8> %a) {1856; CHECK-LABEL: @nsw_slt1_splat_vec(1857; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], splat (i8 -128)1858; CHECK-NEXT: ret <2 x i1> [[C]]1859;1860 %b = add nsw <2 x i8> %a, <i8 100, i8 100>1861 %c = icmp slt <2 x i8> %b, <i8 -27, i8 -27>1862 ret <2 x i1> %c1863}1864 1865; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1866; This becomes equality because it's at the limit.1867 1868define i1 @nsw_slt2(i8 %a) {1869; CHECK-LABEL: @nsw_slt2(1870; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A:%.*]], 1271871; CHECK-NEXT: ret i1 [[C]]1872;1873 %b = add nsw i8 %a, -1001874 %c = icmp slt i8 %b, 271875 ret i1 %c1876}1877 1878define <2 x i1> @nsw_slt2_splat_vec(<2 x i8> %a) {1879; CHECK-LABEL: @nsw_slt2_splat_vec(1880; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[A:%.*]], splat (i8 127)1881; CHECK-NEXT: ret <2 x i1> [[C]]1882;1883 %b = add nsw <2 x i8> %a, <i8 -100, i8 -100>1884 %c = icmp slt <2 x i8> %b, <i8 27, i8 27>1885 ret <2 x i1> %c1886}1887 1888; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1889; Less than the limit, so the predicate doesn't change.1890 1891define i1 @nsw_slt3(i8 %a) {1892; CHECK-LABEL: @nsw_slt3(1893; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[A:%.*]], -1261894; CHECK-NEXT: ret i1 [[C]]1895;1896 %b = add nsw i8 %a, 1001897 %c = icmp slt i8 %b, -261898 ret i1 %c1899}1900 1901; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1902; Less than the limit, so the predicate doesn't change.1903 1904define i1 @nsw_slt4(i8 %a) {1905; CHECK-LABEL: @nsw_slt4(1906; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[A:%.*]], 1261907; CHECK-NEXT: ret i1 [[C]]1908;1909 %b = add nsw i8 %a, -1001910 %c = icmp slt i8 %b, 261911 ret i1 %c1912}1913 1914; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1915; Try sgt to make sure that works too.1916 1917define i1 @nsw_sgt1(i8 %a) {1918; CHECK-LABEL: @nsw_sgt1(1919; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], 1271920; CHECK-NEXT: ret i1 [[C]]1921;1922 %b = add nsw i8 %a, -1001923 %c = icmp sgt i8 %b, 261924 ret i1 %c1925}1926 1927define <2 x i1> @nsw_sgt1_splat_vec(<2 x i8> %a) {1928; CHECK-LABEL: @nsw_sgt1_splat_vec(1929; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], splat (i8 127)1930; CHECK-NEXT: ret <2 x i1> [[C]]1931;1932 %b = add nsw <2 x i8> %a, <i8 -100, i8 -100>1933 %c = icmp sgt <2 x i8> %b, <i8 26, i8 26>1934 ret <2 x i1> %c1935}1936 1937define i1 @nsw_sgt2(i8 %a) {1938; CHECK-LABEL: @nsw_sgt2(1939; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[A:%.*]], -1261940; CHECK-NEXT: ret i1 [[C]]1941;1942 %b = add nsw i8 %a, 1001943 %c = icmp sgt i8 %b, -261944 ret i1 %c1945}1946 1947define <2 x i1> @nsw_sgt2_splat_vec(<2 x i8> %a) {1948; CHECK-LABEL: @nsw_sgt2_splat_vec(1949; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i8> [[A:%.*]], splat (i8 -126)1950; CHECK-NEXT: ret <2 x i1> [[C]]1951;1952 %b = add nsw <2 x i8> %a, <i8 100, i8 100>1953 %c = icmp sgt <2 x i8> %b, <i8 -26, i8 -26>1954 ret <2 x i1> %c1955}1956 1957; icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2), when C - C2 does not overflow.1958; Comparison with 0 doesn't need special-casing.1959 1960define i1 @slt_zero_add_nsw(i32 %a) {1961; CHECK-LABEL: @slt_zero_add_nsw(1962; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A:%.*]], -11963; CHECK-NEXT: ret i1 [[CMP]]1964;1965 %add = add nsw i32 %a, 11966 %cmp = icmp slt i32 %add, 01967 ret i1 %cmp1968}1969 1970; The same fold should work with vectors.1971 1972define <2 x i1> @slt_zero_add_nsw_splat_vec(<2 x i8> %a) {1973; CHECK-LABEL: @slt_zero_add_nsw_splat_vec(1974; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], splat (i8 -1)1975; CHECK-NEXT: ret <2 x i1> [[CMP]]1976;1977 %add = add nsw <2 x i8> %a, <i8 1, i8 1>1978 %cmp = icmp slt <2 x i8> %add, zeroinitializer1979 ret <2 x i1> %cmp1980}1981 1982; Test the edges - instcombine should not interfere with simplification to constants.1983; Constant subtraction does not overflow, but this is false.1984 1985define i1 @nsw_slt3_ov_no(i8 %a) {1986; CHECK-LABEL: @nsw_slt3_ov_no(1987; CHECK-NEXT: ret i1 false1988;1989 %b = add nsw i8 %a, 1001990 %c = icmp slt i8 %b, -281991 ret i1 %c1992}1993 1994; Test the edges - instcombine should not interfere with simplification to constants.1995; Constant subtraction overflows. This is false.1996 1997define i1 @nsw_slt4_ov(i8 %a) {1998; CHECK-LABEL: @nsw_slt4_ov(1999; CHECK-NEXT: ret i1 false2000;2001 %b = add nsw i8 %a, 1002002 %c = icmp slt i8 %b, -292003 ret i1 %c2004}2005 2006; Test the edges - instcombine should not interfere with simplification to constants.2007; Constant subtraction overflows. This is true.2008 2009define i1 @nsw_slt5_ov(i8 %a) {2010; CHECK-LABEL: @nsw_slt5_ov(2011; CHECK-NEXT: ret i1 true2012;2013 %b = add nsw i8 %a, -1002014 %c = icmp slt i8 %b, 282015 ret i1 %c2016}2017 2018; InstCombine should not thwart this opportunity to simplify completely.2019 2020define i1 @slt_zero_add_nsw_signbit(i8 %x) {2021; CHECK-LABEL: @slt_zero_add_nsw_signbit(2022; CHECK-NEXT: ret i1 true2023;2024 %y = add nsw i8 %x, -1282025 %z = icmp slt i8 %y, 02026 ret i1 %z2027}2028 2029; InstCombine should not thwart this opportunity to simplify completely.2030 2031define i1 @slt_zero_add_nuw_signbit(i8 %x) {2032; CHECK-LABEL: @slt_zero_add_nuw_signbit(2033; CHECK-NEXT: ret i1 true2034;2035 %y = add nuw i8 %x, 1282036 %z = icmp slt i8 %y, 02037 ret i1 %z2038}2039 2040define i1 @reduce_add_ult(i32 %in) {2041; CHECK-LABEL: @reduce_add_ult(2042; CHECK-NEXT: [[A18:%.*]] = icmp ult i32 [[IN:%.*]], 92043; CHECK-NEXT: ret i1 [[A18]]2044;2045 %a6 = add nuw i32 %in, 32046 %a18 = icmp ult i32 %a6, 122047 ret i1 %a182048}2049 2050define i1 @reduce_add_ugt(i32 %in) {2051; CHECK-LABEL: @reduce_add_ugt(2052; CHECK-NEXT: [[A18:%.*]] = icmp ugt i32 [[IN:%.*]], 92053; CHECK-NEXT: ret i1 [[A18]]2054;2055 %a6 = add nuw i32 %in, 32056 %a18 = icmp ugt i32 %a6, 122057 ret i1 %a182058}2059 2060define i1 @reduce_add_ule(i32 %in) {2061; CHECK-LABEL: @reduce_add_ule(2062; CHECK-NEXT: [[A18:%.*]] = icmp ult i32 [[IN:%.*]], 102063; CHECK-NEXT: ret i1 [[A18]]2064;2065 %a6 = add nuw i32 %in, 32066 %a18 = icmp ule i32 %a6, 122067 ret i1 %a182068}2069 2070define i1 @reduce_add_uge(i32 %in) {2071; CHECK-LABEL: @reduce_add_uge(2072; CHECK-NEXT: [[A18:%.*]] = icmp ugt i32 [[IN:%.*]], 82073; CHECK-NEXT: ret i1 [[A18]]2074;2075 %a6 = add nuw i32 %in, 32076 %a18 = icmp uge i32 %a6, 122077 ret i1 %a182078}2079 2080define i1 @ult_add_ssubov(i32 %in) {2081; CHECK-LABEL: @ult_add_ssubov(2082; CHECK-NEXT: ret i1 false2083;2084 %a6 = add nuw i32 %in, 712085 %a18 = icmp ult i32 %a6, 32086 ret i1 %a182087}2088 2089define i1 @ult_add_nonuw(i8 %in) {2090; CHECK-LABEL: @ult_add_nonuw(2091; CHECK-NEXT: [[A6:%.*]] = add i8 [[IN:%.*]], 712092; CHECK-NEXT: [[A18:%.*]] = icmp ult i8 [[A6]], 122093; CHECK-NEXT: ret i1 [[A18]]2094;2095 %a6 = add i8 %in, 712096 %a18 = icmp ult i8 %a6, 122097 ret i1 %a182098}2099 2100define i1 @uge_add_nonuw(i32 %in) {2101; CHECK-LABEL: @uge_add_nonuw(2102; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[IN:%.*]], -92103; CHECK-NEXT: [[A18:%.*]] = icmp ult i32 [[TMP1]], -122104; CHECK-NEXT: ret i1 [[A18]]2105;2106 %a6 = add i32 %in, 32107 %a18 = icmp uge i32 %a6, 122108 ret i1 %a182109}2110 2111; Test unsigned add overflow patterns. The div ops are only here to2112; thwart complexity based canonicalization of the operand order.2113 2114define i1 @op_ugt_sum_commute1(i8 %p1, i8 %p2) {2115; CHECK-LABEL: @op_ugt_sum_commute1(2116; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]2117; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]2118; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], -12119; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[Y]], [[TMP1]]2120; CHECK-NEXT: ret i1 [[C]]2121;2122 %x = sdiv i8 42, %p12123 %y = sdiv i8 42, %p22124 %a = add i8 %x, %y2125 %c = icmp ugt i8 %x, %a2126 ret i1 %c2127}2128 2129define <2 x i1> @op_ugt_sum_vec_commute2(<2 x i8> %p1, <2 x i8> %p2) {2130; CHECK-LABEL: @op_ugt_sum_vec_commute2(2131; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P1:%.*]]2132; CHECK-NEXT: [[Y:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P2:%.*]]2133; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X]], splat (i8 -1)2134; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i8> [[Y]], [[TMP1]]2135; CHECK-NEXT: ret <2 x i1> [[C]]2136;2137 %x = sdiv <2 x i8> <i8 42, i8 -42>, %p12138 %y = sdiv <2 x i8> <i8 42, i8 -42>, %p22139 %a = add <2 x i8> %y, %x2140 %c = icmp ugt <2 x i8> %x, %a2141 ret <2 x i1> %c2142}2143 2144define i1 @sum_ugt_op_uses(i8 %p1, i8 %p2, ptr %p3) {2145; CHECK-LABEL: @sum_ugt_op_uses(2146; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]2147; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]2148; CHECK-NEXT: [[A:%.*]] = add nsw i8 [[X]], [[Y]]2149; CHECK-NEXT: store i8 [[A]], ptr [[P3:%.*]], align 12150; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X]], [[A]]2151; CHECK-NEXT: ret i1 [[C]]2152;2153 %x = sdiv i8 42, %p12154 %y = sdiv i8 42, %p22155 %a = add i8 %x, %y2156 store i8 %a, ptr %p32157 %c = icmp ugt i8 %x, %a2158 ret i1 %c2159}2160 2161define <2 x i1> @sum_ult_op_vec_commute1(<2 x i8> %p1, <2 x i8> %p2) {2162; CHECK-LABEL: @sum_ult_op_vec_commute1(2163; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 -42>, [[P1:%.*]]2164; CHECK-NEXT: [[Y:%.*]] = sdiv <2 x i8> <i8 -42, i8 42>, [[P2:%.*]]2165; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X]], splat (i8 -1)2166; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i8> [[Y]], [[TMP1]]2167; CHECK-NEXT: ret <2 x i1> [[C]]2168;2169 %x = sdiv <2 x i8> <i8 42, i8 -42>, %p12170 %y = sdiv <2 x i8> <i8 -42, i8 42>, %p22171 %a = add <2 x i8> %x, %y2172 %c = icmp ult <2 x i8> %a, %x2173 ret <2 x i1> %c2174}2175 2176define i1 @sum_ult_op_commute2(i8 %p1, i8 %p2) {2177; CHECK-LABEL: @sum_ult_op_commute2(2178; CHECK-NEXT: [[X:%.*]] = sdiv i8 42, [[P1:%.*]]2179; CHECK-NEXT: [[Y:%.*]] = sdiv i8 42, [[P2:%.*]]2180; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], -12181; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[Y]], [[TMP1]]2182; CHECK-NEXT: ret i1 [[C]]2183;2184 %x = sdiv i8 42, %p12185 %y = sdiv i8 42, %p22186 %a = add i8 %y, %x2187 %c = icmp ult i8 %a, %x2188 ret i1 %c2189}2190 2191define i1 @sum_ult_op_uses(i8 %x, i8 %y, ptr %p) {2192; CHECK-LABEL: @sum_ult_op_uses(2193; CHECK-NEXT: [[A:%.*]] = add i8 [[Y:%.*]], [[X:%.*]]2194; CHECK-NEXT: store i8 [[A]], ptr [[P:%.*]], align 12195; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[A]], [[X]]2196; CHECK-NEXT: ret i1 [[C]]2197;2198 %a = add i8 %y, %x2199 store i8 %a, ptr %p2200 %c = icmp ult i8 %a, %x2201 ret i1 %c2202}2203 2204; X + Z >s Y + Z -> X > Y if there is no overflow.2205define i1 @common_op_nsw(i32 %x, i32 %y, i32 %z) {2206; CHECK-LABEL: @common_op_nsw(2207; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]2208; CHECK-NEXT: ret i1 [[C]]2209;2210 %lhs = add nsw i32 %x, %z2211 %rhs = add nsw i32 %y, %z2212 %c = icmp sgt i32 %lhs, %rhs2213 ret i1 %c2214}2215 2216define i1 @common_op_nsw_extra_uses(i32 %x, i32 %y, i32 %z) {2217; CHECK-LABEL: @common_op_nsw_extra_uses(2218; CHECK-NEXT: [[LHS:%.*]] = add nsw i32 [[X:%.*]], [[Z:%.*]]2219; CHECK-NEXT: call void @use(i32 [[LHS]])2220; CHECK-NEXT: [[RHS:%.*]] = add nsw i32 [[Y:%.*]], [[Z]]2221; CHECK-NEXT: call void @use(i32 [[RHS]])2222; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X]], [[Y]]2223; CHECK-NEXT: ret i1 [[C]]2224;2225 %lhs = add nsw i32 %x, %z2226 call void @use(i32 %lhs)2227 %rhs = add nsw i32 %y, %z2228 call void @use(i32 %rhs)2229 %c = icmp sgt i32 %lhs, %rhs2230 ret i1 %c2231}2232 2233; X + Z >u Z + Y -> X > Y if there is no overflow.2234define i1 @common_op_nuw(i32 %x, i32 %y, i32 %z) {2235; CHECK-LABEL: @common_op_nuw(2236; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]2237; CHECK-NEXT: ret i1 [[C]]2238;2239 %lhs = add nuw i32 %x, %z2240 %rhs = add nuw i32 %z, %y2241 %c = icmp ugt i32 %lhs, %rhs2242 ret i1 %c2243}2244 2245define i1 @common_op_nuw_extra_uses(i32 %x, i32 %y, i32 %z) {2246; CHECK-LABEL: @common_op_nuw_extra_uses(2247; CHECK-NEXT: [[LHS:%.*]] = add nuw i32 [[X:%.*]], [[Z:%.*]]2248; CHECK-NEXT: call void @use(i32 [[LHS]])2249; CHECK-NEXT: [[RHS:%.*]] = add nuw i32 [[Z]], [[Y:%.*]]2250; CHECK-NEXT: call void @use(i32 [[RHS]])2251; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]]2252; CHECK-NEXT: ret i1 [[C]]2253;2254 %lhs = add nuw i32 %x, %z2255 call void @use(i32 %lhs)2256 %rhs = add nuw i32 %z, %y2257 call void @use(i32 %rhs)2258 %c = icmp ugt i32 %lhs, %rhs2259 ret i1 %c2260}2261 2262define i1 @common_op_nsw_commute(i32 %x, i32 %y, i32 %z) {2263; CHECK-LABEL: @common_op_nsw_commute(2264; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]2265; CHECK-NEXT: ret i1 [[C]]2266;2267 %lhs = add nsw i32 %z, %x2268 %rhs = add nsw i32 %y, %z2269 %c = icmp slt i32 %lhs, %rhs2270 ret i1 %c2271}2272 2273define i1 @common_op_nuw_commute(i32 %x, i32 %y, i32 %z) {2274; CHECK-LABEL: @common_op_nuw_commute(2275; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]2276; CHECK-NEXT: ret i1 [[C]]2277;2278 %lhs = add nuw i32 %z, %x2279 %rhs = add nuw i32 %z, %y2280 %c = icmp ult i32 %lhs, %rhs2281 ret i1 %c2282}2283 2284; X + Y > X -> Y > 0 if there is no overflow.2285define i1 @common_op_test29(i32 %x, i32 %y) {2286; CHECK-LABEL: @common_op_test29(2287; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y:%.*]], 02288; CHECK-NEXT: ret i1 [[C]]2289;2290 %lhs = add nsw i32 %x, %y2291 %c = icmp sgt i32 %lhs, %x2292 ret i1 %c2293}2294 2295; X + Y > X -> Y > 0 if there is no overflow.2296define i1 @sum_nuw(i32 %x, i32 %y) {2297; CHECK-LABEL: @sum_nuw(2298; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y:%.*]], 02299; CHECK-NEXT: ret i1 [[C]]2300;2301 %lhs = add nuw i32 %x, %y2302 %c = icmp ugt i32 %lhs, %x2303 ret i1 %c2304}2305 2306; X > X + Y -> 0 > Y if there is no overflow.2307define i1 @sum_nsw_commute(i32 %x, i32 %y) {2308; CHECK-LABEL: @sum_nsw_commute(2309; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], 02310; CHECK-NEXT: ret i1 [[C]]2311;2312 %rhs = add nsw i32 %x, %y2313 %c = icmp sgt i32 %x, %rhs2314 ret i1 %c2315}2316 2317; X > X + Y -> 0 > Y if there is no overflow.2318define i1 @sum_nuw_commute(i32 %x, i32 %y) {2319; CHECK-LABEL: @sum_nuw_commute(2320; CHECK-NEXT: ret i1 false2321;2322 %rhs = add nuw i32 %x, %y2323 %c = icmp ugt i32 %x, %rhs2324 ret i1 %c2325}2326 2327; PR2698 - https://bugs.llvm.org/show_bug.cgi?id=26982328 2329declare void @use1(i1)2330declare void @use8(i8)2331 2332define void @bzip1(i8 %a, i8 %b, i8 %x) {2333; CHECK-LABEL: @bzip1(2334; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], [[B:%.*]]2335; CHECK-NEXT: call void @use1(i1 [[CMP]])2336; CHECK-NEXT: ret void2337;2338 %add1 = add i8 %a, %x2339 %add2 = add i8 %b, %x2340 %cmp = icmp eq i8 %add1, %add22341 call void @use1(i1 %cmp)2342 ret void2343}2344 2345define void @bzip2(i8 %a, i8 %b, i8 %x) {2346; CHECK-LABEL: @bzip2(2347; CHECK-NEXT: [[ADD1:%.*]] = add i8 [[A:%.*]], [[X:%.*]]2348; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[B:%.*]]2349; CHECK-NEXT: call void @use1(i1 [[CMP]])2350; CHECK-NEXT: call void @use8(i8 [[ADD1]])2351; CHECK-NEXT: ret void2352;2353 %add1 = add i8 %a, %x2354 %add2 = add i8 %b, %x2355 %cmp = icmp eq i8 %add1, %add22356 call void @use1(i1 %cmp)2357 call void @use8(i8 %add1)2358 ret void2359}2360 2361define <2 x i1> @icmp_eq_add_undef(<2 x i32> %a) {2362; CHECK-LABEL: @icmp_eq_add_undef(2363; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 5, i32 undef>2364; CHECK-NEXT: ret <2 x i1> [[CMP]]2365;2366 %add = add <2 x i32> %a, <i32 5, i32 undef>2367 %cmp = icmp eq <2 x i32> %add, <i32 10, i32 10>2368 ret <2 x i1> %cmp2369}2370 2371define <2 x i1> @icmp_eq_add_non_splat(<2 x i32> %a) {2372; CHECK-LABEL: @icmp_eq_add_non_splat(2373; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 5, i32 4>2374; CHECK-NEXT: ret <2 x i1> [[CMP]]2375;2376 %add = add <2 x i32> %a, <i32 5, i32 6>2377 %cmp = icmp eq <2 x i32> %add, <i32 10, i32 10>2378 ret <2 x i1> %cmp2379}2380 2381define <2 x i1> @icmp_eq_add_undef2(<2 x i32> %a) {2382; CHECK-LABEL: @icmp_eq_add_undef2(2383; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 5, i32 undef>2384; CHECK-NEXT: ret <2 x i1> [[CMP]]2385;2386 %add = add <2 x i32> %a, <i32 5, i32 5>2387 %cmp = icmp eq <2 x i32> %add, <i32 10, i32 undef>2388 ret <2 x i1> %cmp2389}2390 2391define <2 x i1> @icmp_eq_add_non_splat2(<2 x i32> %a) {2392; CHECK-LABEL: @icmp_eq_add_non_splat2(2393; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 5, i32 6>2394; CHECK-NEXT: ret <2 x i1> [[CMP]]2395;2396 %add = add <2 x i32> %a, <i32 5, i32 5>2397 %cmp = icmp eq <2 x i32> %add, <i32 10, i32 11>2398 ret <2 x i1> %cmp2399}2400 2401define i1 @without_nsw_nuw(i8 %x, i8 %y) {2402; CHECK-LABEL: @without_nsw_nuw(2403; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 22404; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[Y:%.*]], [[TMP1]]2405; CHECK-NEXT: ret i1 [[TOBOOL]]2406;2407 %t1 = add i8 %x, 372408 %t2 = add i8 %y, 352409 %tobool = icmp eq i8 %t2, %t12410 ret i1 %tobool2411}2412 2413define i1 @with_nsw_nuw(i8 %x, i8 %y) {2414; CHECK-LABEL: @with_nsw_nuw(2415; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i8 [[X:%.*]], 22416; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[Y:%.*]], [[TMP1]]2417; CHECK-NEXT: ret i1 [[TOBOOL]]2418;2419 %t1 = add nsw nuw i8 %x, 372420 %t2 = add i8 %y, 352421 %tobool = icmp eq i8 %t2, %t12422 ret i1 %tobool2423}2424 2425define i1 @with_nsw_large(i8 %x, i8 %y) {2426; CHECK-LABEL: @with_nsw_large(2427; CHECK-NEXT: [[TMP1:%.*]] = add nsw i8 [[X:%.*]], 22428; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[Y:%.*]], [[TMP1]]2429; CHECK-NEXT: ret i1 [[TOBOOL]]2430;2431 %t1 = add nsw i8 %x, 372432 %t2 = add i8 %y, 352433 %tobool = icmp eq i8 %t2, %t12434 ret i1 %tobool2435}2436 2437define i1 @with_nsw_small(i8 %x, i8 %y) {2438; CHECK-LABEL: @with_nsw_small(2439; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y:%.*]], 22440; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[TMP1]], [[X:%.*]]2441; CHECK-NEXT: ret i1 [[TOBOOL]]2442;2443 %t1 = add nsw i8 %x, 352444 %t2 = add i8 %y, 372445 %tobool = icmp eq i8 %t2, %t12446 ret i1 %tobool2447}2448 2449define i1 @with_nuw_large(i8 %x, i8 %y) {2450; CHECK-LABEL: @with_nuw_large(2451; CHECK-NEXT: [[TMP1:%.*]] = add nuw i8 [[X:%.*]], 22452; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[Y:%.*]], [[TMP1]]2453; CHECK-NEXT: ret i1 [[TOBOOL]]2454;2455 %t1 = add nuw i8 %x, 372456 %t2 = add i8 %y, 352457 %tobool = icmp eq i8 %t2, %t12458 ret i1 %tobool2459}2460 2461define i1 @with_nuw_small(i8 %x, i8 %y) {2462; CHECK-LABEL: @with_nuw_small(2463; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y:%.*]], 22464; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[TMP1]], [[X:%.*]]2465; CHECK-NEXT: ret i1 [[TOBOOL]]2466;2467 %t1 = add nuw i8 %x, 352468 %t2 = add i8 %y, 372469 %tobool = icmp eq i8 %t2, %t12470 ret i1 %tobool2471}2472 2473define i1 @with_nuw_large_negative(i8 %x, i8 %y) {2474; CHECK-LABEL: @with_nuw_large_negative(2475; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -22476; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8 [[Y:%.*]], [[TMP1]]2477; CHECK-NEXT: ret i1 [[TOBOOL]]2478;2479 %t1 = add nuw i8 %x, -372480 %t2 = add i8 %y, -352481 %tobool = icmp eq i8 %t2, %t12482 ret i1 %tobool2483}2484 2485define i1 @ugt_offset(i8 %a) {2486; CHECK-LABEL: @ugt_offset(2487; CHECK-NEXT: [[OV:%.*]] = icmp slt i8 [[A:%.*]], -1242488; CHECK-NEXT: ret i1 [[OV]]2489;2490 %t = add i8 %a, 1242491 %ov = icmp ugt i8 %t, 2512492 ret i1 %ov2493}2494 2495define i1 @ugt_offset_use(i32 %a) {2496; CHECK-LABEL: @ugt_offset_use(2497; CHECK-NEXT: [[T:%.*]] = add i32 [[A:%.*]], 422498; CHECK-NEXT: call void @use(i32 [[T]])2499; CHECK-NEXT: [[OV:%.*]] = icmp slt i32 [[A]], -422500; CHECK-NEXT: ret i1 [[OV]]2501;2502 %t = add i32 %a, 422503 call void @use(i32 %t)2504 %ov = icmp ugt i32 %t, 21474836892505 ret i1 %ov2506}2507 2508define <2 x i1> @ugt_offset_splat(<2 x i5> %a) {2509; CHECK-LABEL: @ugt_offset_splat(2510; CHECK-NEXT: [[OV:%.*]] = icmp slt <2 x i5> [[A:%.*]], splat (i5 -9)2511; CHECK-NEXT: ret <2 x i1> [[OV]]2512;2513 %t = add <2 x i5> %a, <i5 9, i5 9>2514 %ov = icmp ugt <2 x i5> %t, <i5 24, i5 24>2515 ret <2 x i1> %ov2516}2517 2518; negative test - constants must differ by SMAX2519 2520define i1 @ugt_wrong_offset(i8 %a) {2521; CHECK-LABEL: @ugt_wrong_offset(2522; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[A:%.*]], 1272523; CHECK-NEXT: [[OV:%.*]] = icmp ult i8 [[TMP1]], 42524; CHECK-NEXT: ret i1 [[OV]]2525;2526 %t = add i8 %a, 1232527 %ov = icmp ugt i8 %t, 2512528 ret i1 %ov2529}2530 2531define i1 @ugt_offset_nuw(i8 %a) {2532; CHECK-LABEL: @ugt_offset_nuw(2533; CHECK-NEXT: [[OV:%.*]] = icmp slt i8 [[A:%.*]], 02534; CHECK-NEXT: ret i1 [[OV]]2535;2536 %t = add nuw i8 %a, 1242537 %ov = icmp ugt i8 %t, 2512538 ret i1 %ov2539}2540 2541define i1 @ult_offset(i8 %a) {2542; CHECK-LABEL: @ult_offset(2543; CHECK-NEXT: [[OV:%.*]] = icmp sgt i8 [[A:%.*]], 52544; CHECK-NEXT: ret i1 [[OV]]2545;2546 %t = add i8 %a, 2502547 %ov = icmp ult i8 %t, 1222548 ret i1 %ov2549}2550 2551define i1 @ult_offset_use(i32 %a) {2552; CHECK-LABEL: @ult_offset_use(2553; CHECK-NEXT: [[T:%.*]] = add i32 [[A:%.*]], 422554; CHECK-NEXT: call void @use(i32 [[T]])2555; CHECK-NEXT: [[OV:%.*]] = icmp sgt i32 [[A]], -432556; CHECK-NEXT: ret i1 [[OV]]2557;2558 %t = add i32 %a, 422559 call void @use(i32 %t)2560 %ov = icmp ult i32 %t, 21474836902561 ret i1 %ov2562}2563 2564define <2 x i1> @ult_offset_splat(<2 x i5> %a) {2565; CHECK-LABEL: @ult_offset_splat(2566; CHECK-NEXT: [[OV:%.*]] = icmp sgt <2 x i5> [[A:%.*]], splat (i5 -10)2567; CHECK-NEXT: ret <2 x i1> [[OV]]2568;2569 %t = add <2 x i5> %a, <i5 9, i5 9>2570 %ov = icmp ult <2 x i5> %t, <i5 25, i5 25>2571 ret <2 x i1> %ov2572}2573 2574; negative test - constants must differ by SMIN2575 2576define i1 @ult_wrong_offset(i8 %a) {2577; CHECK-LABEL: @ult_wrong_offset(2578; CHECK-NEXT: [[T:%.*]] = add i8 [[A:%.*]], -62579; CHECK-NEXT: [[OV:%.*]] = icmp ult i8 [[T]], 1232580; CHECK-NEXT: ret i1 [[OV]]2581;2582 %t = add i8 %a, 2502583 %ov = icmp ult i8 %t, 1232584 ret i1 %ov2585}2586 2587define i1 @ult_offset_nuw(i8 %a) {2588; CHECK-LABEL: @ult_offset_nuw(2589; CHECK-NEXT: [[OV:%.*]] = icmp sgt i8 [[A:%.*]], -12590; CHECK-NEXT: ret i1 [[OV]]2591;2592 %t = add nuw i8 %a, 422593 %ov = icmp ult i8 %t, 1702594 ret i1 %ov2595}2596 2597define i1 @sgt_offset(i8 %a) {2598; CHECK-LABEL: @sgt_offset(2599; CHECK-NEXT: [[OV:%.*]] = icmp ult i8 [[A:%.*]], -1222600; CHECK-NEXT: ret i1 [[OV]]2601;2602 %t = add i8 %a, -62603 %ov = icmp sgt i8 %t, -72604 ret i1 %ov2605}2606 2607define i1 @sgt_offset_use(i32 %a) {2608; CHECK-LABEL: @sgt_offset_use(2609; CHECK-NEXT: [[T:%.*]] = add i32 [[A:%.*]], 422610; CHECK-NEXT: call void @use(i32 [[T]])2611; CHECK-NEXT: [[OV:%.*]] = icmp ult i32 [[A]], 21474836062612; CHECK-NEXT: ret i1 [[OV]]2613;2614 %t = add i32 %a, 422615 call void @use(i32 %t)2616 %ov = icmp sgt i32 %t, 412617 ret i1 %ov2618}2619 2620define <2 x i1> @sgt_offset_splat(<2 x i5> %a) {2621; CHECK-LABEL: @sgt_offset_splat(2622; CHECK-NEXT: [[OV:%.*]] = icmp ult <2 x i5> [[A:%.*]], splat (i5 7)2623; CHECK-NEXT: ret <2 x i1> [[OV]]2624;2625 %t = add <2 x i5> %a, <i5 9, i5 9>2626 %ov = icmp sgt <2 x i5> %t, <i5 8, i5 8>2627 ret <2 x i1> %ov2628}2629 2630; negative test - constants must differ by 12631 2632define i1 @sgt_wrong_offset(i8 %a) {2633; CHECK-LABEL: @sgt_wrong_offset(2634; CHECK-NEXT: [[T:%.*]] = add i8 [[A:%.*]], -72635; CHECK-NEXT: [[OV:%.*]] = icmp sgt i8 [[T]], -72636; CHECK-NEXT: ret i1 [[OV]]2637;2638 %t = add i8 %a, -72639 %ov = icmp sgt i8 %t, -72640 ret i1 %ov2641}2642 2643define i1 @sgt_offset_nsw(i8 %a, i8 %c) {2644; CHECK-LABEL: @sgt_offset_nsw(2645; CHECK-NEXT: [[OV:%.*]] = icmp sgt i8 [[A:%.*]], -12646; CHECK-NEXT: ret i1 [[OV]]2647;2648 %t = add nsw i8 %a, 422649 %ov = icmp sgt i8 %t, 412650 ret i1 %ov2651}2652 2653define i1 @slt_offset(i8 %a) {2654; CHECK-LABEL: @slt_offset(2655; CHECK-NEXT: [[OV:%.*]] = icmp ugt i8 [[A:%.*]], -1232656; CHECK-NEXT: ret i1 [[OV]]2657;2658 %t = add i8 %a, -62659 %ov = icmp slt i8 %t, -62660 ret i1 %ov2661}2662 2663define i1 @slt_offset_use(i32 %a) {2664; CHECK-LABEL: @slt_offset_use(2665; CHECK-NEXT: [[T:%.*]] = add i32 [[A:%.*]], 422666; CHECK-NEXT: call void @use(i32 [[T]])2667; CHECK-NEXT: [[OV:%.*]] = icmp ugt i32 [[A]], 21474836052668; CHECK-NEXT: ret i1 [[OV]]2669;2670 %t = add i32 %a, 422671 call void @use(i32 %t)2672 %ov = icmp slt i32 %t, 422673 ret i1 %ov2674}2675 2676define <2 x i1> @slt_offset_splat(<2 x i5> %a) {2677; CHECK-LABEL: @slt_offset_splat(2678; CHECK-NEXT: [[OV:%.*]] = icmp ugt <2 x i5> [[A:%.*]], splat (i5 6)2679; CHECK-NEXT: ret <2 x i1> [[OV]]2680;2681 %t = add <2 x i5> %a, <i5 9, i5 9>2682 %ov = icmp slt <2 x i5> %t, <i5 9, i5 9>2683 ret <2 x i1> %ov2684}2685 2686; negative test - constants must be equal2687 2688define i1 @slt_wrong_offset(i8 %a) {2689; CHECK-LABEL: @slt_wrong_offset(2690; CHECK-NEXT: [[T:%.*]] = add i8 [[A:%.*]], -62691; CHECK-NEXT: [[OV:%.*]] = icmp slt i8 [[T]], -72692; CHECK-NEXT: ret i1 [[OV]]2693;2694 %t = add i8 %a, -62695 %ov = icmp slt i8 %t, -72696 ret i1 %ov2697}2698 2699define i1 @slt_offset_nsw(i8 %a, i8 %c) {2700; CHECK-LABEL: @slt_offset_nsw(2701; CHECK-NEXT: [[OV:%.*]] = icmp slt i8 [[A:%.*]], 02702; CHECK-NEXT: ret i1 [[OV]]2703;2704 %t = add nsw i8 %a, 422705 %ov = icmp slt i8 %t, 422706 ret i1 %ov2707}2708 2709; In the following 4 tests, we could push the inc/dec2710; through the min/max, but we should not break up the2711; min/max idiom by using different icmp and select2712; operands.2713 2714define i32 @increment_max(i32 %x) {2715; CHECK-LABEL: @increment_max(2716; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -1)2717; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[TMP1]], 12718; CHECK-NEXT: ret i32 [[S]]2719;2720 %a = add nsw i32 %x, 12721 %c = icmp sgt i32 %a, 02722 %s = select i1 %c, i32 %a, i32 02723 ret i32 %s2724}2725 2726define i32 @decrement_max(i32 %x) {2727; CHECK-LABEL: @decrement_max(2728; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 1)2729; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[TMP1]], -12730; CHECK-NEXT: ret i32 [[S]]2731;2732 %a = add nsw i32 %x, -12733 %c = icmp sgt i32 %a, 02734 %s = select i1 %c, i32 %a, i32 02735 ret i32 %s2736}2737 2738define i32 @increment_min(i32 %x) {2739; CHECK-LABEL: @increment_min(2740; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 -1)2741; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[TMP1]], 12742; CHECK-NEXT: ret i32 [[S]]2743;2744 %a = add nsw i32 %x, 12745 %c = icmp slt i32 %a, 02746 %s = select i1 %c, i32 %a, i32 02747 ret i32 %s2748}2749 2750define i32 @decrement_min(i32 %x) {2751; CHECK-LABEL: @decrement_min(2752; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 1)2753; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[TMP1]], -12754; CHECK-NEXT: ret i32 [[S]]2755;2756 %a = add nsw i32 %x, -12757 %c = icmp slt i32 %a, 02758 %s = select i1 %c, i32 %a, i32 02759 ret i32 %s2760}2761 2762define i1 @icmp_add_add_C(i32 %a, i32 %b) {2763; CHECK-LABEL: @icmp_add_add_C(2764; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2765; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], [[TMP1]]2766; CHECK-NEXT: ret i1 [[CMP]]2767;2768 %add1 = add i32 %a, %b2769 %add2 = add i32 %add1, -12770 %cmp = icmp ult i32 %add2, %a2771 ret i1 %cmp2772}2773 2774define i1 @icmp_add_add_C_pred(i32 %a, i32 %b) {2775; CHECK-LABEL: @icmp_add_add_C_pred(2776; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2777; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[A:%.*]], [[TMP1]]2778; CHECK-NEXT: ret i1 [[CMP]]2779;2780 %add1 = add i32 %a, %b2781 %add2 = add i32 %add1, -12782 %cmp = icmp uge i32 %add2, %a2783 ret i1 %cmp2784}2785 2786define i1 @icmp_add_add_C_wrong_pred(i32 %a, i32 %b) {2787; CHECK-LABEL: @icmp_add_add_C_wrong_pred(2788; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]2789; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], -12790; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[ADD2]], [[A]]2791; CHECK-NEXT: ret i1 [[CMP]]2792;2793 %add1 = add i32 %a, %b2794 %add2 = add i32 %add1, -12795 %cmp = icmp ule i32 %add2, %a2796 ret i1 %cmp2797}2798 2799define i1 @icmp_add_add_C_wrong_operand(i32 %a, i32 %b, i32 %c) {2800; CHECK-LABEL: @icmp_add_add_C_wrong_operand(2801; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]2802; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], -12803; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD2]], [[C:%.*]]2804; CHECK-NEXT: ret i1 [[CMP]]2805;2806 %add1 = add i32 %a, %b2807 %add2 = add i32 %add1, -12808 %cmp = icmp ult i32 %add2, %c2809 ret i1 %cmp2810}2811 2812define i1 @icmp_add_add_C_different_const(i32 %a, i32 %b) {2813; CHECK-LABEL: @icmp_add_add_C_different_const(2814; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -43, [[B:%.*]]2815; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], [[A:%.*]]2816; CHECK-NEXT: ret i1 [[CMP]]2817;2818 %add1 = add i32 %a, %b2819 %add2 = add i32 %add1, 422820 %cmp = icmp ult i32 %add2, %a2821 ret i1 %cmp2822}2823 2824define <2 x i1> @icmp_add_add_C_vector(<2 x i8> %a, <2 x i8> %b) {2825; CHECK-LABEL: @icmp_add_add_C_vector(2826; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> <i8 -11, i8 -21>, [[B:%.*]]2827; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[TMP1]], [[A:%.*]]2828; CHECK-NEXT: ret <2 x i1> [[CMP]]2829;2830 %add1 = add <2 x i8> %a, %b2831 %add2 = add <2 x i8> %add1, <i8 10, i8 20>2832 %cmp = icmp ult <2 x i8> %add2, %a2833 ret <2 x i1> %cmp2834}2835 2836define <2 x i1> @icmp_add_add_C_vector_undef(<2 x i8> %a, <2 x i8> %b) {2837; CHECK-LABEL: @icmp_add_add_C_vector_undef(2838; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> <i8 -11, i8 undef>, [[B:%.*]]2839; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[TMP1]], [[A:%.*]]2840; CHECK-NEXT: ret <2 x i1> [[CMP]]2841;2842 %add1 = add <2 x i8> %a, %b2843 %add2 = add <2 x i8> %add1, <i8 10, i8 undef>2844 %cmp = icmp ult <2 x i8> %add2, %a2845 ret <2 x i1> %cmp2846}2847 2848define i1 @icmp_add_add_C_comm1(i32 %a, i32 %b) {2849; CHECK-LABEL: @icmp_add_add_C_comm1(2850; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2851; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], [[TMP1]]2852; CHECK-NEXT: ret i1 [[CMP]]2853;2854 %add1 = add i32 %b, %a2855 %add2 = add i32 %add1, -12856 %cmp = icmp ult i32 %add2, %a2857 ret i1 %cmp2858}2859 2860define i1 @icmp_add_add_C_comm2(i32 %X, i32 %b) {2861; CHECK-LABEL: @icmp_add_add_C_comm2(2862; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[X:%.*]]2863; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2864; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A]], [[TMP1]]2865; CHECK-NEXT: ret i1 [[CMP]]2866;2867 %a = udiv i32 42, %X ; thwart complexity-based canonicalization2868 %add1 = add i32 %a, %b2869 %add2 = add i32 %add1, -12870 %cmp = icmp ugt i32 %a, %add22871 ret i1 %cmp2872}2873 2874define i1 @icmp_add_add_C_comm2_pred(i32 %X, i32 %b) {2875; CHECK-LABEL: @icmp_add_add_C_comm2_pred(2876; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[X:%.*]]2877; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2878; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[A]], [[TMP1]]2879; CHECK-NEXT: ret i1 [[CMP]]2880;2881 %a = udiv i32 42, %X ; thwart complexity-based canonicalization2882 %add1 = add i32 %a, %b2883 %add2 = add i32 %add1, -12884 %cmp = icmp ule i32 %a, %add22885 ret i1 %cmp2886}2887 2888define i1 @icmp_add_add_C_comm2_wrong_pred(i32 %X, i32 %b) {2889; CHECK-LABEL: @icmp_add_add_C_comm2_wrong_pred(2890; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[X:%.*]]2891; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[A]], [[B:%.*]]2892; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], -12893; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], [[ADD2]]2894; CHECK-NEXT: ret i1 [[CMP]]2895;2896 %a = udiv i32 42, %X ; thwart complexity-based canonicalization2897 %add1 = add i32 %a, %b2898 %add2 = add i32 %add1, -12899 %cmp = icmp ult i32 %a, %add22900 ret i1 %cmp2901}2902 2903define i1 @icmp_add_add_C_comm3(i32 %X, i32 %b) {2904; CHECK-LABEL: @icmp_add_add_C_comm3(2905; CHECK-NEXT: [[A:%.*]] = udiv i32 42, [[X:%.*]]2906; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B:%.*]]2907; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A]], [[TMP1]]2908; CHECK-NEXT: ret i1 [[CMP]]2909;2910 %a = udiv i32 42, %X ; thwart complexity-based canonicalization2911 %add1 = add i32 %b, %a2912 %add2 = add i32 %add1, -12913 %cmp = icmp ugt i32 %a, %add22914 ret i1 %cmp2915}2916 2917define i1 @icmp_add_add_C_extra_use1(i32 %a, i32 %b) {2918; CHECK-LABEL: @icmp_add_add_C_extra_use1(2919; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]2920; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], -12921; CHECK-NEXT: call void @use(i32 [[ADD2]])2922; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD2]], [[A]]2923; CHECK-NEXT: ret i1 [[CMP]]2924;2925 %add1 = add i32 %a, %b2926 %add2 = add i32 %add1, -12927 call void @use(i32 %add2)2928 %cmp = icmp ult i32 %add2, %a2929 ret i1 %cmp2930}2931 2932define i1 @icmp_add_add_C_extra_use2(i32 %a, i32 %b) {2933; CHECK-LABEL: @icmp_add_add_C_extra_use2(2934; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[A:%.*]], [[B:%.*]]2935; CHECK-NEXT: call void @use(i32 [[ADD1]])2936; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[B]]2937; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A]], [[TMP1]]2938; CHECK-NEXT: ret i1 [[CMP]]2939;2940 %add1 = add i32 %a, %b2941 call void @use(i32 %add1)2942 %add2 = add i32 %add1, -12943 %cmp = icmp ult i32 %add2, %a2944 ret i1 %cmp2945}2946 2947; PR57635 - fold ULT->ULE pre-decrement of a non-zero inputs2948 2949define i1 @icmp_dec_assume_nonzero(i8 %x) {2950; CHECK-LABEL: @icmp_dec_assume_nonzero(2951; CHECK-NEXT: [[Z:%.*]] = icmp ne i8 [[X:%.*]], 02952; CHECK-NEXT: call void @llvm.assume(i1 [[Z]])2953; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X]], 82954; CHECK-NEXT: ret i1 [[C]]2955;2956 %z = icmp ne i8 %x, 02957 call void @llvm.assume(i1 %z)2958 %i = add i8 %x, -12959 %c = icmp ult i8 %i, 72960 ret i1 %c2961}2962 2963define i1 @icmp_dec_sub_assume_nonzero(i8 %x) {2964; CHECK-LABEL: @icmp_dec_sub_assume_nonzero(2965; CHECK-NEXT: [[Z:%.*]] = icmp ne i8 [[X:%.*]], 02966; CHECK-NEXT: call void @llvm.assume(i1 [[Z]])2967; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X]], 122968; CHECK-NEXT: ret i1 [[C]]2969;2970 %z = icmp ne i8 %x, 02971 call void @llvm.assume(i1 %z)2972 %i = sub i8 %x, 12973 %c = icmp ult i8 %i, 112974 ret i1 %c2975}2976 2977define i1 @icmp_dec_nonzero(i16 %x) {2978; CHECK-LABEL: @icmp_dec_nonzero(2979; CHECK-NEXT: [[C:%.*]] = icmp ult i16 [[X:%.*]], 82980; CHECK-NEXT: ret i1 [[C]]2981;2982 %o = or i16 %x, 42983 %i = add i16 %o, -12984 %c = icmp ult i16 %i, 72985 ret i1 %c2986}2987 2988define <2 x i1> @icmp_dec_nonzero_vec(<2 x i32> %x) {2989; CHECK-LABEL: @icmp_dec_nonzero_vec(2990; CHECK-NEXT: [[O:%.*]] = or <2 x i32> [[X:%.*]], splat (i32 8)2991; CHECK-NEXT: [[I:%.*]] = add nsw <2 x i32> [[O]], splat (i32 -1)2992; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i32> [[I]], <i32 15, i32 17>2993; CHECK-NEXT: ret <2 x i1> [[C]]2994;2995 %o = or <2 x i32> %x, <i32 8, i32 8>2996 %i = add <2 x i32> %o, <i32 -1, i32 -1>2997 %c = icmp ult <2 x i32> %i, <i32 15, i32 17>2998 ret <2 x i1> %c2999}3000 3001; Negative test3002define i1 @icmp_dec_notnonzero(i8 %x) {3003; CHECK-LABEL: @icmp_dec_notnonzero(3004; CHECK-NEXT: [[I:%.*]] = add i8 [[X:%.*]], -13005; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[I]], 113006; CHECK-NEXT: ret i1 [[C]]3007;3008 %i = add i8 %x, -13009 %c = icmp ult i8 %i, 113010 ret i1 %c3011}3012 3013define i1 @icmp_addnuw_nonzero(i8 %x, i8 %y) {3014; CHECK-LABEL: @icmp_addnuw_nonzero(3015; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[X:%.*]], [[Y:%.*]]3016; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], 03017; CHECK-NEXT: ret i1 [[C]]3018;3019 %i = add nuw i8 %x, %y3020 %c = icmp eq i8 %i, 03021 ret i1 %c3022}3023 3024define i1 @icmp_addnuw_nonzero_fail_multiuse(i32 %x, i32 %y) {3025; CHECK-LABEL: @icmp_addnuw_nonzero_fail_multiuse(3026; CHECK-NEXT: [[I:%.*]] = add nuw i32 [[X:%.*]], [[Y:%.*]]3027; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[I]], 03028; CHECK-NEXT: call void @use(i32 [[I]])3029; CHECK-NEXT: ret i1 [[C]]3030;3031 %i = add nuw i32 %x, %y3032 %c = icmp eq i32 %i, 03033 call void @use(i32 %i)3034 ret i1 %c3035}3036 3037define i1 @ult_add_C2_pow2_C_neg(i8 %x) {3038; CHECK-LABEL: @ult_add_C2_pow2_C_neg(3039; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -323040; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[TMP1]], -643041; CHECK-NEXT: ret i1 [[C]]3042;3043 %i = add i8 %x, 323044 %c = icmp ult i8 %i, -323045 ret i1 %c3046}3047 3048define i1 @ult_add_nsw_C2_pow2_C_neg(i8 %x) {3049; CHECK-LABEL: @ult_add_nsw_C2_pow2_C_neg(3050; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -323051; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[TMP1]], -643052; CHECK-NEXT: ret i1 [[C]]3053;3054 %i = add nsw i8 %x, 323055 %c = icmp ult i8 %i, -323056 ret i1 %c3057}3058 3059define i1 @ult_add_nuw_nsw_C2_pow2_C_neg(i8 %x) {3060; CHECK-LABEL: @ult_add_nuw_nsw_C2_pow2_C_neg(3061; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X:%.*]], -643062; CHECK-NEXT: ret i1 [[C]]3063;3064 %i = add nuw nsw i8 %x, 323065 %c = icmp ult i8 %i, -323066 ret i1 %c3067}3068 3069define i1 @ult_add_C2_neg_C_pow2(i8 %x) {3070; CHECK-LABEL: @ult_add_C2_neg_C_pow2(3071; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -323072; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], 323073; CHECK-NEXT: ret i1 [[C]]3074;3075 %i = add i8 %x, -323076 %c = icmp ult i8 %i, 323077 ret i1 %c3078}3079 3080define <2 x i1> @ult_add_C2_pow2_C_neg_vec(<2 x i8> %x) {3081; CHECK-LABEL: @ult_add_C2_pow2_C_neg_vec(3082; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], splat (i8 -32)3083; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[TMP1]], splat (i8 -64)3084; CHECK-NEXT: ret <2 x i1> [[C]]3085;3086 %i = add <2 x i8> %x, <i8 32, i8 32>3087 %c = icmp ult <2 x i8> %i, <i8 -32, i8 -32>3088 ret <2 x i1> %c3089}3090 3091define i1 @ult_add_C2_pow2_C_neg_multiuse(i8 %x) {3092; CHECK-LABEL: @ult_add_C2_pow2_C_neg_multiuse(3093; CHECK-NEXT: [[I:%.*]] = add i8 [[X:%.*]], 323094; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[I]], -323095; CHECK-NEXT: call void @use(i8 [[I]])3096; CHECK-NEXT: ret i1 [[C]]3097;3098 %i = add i8 %x, 323099 %c = icmp ult i8 %i, -323100 call void @use(i8 %i)3101 ret i1 %c3102}3103 3104define i1 @uge_add_C2_pow2_C_neg(i8 %x) {3105; CHECK-LABEL: @uge_add_C2_pow2_C_neg(3106; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -323107; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], -643108; CHECK-NEXT: ret i1 [[C]]3109;3110 %i = add i8 %x, 323111 %c = icmp uge i8 %i, -323112 ret i1 %c3113}3114 3115declare void @llvm.assume(i1)3116 3117; Change an unsigned predicate to signed in icmp (add x, C1), C23118define i1 @icmp_add_constant_with_constant_ult_to_slt(i32 range(i32 -4, 10) %x) {3119; CHECK-LABEL: @icmp_add_constant_with_constant_ult_to_slt(3120; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 83121; CHECK-NEXT: ret i1 [[CMP]]3122;3123 %add = add nsw i32 %x, 53124 %cmp = icmp ult i32 %add, 133125 ret i1 %cmp3126}3127 3128define i1 @icmp_add_constant_with_constant_ugt_to_sgt(i32 range(i32 -4, 10) %x) {3129; CHECK-LABEL: @icmp_add_constant_with_constant_ugt_to_sgt(3130; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 23131; CHECK-NEXT: ret i1 [[CMP]]3132;3133 %add = add nsw i32 %x, 103134 %cmp = icmp ugt i32 %add, 123135 ret i1 %cmp3136}3137 3138; Negative test: x + C1 may be negative3139define i1 @icmp_add_constant_with_constant_ult_to_slt_neg1(i32 range(i32 -5, 10) %x) {3140; CHECK-LABEL: @icmp_add_constant_with_constant_ult_to_slt_neg1(3141; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X:%.*]], 43142; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 203143; CHECK-NEXT: ret i1 [[CMP]]3144;3145 %add = add nsw i32 %x, 43146 %cmp = icmp ult i32 %add, 203147 ret i1 %cmp3148}3149 3150; Negative test: missing nsw flag3151define i1 @icmp_add_constant_with_constant_ult_to_slt_neg2(i8 range(i8 -4, 120) %x) {3152; CHECK-LABEL: @icmp_add_constant_with_constant_ult_to_slt_neg2(3153; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X:%.*]], 153154; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[ADD]], 203155; CHECK-NEXT: ret i1 [[CMP]]3156;3157 %add = add i8 %x, 153158 %cmp = icmp ult i8 %add, 203159 ret i1 %cmp3160}3161 3162; Negative test: C2 is negative3163define i1 @icmp_add_constant_with_constant_ult_to_slt_neg3(i32 range(i32 -4, 10) %x) {3164; CHECK-LABEL: @icmp_add_constant_with_constant_ult_to_slt_neg3(3165; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X:%.*]], 43166; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], -63167; CHECK-NEXT: ret i1 [[CMP]]3168;3169 %add = add nsw i32 %x, 43170 %cmp = icmp ult i32 %add, -63171 ret i1 %cmp3172}3173 3174; Negative test: C2 - C1 is negative3175define i1 @icmp_add_constant_with_constant_ult_to_slt_neg4(i32 range(i32 -4, 10) %x) {3176; CHECK-LABEL: @icmp_add_constant_with_constant_ult_to_slt_neg4(3177; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X:%.*]], 53178; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 23179; CHECK-NEXT: ret i1 [[CMP]]3180;3181 %add = add nsw i32 %x, 53182 %cmp = icmp ult i32 %add, 23183 ret i1 %cmp3184}3185 3186; Same as before, but infer the range of ucmp3187define i1 @icmp_of_ucmp_plus_const_with_const(i32 %x, i32 %y) {3188; CHECK-LABEL: @icmp_of_ucmp_plus_const_with_const(3189; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]3190; CHECK-NEXT: ret i1 [[CMP2]]3191;3192 %cmp1 = call i8 @llvm.ucmp(i32 %x, i32 %y)3193 %add = add i8 %cmp1, 13194 %cmp2 = icmp ult i8 %add, 23195 ret i1 %cmp23196}3197 3198define i1 @zext_range_check_ult(i8 %x) {3199; CHECK-LABEL: @zext_range_check_ult(3200; CHECK-NEXT: entry:3201; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[X:%.*]], -43202; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP0]], 33203; CHECK-NEXT: ret i1 [[CMP]]3204;3205entry:3206 %conv = zext i8 %x to i323207 %add = add i32 %conv, -43208 %cmp = icmp ult i32 %add, 33209 ret i1 %cmp3210}3211 3212define i1 @zext_range_check_ugt(i8 %x) {3213; CHECK-LABEL: @zext_range_check_ugt(3214; CHECK-NEXT: entry:3215; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[X:%.*]], -73216; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP0]], -33217; CHECK-NEXT: ret i1 [[CMP]]3218;3219entry:3220 %conv = zext i8 %x to i323221 %add = add i32 %conv, -43222 %cmp = icmp ugt i32 %add, 23223 ret i1 %cmp3224}3225 3226define i1 @zext_range_check_ult_alter(i8 %x) {3227; CHECK-LABEL: @zext_range_check_ult_alter(3228; CHECK-NEXT: entry:3229; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[X:%.*]], -73230; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP0]], -33231; CHECK-NEXT: ret i1 [[CMP]]3232;3233entry:3234 %conv = zext i8 %x to i323235 %add = add i32 %conv, -73236 %cmp = icmp ult i32 %add, -33237 ret i1 %cmp3238}3239 3240define i1 @zext_range_check_ult_alter2(i8 %x) {3241; CHECK-LABEL: @zext_range_check_ult_alter2(3242; CHECK-NEXT: entry:3243; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 33244; CHECK-NEXT: ret i1 [[CMP]]3245;3246entry:3247 %conv = zext i8 %x to i323248 %add = add i32 %conv, -43249 %cmp = icmp ult i32 %add, 2533250 ret i1 %cmp3251}3252 3253define i1 @zext_range_check_mergable(i8 %x) {3254; CHECK-LABEL: @zext_range_check_mergable(3255; CHECK-NEXT: [[COND:%.*]] = icmp slt i8 [[X:%.*]], 73256; CHECK-NEXT: ret i1 [[COND]]3257;3258 %conv = zext i8 %x to i323259 %add = add nsw i32 %conv, -43260 %cmp1 = icmp ult i32 %add, 33261 %cmp2 = icmp slt i8 %x, 43262 %cond = select i1 %cmp2, i1 true, i1 %cmp13263 ret i1 %cond3264}3265 3266; Negative tests3267 3268define i1 @sext_range_check_ult(i8 %x) {3269; CHECK-LABEL: @sext_range_check_ult(3270; CHECK-NEXT: entry:3271; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i323272; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -43273; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 33274; CHECK-NEXT: ret i1 [[CMP]]3275;3276entry:3277 %conv = sext i8 %x to i323278 %add = add i32 %conv, -43279 %cmp = icmp ult i32 %add, 33280 ret i1 %cmp3281}3282 3283define i1 @zext_range_check_ult_illegal_type(i7 %x) {3284; CHECK-LABEL: @zext_range_check_ult_illegal_type(3285; CHECK-NEXT: entry:3286; CHECK-NEXT: [[CONV:%.*]] = zext i7 [[X:%.*]] to i323287; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -43288; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 33289; CHECK-NEXT: ret i1 [[CMP]]3290;3291entry:3292 %conv = zext i7 %x to i323293 %add = add i32 %conv, -43294 %cmp = icmp ult i32 %add, 33295 ret i1 %cmp3296}3297 3298; PR 1528513299 3300define i1 @val_is_aligend_const_pow2(i32 %num) {3301; CHECK-LABEL: @val_is_aligend_const_pow2(3302; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 40953303; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 03304; CHECK-NEXT: ret i1 [[_0]]3305;3306 %num.biased = add i32 %num, 40953307 %num.masked = and i32 %num.biased, -40963308 %_0 = icmp eq i32 %num.masked, %num3309 ret i1 %_03310}3311 3312define i1 @val_is_aligend_const_pow2_add_commute(i32 %num) {3313; CHECK-LABEL: @val_is_aligend_const_pow2_add_commute(3314; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 40953315; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 03316; CHECK-NEXT: ret i1 [[_0]]3317;3318 %num.biased = add i32 4095, %num3319 %num.masked = and i32 %num.biased, -40963320 %_0 = icmp eq i32 %num.masked, %num3321 ret i1 %_03322}3323 3324define i1 @val_is_aligend_const_pow2_and_commute(i32 %num) {3325; CHECK-LABEL: @val_is_aligend_const_pow2_and_commute(3326; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 40953327; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 03328; CHECK-NEXT: ret i1 [[_0]]3329;3330 %num.biased = add i32 %num, 40953331 %num.masked = and i32 -4096, %num.biased3332 %_0 = icmp eq i32 %num.masked, %num3333 ret i1 %_03334}3335 3336define i1 @val_is_aligend_const_pow2_icm_commute(i32 %num) {3337; CHECK-LABEL: @val_is_aligend_const_pow2_icm_commute(3338; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 40953339; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 03340; CHECK-NEXT: ret i1 [[_0]]3341;3342 %num.biased = add i32 %num, 40953343 %num.masked = and i32 %num.biased, -40963344 %_0 = icmp eq i32 %num, %num.masked3345 ret i1 %_03346}3347 3348; Should not work for non-power-of-two cases3349define i1 @val_is_aligend_const_non_pow2(i32 %num) {3350; CHECK-LABEL: @val_is_aligend_const_non_pow2(3351; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 63352; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -73353; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]3354; CHECK-NEXT: ret i1 [[_0]]3355;3356 %num.biased = add i32 %num, 63357 %num.masked = and i32 %num.biased, -73358 %_0 = icmp eq i32 %num.masked, %num3359 ret i1 %_03360}3361 3362define i1 @val_is_aligend_const_pow2_multiuse(i32 %num) {3363; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse(3364; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 40953365; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -40963366; CHECK-NEXT: call void @use(i32 [[NUM_MASKED]])3367; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]3368; CHECK-NEXT: ret i1 [[_0]]3369;3370 %num.biased = add i32 %num, 40953371 %num.masked = and i32 %num.biased, -40963372 call void @use(i32 %num.masked)3373 %_0 = icmp eq i32 %num.masked, %num3374 ret i1 %_03375}3376 3377; Applies since number of instructions do not change3378define i1 @val_is_aligend_const_pow2_multiuse1(i32 %num) {3379; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse1(3380; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 40953381; CHECK-NEXT: call void @use(i32 [[NUM_BIASED]])3382; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -40963383; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]3384; CHECK-NEXT: ret i1 [[_0]]3385;3386 %num.biased = add i32 %num, 40953387 call void @use(i32 %num.biased)3388 %num.masked = and i32 %num.biased, -40963389 %_0 = icmp eq i32 %num.masked, %num3390 ret i1 %_03391}3392 3393define i1 @val_is_aligend_const_pow2_ne(i32 %num) {3394; CHECK-LABEL: @val_is_aligend_const_pow2_ne(3395; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 40953396; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[TMP1]], 03397; CHECK-NEXT: ret i1 [[_0]]3398;3399 %num.biased = add i32 %num, 40953400 %num.masked = and i32 %num.biased, -40963401 %_0 = icmp ne i32 %num.masked, %num3402 ret i1 %_03403}3404 3405define i1 @val_is_aligend_const_mismatch(i32 %num) {3406; CHECK-LABEL: @val_is_aligend_const_mismatch(3407; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 40953408; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -40953409; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[NUM_MASKED]], [[NUM]]3410; CHECK-NEXT: ret i1 [[_0]]3411;3412 %num.biased = add i32 %num, 40953413 %num.masked = and i32 %num.biased, -40953414 %_0 = icmp ne i32 %num.masked, %num3415 ret i1 %_03416}3417 3418define i1 @val_is_aligend_const_mismatch1(i32 %num) {3419; CHECK-LABEL: @val_is_aligend_const_mismatch1(3420; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], -40963421; CHECK-NEXT: [[NUM_MASKED:%.*]] = add i32 [[TMP1]], 40963422; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[NUM_MASKED]], [[NUM]]3423; CHECK-NEXT: ret i1 [[_0]]3424;3425 %num.biased = add i32 %num, 40963426 %num.masked = and i32 %num.biased, -40963427 %_0 = icmp ne i32 %num.masked, %num3428 ret i1 %_03429}3430 3431define i1 @val_is_aligend_pred_mismatch(i32 %num) {3432; CHECK-LABEL: @val_is_aligend_pred_mismatch(3433; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], -40963434; CHECK-NEXT: [[NUM_MASKED:%.*]] = add i32 [[TMP1]], 40963435; CHECK-NEXT: [[_0:%.*]] = icmp sge i32 [[NUM_MASKED]], [[NUM]]3436; CHECK-NEXT: ret i1 [[_0]]3437;3438 %num.biased = add i32 %num, 40963439 %num.masked = and i32 %num.biased, -40963440 %_0 = icmp sge i32 %num.masked, %num3441 ret i1 %_03442}3443