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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare void @use64(i64)5declare void @llvm.assume(i1)6 7define i1 @mul_unkV_oddC_eq(i32 %v) {8; CHECK-LABEL: @mul_unkV_oddC_eq(9; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 010; CHECK-NEXT: ret i1 [[CMP]]11;12 %mul = mul i32 %v, 313 %cmp = icmp eq i32 %mul, 014 ret i1 %cmp15}16 17define i1 @mul_unkV_oddC_eq_nonzero(i32 %v) {18; CHECK-LABEL: @mul_unkV_oddC_eq_nonzero(19; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[V:%.*]], 320; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL]], 421; CHECK-NEXT: ret i1 [[CMP]]22;23 %mul = mul i32 %v, 324 %cmp = icmp eq i32 %mul, 425 ret i1 %cmp26}27 28define <2 x i1> @mul_unkV_oddC_ne_vec(<2 x i64> %v) {29; CHECK-LABEL: @mul_unkV_oddC_ne_vec(30; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i64> [[V:%.*]], zeroinitializer31; CHECK-NEXT: ret <2 x i1> [[CMP]]32;33 %mul = mul <2 x i64> %v, <i64 3, i64 3>34 %cmp = icmp ne <2 x i64> %mul, <i64 0, i64 0>35 ret <2 x i1> %cmp36}37 38define i1 @mul_assumeoddV_asumeoddV_eq(i16 %v, i16 %v2) {39; CHECK-LABEL: @mul_assumeoddV_asumeoddV_eq(40; CHECK-NEXT: [[LB:%.*]] = and i16 [[V:%.*]], 141; CHECK-NEXT: [[ODD:%.*]] = icmp ne i16 [[LB]], 042; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])43; CHECK-NEXT: [[LB2:%.*]] = and i16 [[V2:%.*]], 144; CHECK-NEXT: [[ODD2:%.*]] = icmp ne i16 [[LB2]], 045; CHECK-NEXT: call void @llvm.assume(i1 [[ODD2]])46; CHECK-NEXT: ret i1 true47;48 %lb = and i16 %v, 149 %odd = icmp ne i16 %lb, 050 call void @llvm.assume(i1 %odd)51 %lb2 = and i16 %v2, 152 %odd2 = icmp ne i16 %lb2, 053 call void @llvm.assume(i1 %odd2)54 %mul = mul i16 %v, %v255 %cmp = icmp ne i16 %mul, 056 ret i1 %cmp57}58 59define i1 @mul_unkV_oddC_sge(i8 %v) {60; CHECK-LABEL: @mul_unkV_oddC_sge(61; CHECK-NEXT: [[MUL:%.*]] = mul i8 [[V:%.*]], 362; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[MUL]], -163; CHECK-NEXT: ret i1 [[CMP]]64;65 %mul = mul i8 %v, 366 %cmp = icmp sge i8 %mul, 067 ret i1 %cmp68}69 70define i1 @mul_reused_unkV_oddC_ne(i64 %v) {71; CHECK-LABEL: @mul_reused_unkV_oddC_ne(72; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V:%.*]], 373; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[V]], 074; CHECK-NEXT: call void @use64(i64 [[MUL]])75; CHECK-NEXT: ret i1 [[CMP]]76;77 %mul = mul i64 %v, 378 %cmp = icmp ne i64 %mul, 079 call void @use64(i64 %mul)80 ret i1 %cmp81}82 83define i1 @mul_assumeoddV_unkV_eq(i16 %v, i16 %v2) {84; CHECK-LABEL: @mul_assumeoddV_unkV_eq(85; CHECK-NEXT: [[LB:%.*]] = and i16 [[V2:%.*]], 186; CHECK-NEXT: [[ODD:%.*]] = icmp ne i16 [[LB]], 087; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])88; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[V:%.*]], 089; CHECK-NEXT: ret i1 [[CMP]]90;91 %lb = and i16 %v2, 192 %odd = icmp eq i16 %lb, 193 call void @llvm.assume(i1 %odd)94 %mul = mul i16 %v, %v295 %cmp = icmp eq i16 %mul, 096 ret i1 %cmp97}98 99define i1 @mul_reusedassumeoddV_unkV_ne(i64 %v, i64 %v2) {100; CHECK-LABEL: @mul_reusedassumeoddV_unkV_ne(101; CHECK-NEXT: [[LB:%.*]] = and i64 [[V:%.*]], 1102; CHECK-NEXT: [[ODD:%.*]] = icmp ne i64 [[LB]], 0103; CHECK-NEXT: call void @llvm.assume(i1 [[ODD]])104; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V]], [[V2:%.*]]105; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[V2]], 0106; CHECK-NEXT: call void @use64(i64 [[MUL]])107; CHECK-NEXT: ret i1 [[CMP]]108;109 %lb = and i64 %v, 1110 %odd = icmp ne i64 %lb, 0111 call void @llvm.assume(i1 %odd)112 %mul = mul i64 %v, %v2113 %cmp = icmp ne i64 %mul, 0114 call void @use64(i64 %mul)115 ret i1 %cmp116}117 118define <2 x i1> @mul_setoddV_unkV_ne(<2 x i32> %v1, <2 x i32> %v2) {119; CHECK-LABEL: @mul_setoddV_unkV_ne(120; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V2:%.*]], zeroinitializer121; CHECK-NEXT: ret <2 x i1> [[CMP]]122;123 %v = or <2 x i32> %v1, <i32 1, i32 1>124 %mul = mul <2 x i32> %v, %v2125 %cmp = icmp ne <2 x i32> %mul, <i32 0, i32 0>126 ret <2 x i1> %cmp127}128 129define i1 @mul_broddV_unkV_eq(i16 %v, i16 %v2) {130; CHECK-LABEL: @mul_broddV_unkV_eq(131; CHECK-NEXT: [[LB:%.*]] = and i16 [[V2:%.*]], 1132; CHECK-NEXT: [[ODD_NOT:%.*]] = icmp eq i16 [[LB]], 0133; CHECK-NEXT: br i1 [[ODD_NOT]], label [[FALSE:%.*]], label [[TRUE:%.*]]134; CHECK: true:135; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[V:%.*]], 0136; CHECK-NEXT: ret i1 [[CMP]]137; CHECK: false:138; CHECK-NEXT: call void @use64(i16 [[V]])139; CHECK-NEXT: ret i1 false140;141 %lb = and i16 %v2, 1142 %odd = icmp eq i16 %lb, 1143 br i1 %odd, label %true, label %false144true:145 %mul = mul i16 %v, %v2146 %cmp = icmp eq i16 %mul, 0147 ret i1 %cmp148false:149 call void @use64(i16 %v)150 ret i1 false151}152 153define i1 @mul_unkV_evenC_ne(i64 %v) {154; CHECK-LABEL: @mul_unkV_evenC_ne(155; CHECK-NEXT: [[MUL_MASK:%.*]] = and i64 [[V:%.*]], 4611686018427387903156; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL_MASK]], 0157; CHECK-NEXT: ret i1 [[CMP]]158;159 %mul = mul i64 %v, 4160 %cmp = icmp ne i64 %mul, 0161 ret i1 %cmp162}163 164define i1 @mul_assumenzV_asumenzV_eq(i64 %v, i64 %v2) {165; CHECK-LABEL: @mul_assumenzV_asumenzV_eq(166; CHECK-NEXT: [[NZ:%.*]] = icmp ne i64 [[V:%.*]], 0167; CHECK-NEXT: call void @llvm.assume(i1 [[NZ]])168; CHECK-NEXT: [[NZ2:%.*]] = icmp ne i64 [[V2:%.*]], 0169; CHECK-NEXT: call void @llvm.assume(i1 [[NZ2]])170; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[V]], [[V2]]171; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[MUL]], 0172; CHECK-NEXT: ret i1 [[CMP]]173;174 %nz = icmp ne i64 %v, 0175 call void @llvm.assume(i1 %nz)176 %nz2 = icmp ne i64 %v2, 0177 call void @llvm.assume(i1 %nz2)178 %mul = mul i64 %v, %v2179 %cmp = icmp eq i64 %mul, 0180 ret i1 %cmp181}182 183define i1 @mul_assumenzV_unkV_nsw_ne(i32 %v, i32 %v2) {184; CHECK-LABEL: @mul_assumenzV_unkV_nsw_ne(185; CHECK-NEXT: [[NZ:%.*]] = icmp ne i32 [[V:%.*]], 0186; CHECK-NEXT: call void @llvm.assume(i1 [[NZ]])187; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V2:%.*]], 0188; CHECK-NEXT: ret i1 [[CMP]]189;190 %nz = icmp ne i32 %v, 0191 call void @llvm.assume(i1 %nz)192 %mul = mul nsw i32 %v, %v2193 %cmp = icmp ne i32 %mul, 0194 ret i1 %cmp195}196 197define i1 @mul_selectnzV_unkV_nsw_ne(i8 %v, i8 %v2) {198; CHECK-LABEL: @mul_selectnzV_unkV_nsw_ne(199; CHECK-NEXT: [[NZ:%.*]] = icmp ne i8 [[V:%.*]], 0200; CHECK-NEXT: [[MUL:%.*]] = mul nsw i8 [[V]], [[V2:%.*]]201; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[MUL]], 0202; CHECK-NEXT: [[R:%.*]] = select i1 [[NZ]], i1 [[CMP]], i1 false203; CHECK-NEXT: ret i1 [[R]]204;205 %nz = icmp ne i8 %v, 0206 %mul = mul nsw i8 %v, %v2207 %cmp = icmp ne i8 %mul, 0208 %r = select i1 %nz, i1 %cmp, i1 false209 ret i1 %r210}211 212define <2 x i1> @mul_unkV_unkV_nsw_nuw_ne(<2 x i16> %v, <2 x i16> %v2) {213; CHECK-LABEL: @mul_unkV_unkV_nsw_nuw_ne(214; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw <2 x i16> [[V:%.*]], [[V2:%.*]]215; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i16> [[MUL]], zeroinitializer216; CHECK-NEXT: ret <2 x i1> [[CMP]]217;218 %mul = mul nuw nsw <2 x i16> %v, %v2219 %cmp = icmp ne <2 x i16> %mul, <i16 0, i16 0>220 ret <2 x i1> %cmp221}222 223define i1 @mul_setnzV_unkV_nuw_eq(i8 %v1, i8 %v2) {224; CHECK-LABEL: @mul_setnzV_unkV_nuw_eq(225; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[V2:%.*]], 0226; CHECK-NEXT: ret i1 [[CMP]]227;228 %v = or i8 %v1, 2229 %mul = mul nuw i8 %v, %v2230 %cmp = icmp eq i8 %mul, 0231 ret i1 %cmp232}233 234define i1 @mul_brnzV_unkV_nuw_eq(i64 %v, i64 %v2) {235; CHECK-LABEL: @mul_brnzV_unkV_nuw_eq(236; CHECK-NEXT: [[NZ_NOT:%.*]] = icmp eq i64 [[V2:%.*]], 0237; CHECK-NEXT: br i1 [[NZ_NOT]], label [[FALSE:%.*]], label [[TRUE:%.*]]238; CHECK: true:239; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[V:%.*]], 0240; CHECK-NEXT: ret i1 [[CMP]]241; CHECK: false:242; CHECK-NEXT: call void @use64(i64 [[V]])243; CHECK-NEXT: ret i1 false244;245 %nz = icmp ne i64 %v2, 0246 br i1 %nz, label %true, label %false247true:248 %mul = mul nuw i64 %v, %v2249 %cmp = icmp eq i64 %mul, 0250 ret i1 %cmp251false:252 call void @use64(i64 %v)253 ret i1 false254}255 256define i1 @test_icmp_sgt_and_negpow2_zero(i32 %add) {257; CHECK-LABEL: @test_icmp_sgt_and_negpow2_zero(258; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[ADD:%.*]], 7259; CHECK-NEXT: ret i1 [[CMP]]260;261 %and = and i32 %add, -8262 %cmp = icmp sgt i32 %and, 0263 ret i1 %cmp264}265 266define i1 @test_icmp_slt_and_negpow2_one(i32 %add) {267; CHECK-LABEL: @test_icmp_slt_and_negpow2_one(268; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD:%.*]], 8269; CHECK-NEXT: ret i1 [[CMP]]270;271 %and = and i32 %add, -8272 %cmp = icmp slt i32 %and, 1273 ret i1 %cmp274}275 276define i1 @test_icmp_sgt_and_negpow2_nonzero(i32 %add) {277; CHECK-LABEL: @test_icmp_sgt_and_negpow2_nonzero(278; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD:%.*]], -8279; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[AND]], -2280; CHECK-NEXT: ret i1 [[CMP]]281;282 %and = and i32 %add, -8283 %cmp = icmp sgt i32 %and, -2284 ret i1 %cmp285}286 287define i1 @test_icmp_sgt_and_nonnegpow2_zero(i32 %add) {288; CHECK-LABEL: @test_icmp_sgt_and_nonnegpow2_zero(289; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD:%.*]], 8290; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0291; CHECK-NEXT: ret i1 [[CMP]]292;293 %and = and i32 %add, 8294 %cmp = icmp sgt i32 %and, 0295 ret i1 %cmp296}297 298define i1 @test_icmp_ult_and_negpow2_one(i32 %add) {299; CHECK-LABEL: @test_icmp_ult_and_negpow2_one(300; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD:%.*]], 8301; CHECK-NEXT: ret i1 [[CMP]]302;303 %and = and i32 %add, -8304 %cmp = icmp ult i32 %and, 1305 ret i1 %cmp306}307 308define i1 @test_imply_dom_condition(i32 %add) {309; CHECK-LABEL: @test_imply_dom_condition(310; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[ADD:%.*]], 7311; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])312; CHECK-NEXT: ret i1 false313;314 %and = and i32 %add, -8315 %cmp = icmp sgt i32 %and, 0316 tail call void @llvm.assume(i1 %cmp)317 %min.iters.check = icmp ult i32 %and, 8318 ret i1 %min.iters.check319}320 321define i1 @test_icmp_slt_and_negpow2_c(i32 %add) {322; CHECK-LABEL: @test_icmp_slt_and_negpow2_c(323; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD:%.*]], 32324; CHECK-NEXT: ret i1 [[CMP]]325;326 %and = and i32 %add, -32327 %cmp = icmp slt i32 %and, 16328 ret i1 %cmp329}330 331define i1 @test_icmp_slt_and_negpow2_invalid_c(i32 %add) {332; CHECK-LABEL: @test_icmp_slt_and_negpow2_invalid_c(333; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD:%.*]], -32334; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[AND]], 48335; CHECK-NEXT: ret i1 [[CMP]]336;337 %and = and i32 %add, -32338 %cmp = icmp slt i32 %and, 48339 ret i1 %cmp340}341 342define i1 @test_icmp_sgt_and_negpow2_c(i32 %add) {343; CHECK-LABEL: @test_icmp_sgt_and_negpow2_c(344; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[ADD:%.*]], 31345; CHECK-NEXT: ret i1 [[CMP]]346;347 %and = and i32 %add, -32348 %cmp = icmp sgt i32 %and, 16349 ret i1 %cmp350}351 352define i1 @test_icmp_sgt_and_negpow2_invalid_c(i32 %add) {353; CHECK-LABEL: @test_icmp_sgt_and_negpow2_invalid_c(354; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD:%.*]], -32355; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[AND]], 48356; CHECK-NEXT: ret i1 [[CMP]]357;358 %and = and i32 %add, -32359 %cmp = icmp sgt i32 %and, 48360 ret i1 %cmp361}362 363define i1 @icmp_eq_or_of_selects_with_constant(i1 %a, i1 %b) {364; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant(365; CHECK-NEXT: [[CMP:%.*]] = and i1 [[A:%.*]], [[B:%.*]]366; CHECK-NEXT: ret i1 [[CMP]]367;368 %s1 = select i1 %a, i64 65536, i64 0369 %s2 = select i1 %b, i64 256, i64 0370 %or = or i64 %s1, %s2371 %cmp = icmp eq i64 %or, 65792372 ret i1 %cmp373}374 375define i1 @icmp_slt_and_of_selects_with_constant(i1 %a, i1 %b) {376; CHECK-LABEL: @icmp_slt_and_of_selects_with_constant(377; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[A:%.*]], [[B:%.*]]378; CHECK-NEXT: [[CMP:%.*]] = xor i1 [[TMP1]], true379; CHECK-NEXT: ret i1 [[CMP]]380;381 %s1 = select i1 %a, i8 1, i8 254382 %s2 = select i1 %b, i8 1, i8 253383 %and = and i8 %s1, %s2384 %cmp = icmp slt i8 %and, 254385 ret i1 %cmp386}387 388define i1 @icmp_sge_add_of_selects_with_constant(i1 %a, i1 %b) {389; CHECK-LABEL: @icmp_sge_add_of_selects_with_constant(390; CHECK-NEXT: ret i1 true391;392 %s1 = select i1 %a, i8 248, i8 7393 %s2 = select i1 %b, i8 16, i8 0394 %add = add i8 %s1, %s2395 %cmp = icmp sge i8 %add, 247396 ret i1 %cmp397}398 399define i1 @icmp_eq_or_of_selects_with_constant_multiuse_foldable(i1 %a, i1 %b) {400; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant_multiuse_foldable(401; CHECK-NEXT: [[S1:%.*]] = select i1 [[A:%.*]], i64 65536, i64 0402; CHECK-NEXT: [[S2:%.*]] = select i1 [[B:%.*]], i64 256, i64 0403; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[S1]], [[S2]]404; CHECK-NEXT: call void @use64(i64 [[OR]])405; CHECK-NEXT: [[CMP:%.*]] = and i1 [[A]], [[B]]406; CHECK-NEXT: ret i1 [[CMP]]407;408 %s1 = select i1 %a, i64 65536, i64 0409 %s2 = select i1 %b, i64 256, i64 0410 %or = or i64 %s1, %s2411 call void @use64(i64 %or)412 %cmp = icmp eq i64 %or, 65792413 ret i1 %cmp414}415 416define <2 x i1> @icmp_eq_or_of_selects_with_constant_vectorized(<2 x i1> %a, <2 x i1> %b) {417; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant_vectorized(418; CHECK-NEXT: [[CMP:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]419; CHECK-NEXT: ret <2 x i1> [[CMP]]420;421 %s1 = select <2 x i1> %a, <2 x i64> <i64 65536, i64 65536>, <2 x i64> zeroinitializer422 %s2 = select <2 x i1> %b, <2 x i64> <i64 256, i64 256>, <2 x i64> zeroinitializer423 %or = or <2 x i64> %s1, %s2424 %cmp = icmp eq <2 x i64> %or, <i64 65792, i64 65792>425 ret <2 x i1> %cmp426}427 428define <2 x i1> @icmp_eq_or_of_selects_with_scalar_cond_constant_vectorized(i1 %a, i1 %b) {429; CHECK-LABEL: @icmp_eq_or_of_selects_with_scalar_cond_constant_vectorized(430; CHECK-NEXT: [[S1:%.*]] = select i1 [[A:%.*]], <2 x i64> splat (i64 65536), <2 x i64> zeroinitializer431; CHECK-NEXT: [[S2:%.*]] = select i1 [[B:%.*]], <2 x i64> splat (i64 256), <2 x i64> zeroinitializer432; CHECK-NEXT: [[OR:%.*]] = or disjoint <2 x i64> [[S1]], [[S2]]433; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[OR]], splat (i64 65792)434; CHECK-NEXT: ret <2 x i1> [[CMP]]435;436 %s1 = select i1 %a, <2 x i64> <i64 65536, i64 65536>, <2 x i64> zeroinitializer437 %s2 = select i1 %b, <2 x i64> <i64 256, i64 256>, <2 x i64> zeroinitializer438 %or = or <2 x i64> %s1, %s2439 %cmp = icmp eq <2 x i64> %or, <i64 65792, i64 65792>440 ret <2 x i1> %cmp441}442 443; Negative tests.444define i1 @icmp_eq_or_of_selects_with_constant_and_arg(i1 %a, i1 %b, i64 %arg) {445; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant_and_arg(446; CHECK-NEXT: [[S1:%.*]] = select i1 [[A:%.*]], i64 65536, i64 [[ARG:%.*]]447; CHECK-NEXT: [[S2:%.*]] = select i1 [[B:%.*]], i64 256, i64 0448; CHECK-NEXT: [[OR:%.*]] = or i64 [[S1]], [[S2]]449; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[OR]], 65792450; CHECK-NEXT: ret i1 [[CMP]]451;452 %s1 = select i1 %a, i64 65536, i64 %arg453 %s2 = select i1 %b, i64 256, i64 0454 %or = or i64 %s1, %s2455 %cmp = icmp eq i64 %or, 65792456 ret i1 %cmp457}458 459define i1 @icmp_eq_or_of_selects_with_constant_multiuse(i1 %a, i1 %b) {460; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant_multiuse(461; CHECK-NEXT: [[S1:%.*]] = select i1 [[A:%.*]], i64 0, i64 65536462; CHECK-NEXT: [[S2:%.*]] = select i1 [[B:%.*]], i64 0, i64 256463; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[S1]], [[S2]]464; CHECK-NEXT: call void @use64(i64 [[OR]])465; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[OR]], 65792466; CHECK-NEXT: ret i1 [[CMP]]467;468 %s1 = select i1 %a, i64 0, i64 65536469 %s2 = select i1 %b, i64 0, i64 256470 %or = or i64 %s1, %s2471 call void @use64(i64 %or)472 %cmp = icmp eq i64 %or, 65792473 ret i1 %cmp474}475 476define <2 x i1> @icmp_eq_or_of_selects_with_constant_vectorized_nonsplat(<2 x i1> %a, <2 x i1> %b) {477; CHECK-LABEL: @icmp_eq_or_of_selects_with_constant_vectorized_nonsplat(478; CHECK-NEXT: [[S1:%.*]] = select <2 x i1> [[A:%.*]], <2 x i64> splat (i64 65536), <2 x i64> zeroinitializer479; CHECK-NEXT: [[S2:%.*]] = select <2 x i1> [[B:%.*]], <2 x i64> <i64 256, i64 128>, <2 x i64> zeroinitializer480; CHECK-NEXT: [[OR:%.*]] = or disjoint <2 x i64> [[S1]], [[S2]]481; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[OR]], <i64 65792, i64 65664>482; CHECK-NEXT: ret <2 x i1> [[CMP]]483;484 %s1 = select <2 x i1> %a, <2 x i64> <i64 65536, i64 65536>, <2 x i64> zeroinitializer485 %s2 = select <2 x i1> %b, <2 x i64> <i64 256, i64 128>, <2 x i64> zeroinitializer486 %or = or <2 x i64> %s1, %s2487 %cmp = icmp eq <2 x i64> %or, <i64 65792, i64 65664>488 ret <2 x i1> %cmp489}490