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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; PR19405 6define i1 @zext_zext_sgt(i8 %x, i8 %y) {7; CHECK-LABEL: @zext_zext_sgt(8; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]9; CHECK-NEXT:    ret i1 [[C]]10;11  %a = zext i8 %x to i3212  %b = zext i8 %y to i3213  %c = icmp sgt i32 %a, %b14  ret i1 %c15}16 17define <2 x i1> @zext_zext_ugt(<2 x i8> %x, <2 x i8> %y) {18; CHECK-LABEL: @zext_zext_ugt(19; CHECK-NEXT:    [[C:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]20; CHECK-NEXT:    ret <2 x i1> [[C]]21;22  %a = zext <2 x i8> %x to <2 x i32>23  %b = zext <2 x i8> %y to <2 x i32>24  %c = icmp ugt <2 x i32> %a, %b25  ret <2 x i1> %c26}27 28define i1 @zext_zext_eq(i8 %x, i8 %y) {29; CHECK-LABEL: @zext_zext_eq(30; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]]31; CHECK-NEXT:    ret i1 [[C]]32;33  %a = zext i8 %x to i3234  %b = zext i8 %y to i3235  %c = icmp eq i32 %a, %b36  ret i1 %c37}38 39define i1 @zext_zext_sle_op0_narrow(i8 %x, i16 %y) {40; CHECK-LABEL: @zext_zext_sle_op0_narrow(41; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[X:%.*]] to i1642; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[Y:%.*]], [[TMP1]]43; CHECK-NEXT:    ret i1 [[C]]44;45  %a = zext i8 %x to i3246  %b = zext i16 %y to i3247  %c = icmp sle i32 %a, %b48  ret i1 %c49}50 51define i1 @zext_zext_ule_op0_wide(i9 %x, i8 %y) {52; CHECK-LABEL: @zext_zext_ule_op0_wide(53; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[Y:%.*]] to i954; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[X:%.*]], [[TMP1]]55; CHECK-NEXT:    ret i1 [[C]]56;57  %a = zext i9 %x to i3258  %b = zext i8 %y to i3259  %c = icmp ule i32 %a, %b60  ret i1 %c61}62 63define i1 @sext_sext_slt(i8 %x, i8 %y) {64; CHECK-LABEL: @sext_sext_slt(65; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]66; CHECK-NEXT:    ret i1 [[C]]67;68  %a = sext i8 %x to i3269  %b = sext i8 %y to i3270  %c = icmp slt i32 %a, %b71  ret i1 %c72}73 74define i1 @sext_sext_ult(i8 %x, i8 %y) {75; CHECK-LABEL: @sext_sext_ult(76; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]77; CHECK-NEXT:    ret i1 [[C]]78;79  %a = sext i8 %x to i3280  %b = sext i8 %y to i3281  %c = icmp ult i32 %a, %b82  ret i1 %c83}84 85define i1 @sext_sext_ne(i8 %x, i8 %y) {86; CHECK-LABEL: @sext_sext_ne(87; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], [[Y:%.*]]88; CHECK-NEXT:    ret i1 [[C]]89;90  %a = sext i8 %x to i3291  %b = sext i8 %y to i3292  %c = icmp ne i32 %a, %b93  ret i1 %c94}95 96define i1 @sext_sext_sge_op0_narrow(i5 %x, i8 %y) {97; CHECK-LABEL: @sext_sext_sge_op0_narrow(98; CHECK-NEXT:    [[TMP1:%.*]] = sext i5 [[X:%.*]] to i899; CHECK-NEXT:    [[C:%.*]] = icmp sle i8 [[Y:%.*]], [[TMP1]]100; CHECK-NEXT:    ret i1 [[C]]101;102  %a = sext i5 %x to i32103  %b = sext i8 %y to i32104  %c = icmp sge i32 %a, %b105  ret i1 %c106}107 108define <2 x i1> @sext_sext_uge_op0_wide(<2 x i16> %x, <2 x i8> %y) {109; CHECK-LABEL: @sext_sext_uge_op0_wide(110; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i8> [[Y:%.*]] to <2 x i16>111; CHECK-NEXT:    [[C:%.*]] = icmp uge <2 x i16> [[X:%.*]], [[TMP1]]112; CHECK-NEXT:    ret <2 x i1> [[C]]113;114  %a = sext <2 x i16> %x to <2 x i32>115  %b = sext <2 x i8> %y to <2 x i32>116  %c = icmp uge <2 x i32> %a, %b117  ret <2 x i1> %c118}119 120define i1 @zext_sext_sgt(i8 %x, i8 %y) {121; CHECK-LABEL: @zext_sext_sgt(122; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32123; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32124; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[A]], [[B]]125; CHECK-NEXT:    ret i1 [[C]]126;127  %a = zext i8 %x to i32128  %b = sext i8 %y to i32129  %c = icmp sgt i32 %a, %b130  ret i1 %c131}132 133define i1 @zext_nneg_sext_sgt(i8 %x, i8 %y) {134; CHECK-LABEL: @zext_nneg_sext_sgt(135; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]136; CHECK-NEXT:    ret i1 [[C]]137;138  %a = zext nneg i8 %x to i32139  %b = sext i8 %y to i32140  %c = icmp sgt i32 %a, %b141  ret i1 %c142}143 144define i1 @zext_sext_ugt(i8 %x, i8 %y) {145; CHECK-LABEL: @zext_sext_ugt(146; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32147; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32148; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 [[A]], [[B]]149; CHECK-NEXT:    ret i1 [[C]]150;151  %a = zext i8 %x to i32152  %b = sext i8 %y to i32153  %c = icmp ugt i32 %a, %b154  ret i1 %c155}156 157 158define i1 @zext_nneg_sext_ugt(i8 %x, i8 %y) {159; CHECK-LABEL: @zext_nneg_sext_ugt(160; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]161; CHECK-NEXT:    ret i1 [[C]]162;163  %a = zext nneg i8 %x to i32164  %b = sext i8 %y to i32165  %c = icmp ugt i32 %a, %b166  ret i1 %c167}168 169define i1 @zext_sext_eq(i8 %x, i8 %y) {170; CHECK-LABEL: @zext_sext_eq(171; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32172; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32173; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[A]], [[B]]174; CHECK-NEXT:    ret i1 [[C]]175;176  %a = zext i8 %x to i32177  %b = sext i8 %y to i32178  %c = icmp eq i32 %a, %b179  ret i1 %c180}181 182define i1 @zext_nneg_sext_eq(i8 %x, i8 %y) {183; CHECK-LABEL: @zext_nneg_sext_eq(184; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]]185; CHECK-NEXT:    ret i1 [[C]]186;187  %a = zext nneg i8 %x to i32188  %b = sext i8 %y to i32189  %c = icmp eq i32 %a, %b190  ret i1 %c191}192 193 194define i1 @zext_sext_sle_op0_narrow(i8 %x, i16 %y) {195; CHECK-LABEL: @zext_sext_sle_op0_narrow(196; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32197; CHECK-NEXT:    [[B:%.*]] = sext i16 [[Y:%.*]] to i32198; CHECK-NEXT:    [[C:%.*]] = icmp sle i32 [[A]], [[B]]199; CHECK-NEXT:    ret i1 [[C]]200;201  %a = zext i8 %x to i32202  %b = sext i16 %y to i32203  %c = icmp sle i32 %a, %b204  ret i1 %c205}206 207 208define i1 @zext_nneg_sext_sle_op0_narrow(i8 %x, i16 %y) {209; CHECK-LABEL: @zext_nneg_sext_sle_op0_narrow(210; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[X:%.*]] to i16211; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[Y:%.*]], [[TMP1]]212; CHECK-NEXT:    ret i1 [[C]]213;214  %a = zext nneg i8 %x to i32215  %b = sext i16 %y to i32216  %c = icmp sle i32 %a, %b217  ret i1 %c218}219 220define i1 @zext_sext_ule_op0_wide(i9 %x, i8 %y) {221; CHECK-LABEL: @zext_sext_ule_op0_wide(222; CHECK-NEXT:    [[A:%.*]] = zext i9 [[X:%.*]] to i32223; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32224; CHECK-NEXT:    [[C:%.*]] = icmp ule i32 [[A]], [[B]]225; CHECK-NEXT:    ret i1 [[C]]226;227  %a = zext i9 %x to i32228  %b = sext i8 %y to i32229  %c = icmp ule i32 %a, %b230  ret i1 %c231}232 233define i1 @zext_nneg_sext_ule_op0_wide(i9 %x, i8 %y) {234; CHECK-LABEL: @zext_nneg_sext_ule_op0_wide(235; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i9236; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[X:%.*]], [[TMP1]]237; CHECK-NEXT:    ret i1 [[C]]238;239  %a = zext nneg i9 %x to i32240  %b = sext i8 %y to i32241  %c = icmp ule i32 %a, %b242  ret i1 %c243}244 245define i1 @sext_zext_slt(i8 %x, i8 %y) {246; CHECK-LABEL: @sext_zext_slt(247; CHECK-NEXT:    [[A:%.*]] = sext i8 [[X:%.*]] to i32248; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32249; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[A]], [[B]]250; CHECK-NEXT:    ret i1 [[C]]251;252  %a = sext i8 %x to i32253  %b = zext i8 %y to i32254  %c = icmp slt i32 %a, %b255  ret i1 %c256}257 258 259define i1 @sext_zext_nneg_slt(i8 %x, i8 %y) {260; CHECK-LABEL: @sext_zext_nneg_slt(261; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]262; CHECK-NEXT:    ret i1 [[C]]263;264  %a = sext i8 %x to i32265  %b = zext nneg i8 %y to i32266  %c = icmp slt i32 %a, %b267  ret i1 %c268}269 270define i1 @sext_zext_ult(i8 %x, i8 %y) {271; CHECK-LABEL: @sext_zext_ult(272; CHECK-NEXT:    [[A:%.*]] = sext i8 [[X:%.*]] to i32273; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32274; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[A]], [[B]]275; CHECK-NEXT:    ret i1 [[C]]276;277  %a = sext i8 %x to i32278  %b = zext i8 %y to i32279  %c = icmp ult i32 %a, %b280  ret i1 %c281}282 283define i1 @sext_zext_nneg_ult(i8 %x, i8 %y) {284; CHECK-LABEL: @sext_zext_nneg_ult(285; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]286; CHECK-NEXT:    ret i1 [[C]]287;288  %a = sext i8 %x to i32289  %b = zext nneg i8 %y to i32290  %c = icmp ult i32 %a, %b291  ret i1 %c292}293 294define <2 x i1> @sext_zext_ne(<2 x i8> %x, <2 x i8> %y) {295; CHECK-LABEL: @sext_zext_ne(296; CHECK-NEXT:    [[A:%.*]] = sext <2 x i8> [[X:%.*]] to <2 x i32>297; CHECK-NEXT:    [[B:%.*]] = zext <2 x i8> [[Y:%.*]] to <2 x i32>298; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i32> [[A]], [[B]]299; CHECK-NEXT:    ret <2 x i1> [[C]]300;301  %a = sext <2 x i8> %x to <2 x i32>302  %b = zext <2 x i8> %y to <2 x i32>303  %c = icmp ne <2 x i32> %a, %b304  ret <2 x i1> %c305}306 307 308define <2 x i1> @sext_zext_nneg_ne(<2 x i8> %x, <2 x i8> %y) {309; CHECK-LABEL: @sext_zext_nneg_ne(310; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i8> [[X:%.*]], [[Y:%.*]]311; CHECK-NEXT:    ret <2 x i1> [[C]]312;313  %a = sext <2 x i8> %x to <2 x i32>314  %b = zext nneg <2 x i8> %y to <2 x i32>315  %c = icmp ne <2 x i32> %a, %b316  ret <2 x i1> %c317}318 319define i1 @sext_zext_sge_op0_narrow(i5 %x, i8 %y) {320; CHECK-LABEL: @sext_zext_sge_op0_narrow(321; CHECK-NEXT:    [[A:%.*]] = sext i5 [[X:%.*]] to i32322; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32323; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[A]], [[B]]324; CHECK-NEXT:    ret i1 [[C]]325;326  %a = sext i5 %x to i32327  %b = zext i8 %y to i32328  %c = icmp sge i32 %a, %b329  ret i1 %c330}331 332 333define i1 @sext_zext_nneg_sge_op0_narrow(i5 %x, i8 %y) {334; CHECK-LABEL: @sext_zext_nneg_sge_op0_narrow(335; CHECK-NEXT:    [[TMP1:%.*]] = sext i5 [[X:%.*]] to i8336; CHECK-NEXT:    [[C:%.*]] = icmp sle i8 [[Y:%.*]], [[TMP1]]337; CHECK-NEXT:    ret i1 [[C]]338;339  %a = sext i5 %x to i32340  %b = zext nneg i8 %y to i32341  %c = icmp sge i32 %a, %b342  ret i1 %c343}344 345define i1 @sext_zext_uge_op0_wide(i16 %x, i8 %y) {346; CHECK-LABEL: @sext_zext_uge_op0_wide(347; CHECK-NEXT:    [[A:%.*]] = sext i16 [[X:%.*]] to i32348; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32349; CHECK-NEXT:    [[C:%.*]] = icmp uge i32 [[A]], [[B]]350; CHECK-NEXT:    ret i1 [[C]]351;352  %a = sext i16 %x to i32353  %b = zext i8 %y to i32354  %c = icmp uge i32 %a, %b355  ret i1 %c356}357 358 359define i1 @sext_zext_nneg_uge_op0_wide(i16 %x, i8 %y) {360; CHECK-LABEL: @sext_zext_nneg_uge_op0_wide(361; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i16362; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[X:%.*]], [[TMP1]]363; CHECK-NEXT:    ret i1 [[C]]364;365  %a = sext i16 %x to i32366  %b = zext nneg i8 %y to i32367  %c = icmp uge i32 %a, %b368  ret i1 %c369}370 371define i1 @zext_sext_sgt_known_nonneg(i8 %x, i8 %y) {372; CHECK-LABEL: @zext_sext_sgt_known_nonneg(373; CHECK-NEXT:    [[N:%.*]] = udiv i8 127, [[X:%.*]]374; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[N]], [[Y:%.*]]375; CHECK-NEXT:    ret i1 [[C]]376;377  %n = udiv i8 127, %x378  %a = zext i8 %n to i32379  %b = sext i8 %y to i32380  %c = icmp sgt i32 %a, %b381  ret i1 %c382}383 384define i1 @zext_sext_ugt_known_nonneg(i8 %x, i8 %y) {385; CHECK-LABEL: @zext_sext_ugt_known_nonneg(386; CHECK-NEXT:    [[N:%.*]] = and i8 [[X:%.*]], 127387; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[N]], [[Y:%.*]]388; CHECK-NEXT:    ret i1 [[C]]389;390  %n = and i8 %x, 127391  %a = zext i8 %n to i32392  %b = sext i8 %y to i32393  %c = icmp ugt i32 %a, %b394  ret i1 %c395}396 397define i1 @zext_sext_eq_known_nonneg(i8 %x, i8 %y) {398; CHECK-LABEL: @zext_sext_eq_known_nonneg(399; CHECK-NEXT:    [[N:%.*]] = lshr i8 [[X:%.*]], 1400; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[N]], [[Y:%.*]]401; CHECK-NEXT:    ret i1 [[C]]402;403  %n = lshr i8 %x, 1404  %a = zext i8 %n to i32405  %b = sext i8 %y to i32406  %c = icmp eq i32 %a, %b407  ret i1 %c408}409 410define i1 @zext_sext_sle_known_nonneg_op0_narrow(i8 %x, i16 %y) {411; CHECK-LABEL: @zext_sext_sle_known_nonneg_op0_narrow(412; CHECK-NEXT:    [[N:%.*]] = and i8 [[X:%.*]], 12413; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i8 [[N]] to i16414; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[Y:%.*]], [[TMP1]]415; CHECK-NEXT:    ret i1 [[C]]416;417  %n = and i8 %x, 12418  %a = zext i8 %n to i32419  %b = sext i16 %y to i32420  %c = icmp sle i32 %a, %b421  ret i1 %c422}423 424define i1 @zext_sext_ule_known_nonneg_op0_wide(i9 %x, i8 %y) {425; CHECK-LABEL: @zext_sext_ule_known_nonneg_op0_wide(426; CHECK-NEXT:    [[N:%.*]] = urem i9 [[X:%.*]], 254427; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i9428; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[N]], [[TMP1]]429; CHECK-NEXT:    ret i1 [[C]]430;431  %n = urem i9 %x, 254432  %a = zext i9 %n to i32433  %b = sext i8 %y to i32434  %c = icmp ule i32 %a, %b435  ret i1 %c436}437 438define i1 @sext_zext_slt_known_nonneg(i8 %x, i8 %y) {439; CHECK-LABEL: @sext_zext_slt_known_nonneg(440; CHECK-NEXT:    [[N:%.*]] = and i8 [[Y:%.*]], 126441; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[N]]442; CHECK-NEXT:    ret i1 [[C]]443;444  %a = sext i8 %x to i32445  %n = and i8 %y, 126446  %b = zext i8 %n to i32447  %c = icmp slt i32 %a, %b448  ret i1 %c449}450 451define i1 @sext_zext_ult_known_nonneg(i8 %x, i8 %y) {452; CHECK-LABEL: @sext_zext_ult_known_nonneg(453; CHECK-NEXT:    [[N:%.*]] = lshr i8 [[Y:%.*]], 6454; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[N]]455; CHECK-NEXT:    ret i1 [[C]]456;457  %a = sext i8 %x to i32458  %n = lshr i8 %y, 6459  %b = zext i8 %n to i32460  %c = icmp ult i32 %a, %b461  ret i1 %c462}463 464define i1 @sext_zext_ne_known_nonneg(i8 %x, i8 %y) {465; CHECK-LABEL: @sext_zext_ne_known_nonneg(466; CHECK-NEXT:    [[N:%.*]] = udiv i8 [[Y:%.*]], 6467; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], [[N]]468; CHECK-NEXT:    ret i1 [[C]]469;470  %a = sext i8 %x to i32471  %n = udiv i8 %y, 6472  %b = zext i8 %n to i32473  %c = icmp ne i32 %a, %b474  ret i1 %c475}476 477define <2 x i1> @sext_zext_sge_known_nonneg_op0_narrow(<2 x i5> %x, <2 x i8> %y) {478; CHECK-LABEL: @sext_zext_sge_known_nonneg_op0_narrow(479; CHECK-NEXT:    [[N:%.*]] = mul nsw <2 x i8> [[Y:%.*]], [[Y]]480; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i5> [[X:%.*]] to <2 x i8>481; CHECK-NEXT:    [[C:%.*]] = icmp sle <2 x i8> [[N]], [[TMP1]]482; CHECK-NEXT:    ret <2 x i1> [[C]]483;484  %a = sext <2 x i5> %x to <2 x i32>485  %n = mul nsw <2 x i8> %y, %y486  %b = zext <2 x i8> %n to <2 x i32>487  %c = icmp sge <2 x i32> %a, %b488  ret <2 x i1> %c489}490 491define i1 @sext_zext_uge_known_nonneg_op0_wide(i16 %x, i8 %y) {492; CHECK-LABEL: @sext_zext_uge_known_nonneg_op0_wide(493; CHECK-NEXT:    [[N:%.*]] = and i8 [[Y:%.*]], 12494; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i8 [[N]] to i16495; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[X:%.*]], [[TMP1]]496; CHECK-NEXT:    ret i1 [[C]]497;498  %a = sext i16 %x to i32499  %n = and i8 %y, 12500  %b = zext i8 %n to i32501  %c = icmp uge i32 %a, %b502  ret i1 %c503}504 505 506define i1 @zext_eq_sext(i1 %a, i1 %b) {507; CHECK-LABEL: @zext_eq_sext(508; CHECK-NEXT:    [[TMP1:%.*]] = or i1 [[A:%.*]], [[B:%.*]]509; CHECK-NEXT:    [[TOBOOL4:%.*]] = xor i1 [[TMP1]], true510; CHECK-NEXT:    ret i1 [[TOBOOL4]]511;512  %conv = zext i1 %a to i32513  %conv3.neg = sext i1 %b to i32514  %tobool4 = icmp eq i32 %conv, %conv3.neg515  ret i1 %tobool4516}517 518define i1 @zext_eq_sext_fail_not_i1(i1 %a, i8 %b) {519; CHECK-LABEL: @zext_eq_sext_fail_not_i1(520; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[A:%.*]] to i32521; CHECK-NEXT:    [[CONV3_NEG:%.*]] = sext i8 [[B:%.*]] to i32522; CHECK-NEXT:    [[TOBOOL4:%.*]] = icmp eq i32 [[CONV]], [[CONV3_NEG]]523; CHECK-NEXT:    ret i1 [[TOBOOL4]]524;525  %conv = zext i1 %a to i32526  %conv3.neg = sext i8 %b to i32527  %tobool4 = icmp eq i32 %conv, %conv3.neg528  ret i1 %tobool4529}530 531define <2 x i1> @zext_ne_sext(<2 x i1> %a, <2 x i1> %b) {532; CHECK-LABEL: @zext_ne_sext(533; CHECK-NEXT:    [[TMP1:%.*]] = or <2 x i1> [[B:%.*]], [[A:%.*]]534; CHECK-NEXT:    ret <2 x i1> [[TMP1]]535;536  %conv = zext <2 x i1> %a to <2 x i8>537  %conv3.neg = sext <2 x i1> %b to <2 x i8>538  %tobool4 = icmp ne <2 x i8> %conv3.neg, %conv539  ret <2 x i1> %tobool4540}541