1928 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=instcombine -S -o - %s | FileCheck %s3 4define i1 @masked_and_notallzeroes(i32 %A) {5; CHECK-LABEL: @masked_and_notallzeroes(6; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 77; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 08; CHECK-NEXT: ret i1 [[TST1]]9;10 %mask1 = and i32 %A, 711 %tst1 = icmp ne i32 %mask1, 012 %mask2 = and i32 %A, 3913 %tst2 = icmp ne i32 %mask2, 014 %res = and i1 %tst1, %tst215 ret i1 %res16}17 18define <2 x i1> @masked_and_notallzeroes_splat(<2 x i32> %A) {19; CHECK-LABEL: @masked_and_notallzeroes_splat(20; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i32> [[A:%.*]], splat (i32 7)21; CHECK-NEXT: [[TST1:%.*]] = icmp ne <2 x i32> [[MASK1]], zeroinitializer22; CHECK-NEXT: ret <2 x i1> [[TST1]]23;24 %mask1 = and <2 x i32> %A, <i32 7, i32 7>25 %tst1 = icmp ne <2 x i32> %mask1, <i32 0, i32 0>26 %mask2 = and <2 x i32> %A, <i32 39, i32 39>27 %tst2 = icmp ne <2 x i32> %mask2, <i32 0, i32 0>28 %res = and <2 x i1> %tst1, %tst229 ret <2 x i1> %res30}31 32define i1 @masked_and_notallzeroes_logical(i32 %A) {33; CHECK-LABEL: @masked_and_notallzeroes_logical(34; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 735; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 036; CHECK-NEXT: ret i1 [[TST1]]37;38 %mask1 = and i32 %A, 739 %tst1 = icmp ne i32 %mask1, 040 %mask2 = and i32 %A, 3941 %tst2 = icmp ne i32 %mask2, 042 %res = select i1 %tst1, i1 %tst2, i1 false43 ret i1 %res44}45 46define i1 @masked_or_allzeroes(i32 %A) {47; CHECK-LABEL: @masked_or_allzeroes(48; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 749; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 050; CHECK-NEXT: ret i1 [[TST1]]51;52 %mask1 = and i32 %A, 753 %tst1 = icmp eq i32 %mask1, 054 %mask2 = and i32 %A, 3955 %tst2 = icmp eq i32 %mask2, 056 %res = or i1 %tst1, %tst257 ret i1 %res58}59 60define i1 @masked_or_allzeroes_logical(i32 %A) {61; CHECK-LABEL: @masked_or_allzeroes_logical(62; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 763; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 064; CHECK-NEXT: ret i1 [[TST1]]65;66 %mask1 = and i32 %A, 767 %tst1 = icmp eq i32 %mask1, 068 %mask2 = and i32 %A, 3969 %tst2 = icmp eq i32 %mask2, 070 %res = select i1 %tst1, i1 true, i1 %tst271 ret i1 %res72}73 74define i1 @masked_and_notallones(i32 %A) {75; CHECK-LABEL: @masked_and_notallones(76; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 777; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 778; CHECK-NEXT: ret i1 [[TST1]]79;80 %mask1 = and i32 %A, 781 %tst1 = icmp ne i32 %mask1, 782 %mask2 = and i32 %A, 3983 %tst2 = icmp ne i32 %mask2, 3984 %res = and i1 %tst1, %tst285 ret i1 %res86}87 88define i1 @masked_and_notallones_logical(i32 %A) {89; CHECK-LABEL: @masked_and_notallones_logical(90; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 791; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 792; CHECK-NEXT: ret i1 [[TST1]]93;94 %mask1 = and i32 %A, 795 %tst1 = icmp ne i32 %mask1, 796 %mask2 = and i32 %A, 3997 %tst2 = icmp ne i32 %mask2, 3998 %res = select i1 %tst1, i1 %tst2, i1 false99 ret i1 %res100}101 102define i1 @masked_or_allones(i32 %A) {103; CHECK-LABEL: @masked_or_allones(104; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7105; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 7106; CHECK-NEXT: ret i1 [[TST1]]107;108 %mask1 = and i32 %A, 7109 %tst1 = icmp eq i32 %mask1, 7110 %mask2 = and i32 %A, 39111 %tst2 = icmp eq i32 %mask2, 39112 %res = or i1 %tst1, %tst2113 ret i1 %res114}115 116define i1 @masked_or_allones_logical(i32 %A) {117; CHECK-LABEL: @masked_or_allones_logical(118; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7119; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 7120; CHECK-NEXT: ret i1 [[TST1]]121;122 %mask1 = and i32 %A, 7123 %tst1 = icmp eq i32 %mask1, 7124 %mask2 = and i32 %A, 39125 %tst2 = icmp eq i32 %mask2, 39126 %res = select i1 %tst1, i1 true, i1 %tst2127 ret i1 %res128}129 130define i1 @masked_and_notA(i32 %A) {131; CHECK-LABEL: @masked_and_notA(132; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -79133; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[TMP1]], 0134; CHECK-NEXT: ret i1 [[TST2]]135;136 %mask1 = and i32 %A, 14137 %tst1 = icmp ne i32 %mask1, %A138 %mask2 = and i32 %A, 78139 %tst2 = icmp ne i32 %mask2, %A140 %res = and i1 %tst1, %tst2141 ret i1 %res142}143 144define i1 @masked_and_notA_logical(i32 %A) {145; CHECK-LABEL: @masked_and_notA_logical(146; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -79147; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[TMP1]], 0148; CHECK-NEXT: ret i1 [[TST2]]149;150 %mask1 = and i32 %A, 14151 %tst1 = icmp ne i32 %mask1, %A152 %mask2 = and i32 %A, 78153 %tst2 = icmp ne i32 %mask2, %A154 %res = select i1 %tst1, i1 %tst2, i1 false155 ret i1 %res156}157 158define i1 @masked_and_notA_slightly_optimized(i32 %A) {159; CHECK-LABEL: @masked_and_notA_slightly_optimized(160; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -40161; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[TMP1]], 0162; CHECK-NEXT: ret i1 [[TST2]]163;164 %t0 = icmp uge i32 %A, 8165 %mask2 = and i32 %A, 39166 %tst2 = icmp ne i32 %mask2, %A167 %res = and i1 %t0, %tst2168 ret i1 %res169}170 171define i1 @masked_and_notA_slightly_optimized_logical(i32 %A) {172; CHECK-LABEL: @masked_and_notA_slightly_optimized_logical(173; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -40174; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[TMP1]], 0175; CHECK-NEXT: ret i1 [[TST2]]176;177 %t0 = icmp uge i32 %A, 8178 %mask2 = and i32 %A, 39179 %tst2 = icmp ne i32 %mask2, %A180 %res = select i1 %t0, i1 %tst2, i1 false181 ret i1 %res182}183 184define i1 @masked_or_A(i32 %A) {185; CHECK-LABEL: @masked_or_A(186; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -79187; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[TMP1]], 0188; CHECK-NEXT: ret i1 [[TST2]]189;190 %mask1 = and i32 %A, 14191 %tst1 = icmp eq i32 %mask1, %A192 %mask2 = and i32 %A, 78193 %tst2 = icmp eq i32 %mask2, %A194 %res = or i1 %tst1, %tst2195 ret i1 %res196}197 198define i1 @masked_or_A_logical(i32 %A) {199; CHECK-LABEL: @masked_or_A_logical(200; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -79201; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[TMP1]], 0202; CHECK-NEXT: ret i1 [[TST2]]203;204 %mask1 = and i32 %A, 14205 %tst1 = icmp eq i32 %mask1, %A206 %mask2 = and i32 %A, 78207 %tst2 = icmp eq i32 %mask2, %A208 %res = select i1 %tst1, i1 true, i1 %tst2209 ret i1 %res210}211 212define i1 @masked_or_A_slightly_optimized(i32 %A) {213; CHECK-LABEL: @masked_or_A_slightly_optimized(214; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -40215; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[TMP1]], 0216; CHECK-NEXT: ret i1 [[TST2]]217;218 %t0 = icmp ult i32 %A, 8219 %mask2 = and i32 %A, 39220 %tst2 = icmp eq i32 %mask2, %A221 %res = or i1 %t0, %tst2222 ret i1 %res223}224 225define i1 @masked_or_A_slightly_optimized_logical(i32 %A) {226; CHECK-LABEL: @masked_or_A_slightly_optimized_logical(227; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -40228; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[TMP1]], 0229; CHECK-NEXT: ret i1 [[TST2]]230;231 %t0 = icmp ult i32 %A, 8232 %mask2 = and i32 %A, 39233 %tst2 = icmp eq i32 %mask2, %A234 %res = select i1 %t0, i1 true, i1 %tst2235 ret i1 %res236}237 238define i1 @masked_or_allzeroes_notoptimised(i32 %A) {239; CHECK-LABEL: @masked_or_allzeroes_notoptimised(240; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15241; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0242; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39243; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0244; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]245; CHECK-NEXT: ret i1 [[RES]]246;247 %mask1 = and i32 %A, 15248 %tst1 = icmp eq i32 %mask1, 0249 %mask2 = and i32 %A, 39250 %tst2 = icmp eq i32 %mask2, 0251 %res = or i1 %tst1, %tst2252 ret i1 %res253}254 255define i1 @masked_or_allzeroes_notoptimised_logical(i32 %A) {256; CHECK-LABEL: @masked_or_allzeroes_notoptimised_logical(257; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 15258; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0259; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39260; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0261; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]262; CHECK-NEXT: ret i1 [[RES]]263;264 %mask1 = and i32 %A, 15265 %tst1 = icmp eq i32 %mask1, 0266 %mask2 = and i32 %A, 39267 %tst2 = icmp eq i32 %mask2, 0268 %res = select i1 %tst1, i1 true, i1 %tst2269 ret i1 %res270}271 272define i1 @nomask_lhs(i32 %in) {273; CHECK-LABEL: @nomask_lhs(274; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1275; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASKED]], 0276; CHECK-NEXT: ret i1 [[TST2]]277;278 %tst1 = icmp eq i32 %in, 0279 %masked = and i32 %in, 1280 %tst2 = icmp eq i32 %masked, 0281 %val = or i1 %tst1, %tst2282 ret i1 %val283}284 285define i1 @nomask_lhs_logical(i32 %in) {286; CHECK-LABEL: @nomask_lhs_logical(287; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1288; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASKED]], 0289; CHECK-NEXT: ret i1 [[TST2]]290;291 %tst1 = icmp eq i32 %in, 0292 %masked = and i32 %in, 1293 %tst2 = icmp eq i32 %masked, 0294 %val = select i1 %tst1, i1 true, i1 %tst2295 ret i1 %val296}297 298define i1 @nomask_rhs(i32 %in) {299; CHECK-LABEL: @nomask_rhs(300; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1301; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASKED]], 0302; CHECK-NEXT: ret i1 [[TST1]]303;304 %masked = and i32 %in, 1305 %tst1 = icmp eq i32 %masked, 0306 %tst2 = icmp eq i32 %in, 0307 %val = or i1 %tst1, %tst2308 ret i1 %val309}310 311define i1 @nomask_rhs_logical(i32 %in) {312; CHECK-LABEL: @nomask_rhs_logical(313; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1314; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASKED]], 0315; CHECK-NEXT: ret i1 [[TST1]]316;317 %masked = and i32 %in, 1318 %tst1 = icmp eq i32 %masked, 0319 %tst2 = icmp eq i32 %in, 0320 %val = select i1 %tst1, i1 true, i1 %tst2321 ret i1 %val322}323 324; TODO: This test simplifies to a constant, so the functionality and test could be in InstSimplify.325 326define i1 @fold_mask_cmps_to_false(i32 %x) {327; CHECK-LABEL: @fold_mask_cmps_to_false(328; CHECK-NEXT: ret i1 false329;330 %t1 = and i32 %x, 2147483647331 %t2 = icmp eq i32 %t1, 0332 %t3 = icmp eq i32 %x, 2147483647333 %t4 = and i1 %t3, %t2334 ret i1 %t4335}336 337define i1 @fold_mask_cmps_to_false_logical(i32 %x) {338; CHECK-LABEL: @fold_mask_cmps_to_false_logical(339; CHECK-NEXT: ret i1 false340;341 %t1 = and i32 %x, 2147483647342 %t2 = icmp eq i32 %t1, 0343 %t3 = icmp eq i32 %x, 2147483647344 %t4 = select i1 %t3, i1 %t2, i1 false345 ret i1 %t4346}347 348; TODO: This test simplifies to a constant, so the functionality and test could be in InstSimplify.349 350define i1 @fold_mask_cmps_to_true(i32 %x) {351; CHECK-LABEL: @fold_mask_cmps_to_true(352; CHECK-NEXT: ret i1 true353;354 %t1 = and i32 %x, 2147483647355 %t2 = icmp ne i32 %t1, 0356 %t3 = icmp ne i32 %x, 2147483647357 %t4 = or i1 %t3, %t2358 ret i1 %t4359}360 361define i1 @fold_mask_cmps_to_true_logical(i32 %x) {362; CHECK-LABEL: @fold_mask_cmps_to_true_logical(363; CHECK-NEXT: ret i1 true364;365 %t1 = and i32 %x, 2147483647366 %t2 = icmp ne i32 %t1, 0367 %t3 = icmp ne i32 %x, 2147483647368 %t4 = select i1 %t3, i1 true, i1 %t2369 ret i1 %t4370}371 372define <2 x i1> @nomask_splat_and_B_allones(<2 x i32> %A) {373; CHECK-LABEL: @nomask_splat_and_B_allones(374; CHECK-NEXT: [[RES:%.*]] = icmp ugt <2 x i32> [[A:%.*]], splat (i32 -268435457)375; CHECK-NEXT: ret <2 x i1> [[RES]]376;377 %tst1 = icmp slt <2 x i32> %A, <i32 0, i32 poison>378 %mask2 = and <2 x i32> %A, <i32 1879048192, i32 1879048192>379 %tst2 = icmp eq <2 x i32> %mask2, <i32 1879048192, i32 1879048192>380 %res = and <2 x i1> %tst1, %tst2381 ret <2 x i1> %res382}383 384define <2 x i1> @nomask_splat_and_B_mixed(<2 x i32> %A) {385; CHECK-LABEL: @nomask_splat_and_B_mixed(386; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], splat (i32 -268435456)387; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 1879048192)388; CHECK-NEXT: ret <2 x i1> [[RES]]389;390 %tst1 = icmp sgt <2 x i32> %A, <i32 -1, i32 poison>391 %mask2 = and <2 x i32> %A, <i32 1879048192, i32 1879048192>392 %tst2 = icmp eq <2 x i32> %mask2, <i32 1879048192, i32 1879048192>393 %res = and <2 x i1> %tst1, %tst2394 ret <2 x i1> %res395}396 397; PR32401 - https://bugs.llvm.org/show_bug.cgi?id=32401398 399define i1 @cmpeq_bitwise(i8 %a, i8 %b, i8 %c, i8 %d) {400; CHECK-LABEL: @cmpeq_bitwise(401; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[A:%.*]], [[B:%.*]]402; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[C:%.*]], [[D:%.*]]403; CHECK-NEXT: [[CMP:%.*]] = and i1 [[TMP1]], [[TMP2]]404; CHECK-NEXT: ret i1 [[CMP]]405;406 %xor1 = xor i8 %a, %b407 %xor2 = xor i8 %c, %d408 %or = or i8 %xor1, %xor2409 %cmp = icmp eq i8 %or, 0410 ret i1 %cmp411}412 413define <2 x i1> @cmpne_bitwise(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, <2 x i64> %d) {414; CHECK-LABEL: @cmpne_bitwise(415; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i64> [[A:%.*]], [[B:%.*]]416; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i64> [[C:%.*]], [[D:%.*]]417; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP1]], [[TMP2]]418; CHECK-NEXT: ret <2 x i1> [[CMP]]419;420 %xor1 = xor <2 x i64> %a, %b421 %xor2 = xor <2 x i64> %c, %d422 %or = or <2 x i64> %xor1, %xor2423 %cmp = icmp ne <2 x i64> %or, zeroinitializer424 ret <2 x i1> %cmp425}426 427; ((X & 12) != 0 & (X & 3) == 1) -> no change428define i1 @masked_icmps_mask_notallzeros_bmask_mixed_0(i32 %x) {429; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_0(430; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12431; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0432; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3433; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1434; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]435; CHECK-NEXT: ret i1 [[T5]]436;437 %t1 = and i32 %x, 12438 %t2 = icmp ne i32 %t1, 0439 %t3 = and i32 %x, 3440 %t4 = icmp eq i32 %t3, 1441 %t5 = and i1 %t2, %t4442 ret i1 %t5443}444 445define i1 @masked_icmps_mask_notallzeros_bmask_mixed_0_logical(i32 %x) {446; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_0_logical(447; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12448; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0449; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3450; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1451; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]452; CHECK-NEXT: ret i1 [[T5]]453;454 %t1 = and i32 %x, 12455 %t2 = icmp ne i32 %t1, 0456 %t3 = and i32 %x, 3457 %t4 = icmp eq i32 %t3, 1458 %t5 = select i1 %t2, i1 %t4, i1 false459 ret i1 %t5460}461 462; ((X & 12) != 0 & (X & 7) == 1) -> (X & 15) == 9463define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1(i32 %x) {464; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1(465; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15466; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 9467; CHECK-NEXT: ret i1 [[T5]]468;469 %t1 = and i32 %x, 12470 %t2 = icmp ne i32 %t1, 0471 %t3 = and i32 %x, 7472 %t4 = icmp eq i32 %t3, 1473 %t5 = and i1 %t2, %t4474 ret i1 %t5475}476 477define <2 x i1> @masked_icmps_mask_notallzeros_bmask_mixed_1_vector(<2 x i32> %x) {478; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_vector(479; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 15)480; CHECK-NEXT: [[T5:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 9)481; CHECK-NEXT: ret <2 x i1> [[T5]]482;483 %t1 = and <2 x i32> %x, <i32 12, i32 12>484 %t2 = icmp ne <2 x i32> %t1, zeroinitializer485 %t3 = and <2 x i32> %x, <i32 7, i32 7>486 %t4 = icmp eq <2 x i32> %t3, <i32 1, i32 1>487 %t5 = and <2 x i1> %t2, %t4488 ret <2 x i1> %t5489}490 491define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(i32 %x) {492; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(493; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15494; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 9495; CHECK-NEXT: ret i1 [[T5]]496;497 %t1 = and i32 %x, 12498 %t2 = icmp ne i32 %t1, 0499 %t3 = and i32 %x, 7500 %t4 = icmp eq i32 %t3, 1501 %t5 = select i1 %t2, i1 %t4, i1 false502 ret i1 %t5503}504 505; ((X & 14) != 0 & (X & 3) == 1) -> no change506define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1b(i32 %x) {507; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1b(508; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 14509; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0510; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3511; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1512; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]513; CHECK-NEXT: ret i1 [[T5]]514;515 %t1 = and i32 %x, 14516 %t2 = icmp ne i32 %t1, 0517 %t3 = and i32 %x, 3518 %t4 = icmp eq i32 %t3, 1519 %t5 = and i1 %t2, %t4520 ret i1 %t5521}522 523define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1b_logical(i32 %x) {524; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1b_logical(525; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 14526; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0527; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3528; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1529; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]530; CHECK-NEXT: ret i1 [[T5]]531;532 %t1 = and i32 %x, 14533 %t2 = icmp ne i32 %t1, 0534 %t3 = and i32 %x, 3535 %t4 = icmp eq i32 %t3, 1536 %t5 = select i1 %t2, i1 %t4, i1 false537 ret i1 %t5538}539 540; ((X & 3) != 0 & (X & 7) == 0) -> false541define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2(i32 %x) {542; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_2(543; CHECK-NEXT: ret i1 false544;545 %t1 = and i32 %x, 3546 %t2 = icmp ne i32 %t1, 0547 %t3 = and i32 %x, 7548 %t4 = icmp eq i32 %t3, 0549 %t5 = and i1 %t2, %t4550 ret i1 %t5551}552 553define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(i32 %x) {554; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(555; CHECK-NEXT: ret i1 false556;557 %t1 = and i32 %x, 3558 %t2 = icmp ne i32 %t1, 0559 %t3 = and i32 %x, 7560 %t4 = icmp eq i32 %t3, 0561 %t5 = select i1 %t2, i1 %t4, i1 false562 ret i1 %t5563}564 565; ((X & 15) != 0 & (X & 7) == 0) -> (X & 15) == 8566define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3(i32 %x) {567; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3(568; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15569; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 8570; CHECK-NEXT: ret i1 [[T5]]571;572 %t1 = and i32 %x, 15573 %t2 = icmp ne i32 %t1, 0574 %t3 = and i32 %x, 7575 %t4 = icmp eq i32 %t3, 0576 %t5 = and i1 %t2, %t4577 ret i1 %t5578}579 580define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(i32 %x) {581; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(582; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15583; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 8584; CHECK-NEXT: ret i1 [[T5]]585;586 %t1 = and i32 %x, 15587 %t2 = icmp ne i32 %t1, 0588 %t3 = and i32 %x, 7589 %t4 = icmp eq i32 %t3, 0590 %t5 = select i1 %t2, i1 %t4, i1 false591 ret i1 %t5592}593 594; ((X & 15) != 0 & (X & 3) == 0) -> no change595define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3b(i32 %x) {596; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3b(597; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15598; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0599; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3600; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0601; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]602; CHECK-NEXT: ret i1 [[T5]]603;604 %t1 = and i32 %x, 15605 %t2 = icmp ne i32 %t1, 0606 %t3 = and i32 %x, 3607 %t4 = icmp eq i32 %t3, 0608 %t5 = and i1 %t2, %t4609 ret i1 %t5610}611 612define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3b_logical(i32 %x) {613; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3b_logical(614; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15615; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0616; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3617; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0618; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]619; CHECK-NEXT: ret i1 [[T5]]620;621 %t1 = and i32 %x, 15622 %t2 = icmp ne i32 %t1, 0623 %t3 = and i32 %x, 3624 %t4 = icmp eq i32 %t3, 0625 %t5 = select i1 %t2, i1 %t4, i1 false626 ret i1 %t5627}628 629; ((X & 255) != 0 & (X & 15) == 8) -> (X & 15) == 8630define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4(i32 %x) {631; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_4(632; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15633; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8634; CHECK-NEXT: ret i1 [[T4]]635;636 %t1 = and i32 %x, 255637 %t2 = icmp ne i32 %t1, 0638 %t3 = and i32 %x, 15639 %t4 = icmp eq i32 %t3, 8640 %t5 = and i1 %t2, %t4641 ret i1 %t5642}643 644define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(i32 %x) {645; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(646; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15647; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8648; CHECK-NEXT: ret i1 [[T4]]649;650 %t1 = and i32 %x, 255651 %t2 = icmp ne i32 %t1, 0652 %t3 = and i32 %x, 15653 %t4 = icmp eq i32 %t3, 8654 %t5 = select i1 %t2, i1 %t4, i1 false655 ret i1 %t5656}657 658; ((X & 15) != 0 & (X & 15) == 8) -> (X & 15) == 8659define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5(i32 %x) {660; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_5(661; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15662; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8663; CHECK-NEXT: ret i1 [[T4]]664;665 %t1 = and i32 %x, 15666 %t2 = icmp ne i32 %t1, 0667 %t3 = and i32 %x, 15668 %t4 = icmp eq i32 %t3, 8669 %t5 = and i1 %t2, %t4670 ret i1 %t5671}672 673define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(i32 %x) {674; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(675; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15676; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8677; CHECK-NEXT: ret i1 [[T4]]678;679 %t1 = and i32 %x, 15680 %t2 = icmp ne i32 %t1, 0681 %t3 = and i32 %x, 15682 %t4 = icmp eq i32 %t3, 8683 %t5 = select i1 %t2, i1 %t4, i1 false684 ret i1 %t5685}686 687; ((X & 12) != 0 & (X & 15) == 8) -> (X & 15) == 8688define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6(i32 %x) {689; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_6(690; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15691; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8692; CHECK-NEXT: ret i1 [[T4]]693;694 %t1 = and i32 %x, 12695 %t2 = icmp ne i32 %t1, 0696 %t3 = and i32 %x, 15697 %t4 = icmp eq i32 %t3, 8698 %t5 = and i1 %t2, %t4699 ret i1 %t5700}701 702define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(i32 %x) {703; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(704; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15705; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8706; CHECK-NEXT: ret i1 [[T4]]707;708 %t1 = and i32 %x, 12709 %t2 = icmp ne i32 %t1, 0710 %t3 = and i32 %x, 15711 %t4 = icmp eq i32 %t3, 8712 %t5 = select i1 %t2, i1 %t4, i1 false713 ret i1 %t5714}715 716; ((X & 7) != 0 & (X & 15) == 8) -> false717define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7(i32 %x) {718; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7(719; CHECK-NEXT: ret i1 false720;721 %t1 = and i32 %x, 7722 %t2 = icmp ne i32 %t1, 0723 %t3 = and i32 %x, 15724 %t4 = icmp eq i32 %t3, 8725 %t5 = and i1 %t2, %t4726 ret i1 %t5727}728 729define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(i32 %x) {730; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(731; CHECK-NEXT: ret i1 false732;733 %t1 = and i32 %x, 7734 %t2 = icmp ne i32 %t1, 0735 %t3 = and i32 %x, 15736 %t4 = icmp eq i32 %t3, 8737 %t5 = select i1 %t2, i1 %t4, i1 false738 ret i1 %t5739}740 741; ((X & 6) != 0 & (X & 15) == 8) -> false742define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b(i32 %x) {743; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7b(744; CHECK-NEXT: ret i1 false745;746 %t1 = and i32 %x, 6747 %t2 = icmp ne i32 %t1, 0748 %t3 = and i32 %x, 15749 %t4 = icmp eq i32 %t3, 8750 %t5 = and i1 %t2, %t4751 ret i1 %t5752}753 754define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(i32 %x) {755; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(756; CHECK-NEXT: ret i1 false757;758 %t1 = and i32 %x, 6759 %t2 = icmp ne i32 %t1, 0760 %t3 = and i32 %x, 15761 %t4 = icmp eq i32 %t3, 8762 %t5 = select i1 %t2, i1 %t4, i1 false763 ret i1 %t5764}765 766; ((X & 12) == 0 | (X & 3) != 1) -> !((X & 12) != 0 & (X & 3) == 1)) ->767; no change768define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_0(i32 %x) {769; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_0(770; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12771; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0772; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3773; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1774; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]775; CHECK-NEXT: ret i1 [[T5]]776;777 %t1 = and i32 %x, 12778 %t2 = icmp eq i32 %t1, 0779 %t3 = and i32 %x, 3780 %t4 = icmp ne i32 %t3, 1781 %t5 = or i1 %t2, %t4782 ret i1 %t5783}784 785define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_0_logical(i32 %x) {786; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_0_logical(787; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12788; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0789; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3790; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1791; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]792; CHECK-NEXT: ret i1 [[T5]]793;794 %t1 = and i32 %x, 12795 %t2 = icmp eq i32 %t1, 0796 %t3 = and i32 %x, 3797 %t4 = icmp ne i32 %t3, 1798 %t5 = select i1 %t2, i1 true, i1 %t4799 ret i1 %t5800}801 802; ((X & 12) == 0 | (X & 7) != 1) -> !((X & 12) != 0 & (X & 7) == 1) ->803; !((X & 15) == 9) -> (X & 15) != 9804define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1(i32 %x) {805; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1(806; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15807; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 9808; CHECK-NEXT: ret i1 [[T5]]809;810 %t1 = and i32 %x, 12811 %t2 = icmp eq i32 %t1, 0812 %t3 = and i32 %x, 7813 %t4 = icmp ne i32 %t3, 1814 %t5 = or i1 %t2, %t4815 ret i1 %t5816}817 818define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(i32 %x) {819; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(820; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15821; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 9822; CHECK-NEXT: ret i1 [[T5]]823;824 %t1 = and i32 %x, 12825 %t2 = icmp eq i32 %t1, 0826 %t3 = and i32 %x, 7827 %t4 = icmp ne i32 %t3, 1828 %t5 = select i1 %t2, i1 true, i1 %t4829 ret i1 %t5830}831 832; ((X & 14) == 0 | (X & 3) != 1) -> !((X & 14) != 0 & (X & 3) == 1) ->833; no change.834define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b(i32 %x) {835; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b(836; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 14837; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0838; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3839; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1840; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]841; CHECK-NEXT: ret i1 [[T5]]842;843 %t1 = and i32 %x, 14844 %t2 = icmp eq i32 %t1, 0845 %t3 = and i32 %x, 3846 %t4 = icmp ne i32 %t3, 1847 %t5 = or i1 %t2, %t4848 ret i1 %t5849}850 851define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b_logical(i32 %x) {852; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b_logical(853; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 14854; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0855; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3856; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1857; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]858; CHECK-NEXT: ret i1 [[T5]]859;860 %t1 = and i32 %x, 14861 %t2 = icmp eq i32 %t1, 0862 %t3 = and i32 %x, 3863 %t4 = icmp ne i32 %t3, 1864 %t5 = select i1 %t2, i1 true, i1 %t4865 ret i1 %t5866}867 868; ((X & 3) == 0 | (X & 7) != 0) -> !((X & 3) != 0 & (X & 7) == 0) ->869; !(false) -> true870define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2(i32 %x) {871; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_2(872; CHECK-NEXT: ret i1 true873;874 %t1 = and i32 %x, 3875 %t2 = icmp eq i32 %t1, 0876 %t3 = and i32 %x, 7877 %t4 = icmp ne i32 %t3, 0878 %t5 = or i1 %t2, %t4879 ret i1 %t5880}881 882define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(i32 %x) {883; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(884; CHECK-NEXT: ret i1 true885;886 %t1 = and i32 %x, 3887 %t2 = icmp eq i32 %t1, 0888 %t3 = and i32 %x, 7889 %t4 = icmp ne i32 %t3, 0890 %t5 = select i1 %t2, i1 true, i1 %t4891 ret i1 %t5892}893 894; ((X & 15) == 0 | (X & 7) != 0) -> !((X & 15) != 0 & (X & 7) == 0) ->895; !((X & 15) == 8) -> (X & 15) != 8896define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3(i32 %x) {897; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3(898; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15899; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 8900; CHECK-NEXT: ret i1 [[T5]]901;902 %t1 = and i32 %x, 15903 %t2 = icmp eq i32 %t1, 0904 %t3 = and i32 %x, 7905 %t4 = icmp ne i32 %t3, 0906 %t5 = or i1 %t2, %t4907 ret i1 %t5908}909 910define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(i32 %x) {911; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(912; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15913; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 8914; CHECK-NEXT: ret i1 [[T5]]915;916 %t1 = and i32 %x, 15917 %t2 = icmp eq i32 %t1, 0918 %t3 = and i32 %x, 7919 %t4 = icmp ne i32 %t3, 0920 %t5 = select i1 %t2, i1 true, i1 %t4921 ret i1 %t5922}923 924; ((X & 15) == 0 | (X & 3) != 0) -> !((X & 15) != 0 & (X & 3) == 0) ->925; no change.926define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b(i32 %x) {927; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b(928; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15929; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0930; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3931; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0932; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]933; CHECK-NEXT: ret i1 [[T5]]934;935 %t1 = and i32 %x, 15936 %t2 = icmp eq i32 %t1, 0937 %t3 = and i32 %x, 3938 %t4 = icmp ne i32 %t3, 0939 %t5 = or i1 %t2, %t4940 ret i1 %t5941}942 943define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b_logical(i32 %x) {944; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b_logical(945; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15946; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0947; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3948; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0949; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]950; CHECK-NEXT: ret i1 [[T5]]951;952 %t1 = and i32 %x, 15953 %t2 = icmp eq i32 %t1, 0954 %t3 = and i32 %x, 3955 %t4 = icmp ne i32 %t3, 0956 %t5 = select i1 %t2, i1 true, i1 %t4957 ret i1 %t5958}959 960; ((X & 255) == 0 | (X & 15) != 8) -> !(((X & 255) != 0 & (X & 15) == 8)) ->961; !((X & 15) == 8) -> ((X & 15) != 8)962define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4(i32 %x) {963; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_4(964; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15965; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8966; CHECK-NEXT: ret i1 [[T4]]967;968 %t1 = and i32 %x, 255969 %t2 = icmp eq i32 %t1, 0970 %t3 = and i32 %x, 15971 %t4 = icmp ne i32 %t3, 8972 %t5 = or i1 %t2, %t4973 ret i1 %t5974}975 976define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(i32 %x) {977; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(978; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15979; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8980; CHECK-NEXT: ret i1 [[T4]]981;982 %t1 = and i32 %x, 255983 %t2 = icmp eq i32 %t1, 0984 %t3 = and i32 %x, 15985 %t4 = icmp ne i32 %t3, 8986 %t5 = select i1 %t2, i1 true, i1 %t4987 ret i1 %t5988}989 990; ((X & 15) == 0 | (X & 15) != 8) -> !(((X & 15) != 0 & (X & 15) == 8)) ->991; !((X & 15) == 8) -> ((X & 15) != 8)992define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5(i32 %x) {993; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_5(994; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15995; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8996; CHECK-NEXT: ret i1 [[T4]]997;998 %t1 = and i32 %x, 15999 %t2 = icmp eq i32 %t1, 01000 %t3 = and i32 %x, 151001 %t4 = icmp ne i32 %t3, 81002 %t5 = or i1 %t2, %t41003 ret i1 %t51004}1005 1006define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(i32 %x) {1007; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(1008; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151009; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81010; CHECK-NEXT: ret i1 [[T4]]1011;1012 %t1 = and i32 %x, 151013 %t2 = icmp eq i32 %t1, 01014 %t3 = and i32 %x, 151015 %t4 = icmp ne i32 %t3, 81016 %t5 = select i1 %t2, i1 true, i1 %t41017 ret i1 %t51018}1019 1020; ((X & 12) == 0 | (X & 15) != 8) -> !(((X & 12) != 0 & (X & 15) == 8)) ->1021; !((X & 15) == 8) -> ((X & 15) != 81022define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6(i32 %x) {1023; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_6(1024; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151025; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81026; CHECK-NEXT: ret i1 [[T4]]1027;1028 %t1 = and i32 %x, 121029 %t2 = icmp eq i32 %t1, 01030 %t3 = and i32 %x, 151031 %t4 = icmp ne i32 %t3, 81032 %t5 = or i1 %t2, %t41033 ret i1 %t51034}1035 1036define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(i32 %x) {1037; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(1038; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151039; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81040; CHECK-NEXT: ret i1 [[T4]]1041;1042 %t1 = and i32 %x, 121043 %t2 = icmp eq i32 %t1, 01044 %t3 = and i32 %x, 151045 %t4 = icmp ne i32 %t3, 81046 %t5 = select i1 %t2, i1 true, i1 %t41047 ret i1 %t51048}1049 1050; ((X & 7) == 0 | (X & 15) != 8) -> !(((X & 7) != 0 & (X & 15) == 8)) ->1051; !(false) -> true1052define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7(i32 %x) {1053; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7(1054; CHECK-NEXT: ret i1 true1055;1056 %t1 = and i32 %x, 71057 %t2 = icmp eq i32 %t1, 01058 %t3 = and i32 %x, 151059 %t4 = icmp ne i32 %t3, 81060 %t5 = or i1 %t2, %t41061 ret i1 %t51062}1063 1064define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(i32 %x) {1065; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(1066; CHECK-NEXT: ret i1 true1067;1068 %t1 = and i32 %x, 71069 %t2 = icmp eq i32 %t1, 01070 %t3 = and i32 %x, 151071 %t4 = icmp ne i32 %t3, 81072 %t5 = select i1 %t2, i1 true, i1 %t41073 ret i1 %t51074}1075 1076; ((X & 6) == 0 | (X & 15) != 8) -> !(((X & 6) != 0 & (X & 15) == 8)) ->1077; !(false) -> true1078define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b(i32 %x) {1079; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b(1080; CHECK-NEXT: ret i1 true1081;1082 %t1 = and i32 %x, 61083 %t2 = icmp eq i32 %t1, 01084 %t3 = and i32 %x, 151085 %t4 = icmp ne i32 %t3, 81086 %t5 = or i1 %t2, %t41087 ret i1 %t51088}1089 1090define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(i32 %x) {1091; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(1092; CHECK-NEXT: ret i1 true1093;1094 %t1 = and i32 %x, 61095 %t2 = icmp eq i32 %t1, 01096 %t3 = and i32 %x, 151097 %t4 = icmp ne i32 %t3, 81098 %t5 = select i1 %t2, i1 true, i1 %t41099 ret i1 %t51100}1101 1102 1103; ((X & 12) != 0 & (X & 3) == 1) -> no change1104define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0(i32 %x) {1105; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0(1106; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 121107; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01108; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31109; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 11110; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1111; CHECK-NEXT: ret i1 [[T5]]1112;1113 %t1 = and i32 %x, 121114 %t2 = icmp ne i32 %t1, 01115 %t3 = and i32 %x, 31116 %t4 = icmp eq i32 %t3, 11117 %t5 = and i1 %t4, %t21118 ret i1 %t51119}1120 1121define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0_logical(i32 %x) {1122; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0_logical(1123; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 121124; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01125; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31126; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 11127; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1128; CHECK-NEXT: ret i1 [[T5]]1129;1130 %t1 = and i32 %x, 121131 %t2 = icmp ne i32 %t1, 01132 %t3 = and i32 %x, 31133 %t4 = icmp eq i32 %t3, 11134 %t5 = select i1 %t4, i1 %t2, i1 false1135 ret i1 %t51136}1137 1138; ((X & 12) != 0 & (X & 7) == 1) -> (X & 15) == 91139define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1(i32 %x) {1140; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1(1141; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151142; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 91143; CHECK-NEXT: ret i1 [[T5]]1144;1145 %t1 = and i32 %x, 121146 %t2 = icmp ne i32 %t1, 01147 %t3 = and i32 %x, 71148 %t4 = icmp eq i32 %t3, 11149 %t5 = and i1 %t4, %t21150 ret i1 %t51151}1152 1153define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(i32 %x) {1154; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(1155; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151156; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 91157; CHECK-NEXT: ret i1 [[T5]]1158;1159 %t1 = and i32 %x, 121160 %t2 = icmp ne i32 %t1, 01161 %t3 = and i32 %x, 71162 %t4 = icmp eq i32 %t3, 11163 %t5 = select i1 %t4, i1 %t2, i1 false1164 ret i1 %t51165}1166 1167; ((X & 14) != 0 & (X & 3) == 1) -> no change1168define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b(i32 %x) {1169; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b(1170; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 141171; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01172; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31173; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 11174; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1175; CHECK-NEXT: ret i1 [[T5]]1176;1177 %t1 = and i32 %x, 141178 %t2 = icmp ne i32 %t1, 01179 %t3 = and i32 %x, 31180 %t4 = icmp eq i32 %t3, 11181 %t5 = and i1 %t4, %t21182 ret i1 %t51183}1184 1185define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b_logical(i32 %x) {1186; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b_logical(1187; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 141188; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01189; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31190; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 11191; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1192; CHECK-NEXT: ret i1 [[T5]]1193;1194 %t1 = and i32 %x, 141195 %t2 = icmp ne i32 %t1, 01196 %t3 = and i32 %x, 31197 %t4 = icmp eq i32 %t3, 11198 %t5 = select i1 %t4, i1 %t2, i1 false1199 ret i1 %t51200}1201 1202; ((X & 3) != 0 & (X & 7) == 0) -> false1203define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2(i32 %x) {1204; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2(1205; CHECK-NEXT: ret i1 false1206;1207 %t1 = and i32 %x, 31208 %t2 = icmp ne i32 %t1, 01209 %t3 = and i32 %x, 71210 %t4 = icmp eq i32 %t3, 01211 %t5 = and i1 %t4, %t21212 ret i1 %t51213}1214 1215define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(i32 %x) {1216; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(1217; CHECK-NEXT: ret i1 false1218;1219 %t1 = and i32 %x, 31220 %t2 = icmp ne i32 %t1, 01221 %t3 = and i32 %x, 71222 %t4 = icmp eq i32 %t3, 01223 %t5 = select i1 %t4, i1 %t2, i1 false1224 ret i1 %t51225}1226 1227; ((X & 15) != 0 & (X & 7) == 0) -> (X & 15) == 81228define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3(i32 %x) {1229; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3(1230; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151231; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 81232; CHECK-NEXT: ret i1 [[T5]]1233;1234 %t1 = and i32 %x, 151235 %t2 = icmp ne i32 %t1, 01236 %t3 = and i32 %x, 71237 %t4 = icmp eq i32 %t3, 01238 %t5 = and i1 %t4, %t21239 ret i1 %t51240}1241 1242define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(i32 %x) {1243; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(1244; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151245; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[TMP1]], 81246; CHECK-NEXT: ret i1 [[T5]]1247;1248 %t1 = and i32 %x, 151249 %t2 = icmp ne i32 %t1, 01250 %t3 = and i32 %x, 71251 %t4 = icmp eq i32 %t3, 01252 %t5 = select i1 %t4, i1 %t2, i1 false1253 ret i1 %t51254}1255 1256; ((X & 15) != 0 & (X & 3) == 0) -> no change1257define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b(i32 %x) {1258; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b(1259; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 151260; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01261; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31262; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 01263; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1264; CHECK-NEXT: ret i1 [[T5]]1265;1266 %t1 = and i32 %x, 151267 %t2 = icmp ne i32 %t1, 01268 %t3 = and i32 %x, 31269 %t4 = icmp eq i32 %t3, 01270 %t5 = and i1 %t4, %t21271 ret i1 %t51272}1273 1274define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b_logical(i32 %x) {1275; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b_logical(1276; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 151277; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 01278; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31279; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 01280; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]1281; CHECK-NEXT: ret i1 [[T5]]1282;1283 %t1 = and i32 %x, 151284 %t2 = icmp ne i32 %t1, 01285 %t3 = and i32 %x, 31286 %t4 = icmp eq i32 %t3, 01287 %t5 = select i1 %t4, i1 %t2, i1 false1288 ret i1 %t51289}1290 1291; ((X & 255) != 0 & (X & 15) == 8) -> (X & 15) == 81292define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4(i32 %x) {1293; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4(1294; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151295; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81296; CHECK-NEXT: ret i1 [[T4]]1297;1298 %t1 = and i32 %x, 2551299 %t2 = icmp ne i32 %t1, 01300 %t3 = and i32 %x, 151301 %t4 = icmp eq i32 %t3, 81302 %t5 = and i1 %t4, %t21303 ret i1 %t51304}1305 1306define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(i32 %x) {1307; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(1308; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151309; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81310; CHECK-NEXT: ret i1 [[T4]]1311;1312 %t1 = and i32 %x, 2551313 %t2 = icmp ne i32 %t1, 01314 %t3 = and i32 %x, 151315 %t4 = icmp eq i32 %t3, 81316 %t5 = select i1 %t4, i1 %t2, i1 false1317 ret i1 %t51318}1319 1320; ((X & 15) != 0 & (X & 15) == 8) -> (X & 15) == 81321define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5(i32 %x) {1322; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5(1323; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151324; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81325; CHECK-NEXT: ret i1 [[T4]]1326;1327 %t1 = and i32 %x, 151328 %t2 = icmp ne i32 %t1, 01329 %t3 = and i32 %x, 151330 %t4 = icmp eq i32 %t3, 81331 %t5 = and i1 %t4, %t21332 ret i1 %t51333}1334 1335define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(i32 %x) {1336; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(1337; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151338; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81339; CHECK-NEXT: ret i1 [[T4]]1340;1341 %t1 = and i32 %x, 151342 %t2 = icmp ne i32 %t1, 01343 %t3 = and i32 %x, 151344 %t4 = icmp eq i32 %t3, 81345 %t5 = select i1 %t4, i1 %t2, i1 false1346 ret i1 %t51347}1348 1349; ((X & 12) != 0 & (X & 15) == 8) -> (X & 15) == 81350define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6(i32 %x) {1351; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6(1352; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151353; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81354; CHECK-NEXT: ret i1 [[T4]]1355;1356 %t1 = and i32 %x, 121357 %t2 = icmp ne i32 %t1, 01358 %t3 = and i32 %x, 151359 %t4 = icmp eq i32 %t3, 81360 %t5 = and i1 %t4, %t21361 ret i1 %t51362}1363 1364define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(i32 %x) {1365; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(1366; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151367; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 81368; CHECK-NEXT: ret i1 [[T4]]1369;1370 %t1 = and i32 %x, 121371 %t2 = icmp ne i32 %t1, 01372 %t3 = and i32 %x, 151373 %t4 = icmp eq i32 %t3, 81374 %t5 = select i1 %t4, i1 %t2, i1 false1375 ret i1 %t51376}1377 1378; ((X & 7) != 0 & (X & 15) == 8) -> false1379define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7(i32 %x) {1380; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7(1381; CHECK-NEXT: ret i1 false1382;1383 %t1 = and i32 %x, 71384 %t2 = icmp ne i32 %t1, 01385 %t3 = and i32 %x, 151386 %t4 = icmp eq i32 %t3, 81387 %t5 = and i1 %t4, %t21388 ret i1 %t51389}1390 1391define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(i32 %x) {1392; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(1393; CHECK-NEXT: ret i1 false1394;1395 %t1 = and i32 %x, 71396 %t2 = icmp ne i32 %t1, 01397 %t3 = and i32 %x, 151398 %t4 = icmp eq i32 %t3, 81399 %t5 = select i1 %t4, i1 %t2, i1 false1400 ret i1 %t51401}1402 1403; ((X & 6) != 0 & (X & 15) == 8) -> false1404define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b(i32 %x) {1405; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b(1406; CHECK-NEXT: ret i1 false1407;1408 %t1 = and i32 %x, 61409 %t2 = icmp ne i32 %t1, 01410 %t3 = and i32 %x, 151411 %t4 = icmp eq i32 %t3, 81412 %t5 = and i1 %t4, %t21413 ret i1 %t51414}1415 1416define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(i32 %x) {1417; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(1418; CHECK-NEXT: ret i1 false1419;1420 %t1 = and i32 %x, 61421 %t2 = icmp ne i32 %t1, 01422 %t3 = and i32 %x, 151423 %t4 = icmp eq i32 %t3, 81424 %t5 = select i1 %t4, i1 %t2, i1 false1425 ret i1 %t51426}1427 1428; ((X & 12) == 0 | (X & 3) != 1) -> !((X & 12) != 0 & (X & 3) == 1)) ->1429; no change1430define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0(i32 %x) {1431; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0(1432; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 121433; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01434; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31435; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 11436; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1437; CHECK-NEXT: ret i1 [[T5]]1438;1439 %t1 = and i32 %x, 121440 %t2 = icmp eq i32 %t1, 01441 %t3 = and i32 %x, 31442 %t4 = icmp ne i32 %t3, 11443 %t5 = or i1 %t4, %t21444 ret i1 %t51445}1446 1447define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0_logical(i32 %x) {1448; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0_logical(1449; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 121450; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01451; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31452; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 11453; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1454; CHECK-NEXT: ret i1 [[T5]]1455;1456 %t1 = and i32 %x, 121457 %t2 = icmp eq i32 %t1, 01458 %t3 = and i32 %x, 31459 %t4 = icmp ne i32 %t3, 11460 %t5 = select i1 %t4, i1 true, i1 %t21461 ret i1 %t51462}1463 1464; ((X & 12) == 0 | (X & 7) != 1) -> !((X & 12) != 0 & (X & 7) == 1) ->1465; !((X & 15) == 9) -> (X & 15) != 91466define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1(i32 %x) {1467; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1(1468; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151469; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 91470; CHECK-NEXT: ret i1 [[T5]]1471;1472 %t1 = and i32 %x, 121473 %t2 = icmp eq i32 %t1, 01474 %t3 = and i32 %x, 71475 %t4 = icmp ne i32 %t3, 11476 %t5 = or i1 %t4, %t21477 ret i1 %t51478}1479 1480define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(i32 %x) {1481; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(1482; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151483; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 91484; CHECK-NEXT: ret i1 [[T5]]1485;1486 %t1 = and i32 %x, 121487 %t2 = icmp eq i32 %t1, 01488 %t3 = and i32 %x, 71489 %t4 = icmp ne i32 %t3, 11490 %t5 = select i1 %t4, i1 true, i1 %t21491 ret i1 %t51492}1493 1494; ((X & 14) == 0 | (X & 3) != 1) -> !((X & 14) != 0 & (X & 3) == 1) ->1495; no change.1496define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b(i32 %x) {1497; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b(1498; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 141499; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01500; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31501; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 11502; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1503; CHECK-NEXT: ret i1 [[T5]]1504;1505 %t1 = and i32 %x, 141506 %t2 = icmp eq i32 %t1, 01507 %t3 = and i32 %x, 31508 %t4 = icmp ne i32 %t3, 11509 %t5 = or i1 %t4, %t21510 ret i1 %t51511}1512 1513define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b_logical(i32 %x) {1514; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b_logical(1515; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 141516; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01517; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31518; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 11519; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1520; CHECK-NEXT: ret i1 [[T5]]1521;1522 %t1 = and i32 %x, 141523 %t2 = icmp eq i32 %t1, 01524 %t3 = and i32 %x, 31525 %t4 = icmp ne i32 %t3, 11526 %t5 = select i1 %t4, i1 true, i1 %t21527 ret i1 %t51528}1529 1530; ((X & 3) == 0 | (X & 7) != 0) -> !((X & 3) != 0 & (X & 7) == 0) ->1531; !(false) -> true1532define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2(i32 %x) {1533; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2(1534; CHECK-NEXT: ret i1 true1535;1536 %t1 = and i32 %x, 31537 %t2 = icmp eq i32 %t1, 01538 %t3 = and i32 %x, 71539 %t4 = icmp ne i32 %t3, 01540 %t5 = or i1 %t4, %t21541 ret i1 %t51542}1543 1544define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(i32 %x) {1545; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(1546; CHECK-NEXT: ret i1 true1547;1548 %t1 = and i32 %x, 31549 %t2 = icmp eq i32 %t1, 01550 %t3 = and i32 %x, 71551 %t4 = icmp ne i32 %t3, 01552 %t5 = select i1 %t4, i1 true, i1 %t21553 ret i1 %t51554}1555 1556; ((X & 15) == 0 | (X & 7) != 0) -> !((X & 15) != 0 & (X & 7) == 0) ->1557; !((X & 15) == 8) -> (X & 15) != 81558define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3(i32 %x) {1559; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3(1560; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151561; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 81562; CHECK-NEXT: ret i1 [[T5]]1563;1564 %t1 = and i32 %x, 151565 %t2 = icmp eq i32 %t1, 01566 %t3 = and i32 %x, 71567 %t4 = icmp ne i32 %t3, 01568 %t5 = or i1 %t4, %t21569 ret i1 %t51570}1571 1572define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(i32 %x) {1573; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(1574; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 151575; CHECK-NEXT: [[T5:%.*]] = icmp ne i32 [[TMP1]], 81576; CHECK-NEXT: ret i1 [[T5]]1577;1578 %t1 = and i32 %x, 151579 %t2 = icmp eq i32 %t1, 01580 %t3 = and i32 %x, 71581 %t4 = icmp ne i32 %t3, 01582 %t5 = select i1 %t4, i1 true, i1 %t21583 ret i1 %t51584}1585 1586; ((X & 15) == 0 | (X & 3) != 0) -> !((X & 15) != 0 & (X & 3) == 0) ->1587; no change.1588define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b(i32 %x) {1589; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b(1590; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 151591; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01592; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31593; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 01594; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1595; CHECK-NEXT: ret i1 [[T5]]1596;1597 %t1 = and i32 %x, 151598 %t2 = icmp eq i32 %t1, 01599 %t3 = and i32 %x, 31600 %t4 = icmp ne i32 %t3, 01601 %t5 = or i1 %t4, %t21602 ret i1 %t51603}1604 1605define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b_logical(i32 %x) {1606; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b_logical(1607; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 151608; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 01609; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 31610; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 01611; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]1612; CHECK-NEXT: ret i1 [[T5]]1613;1614 %t1 = and i32 %x, 151615 %t2 = icmp eq i32 %t1, 01616 %t3 = and i32 %x, 31617 %t4 = icmp ne i32 %t3, 01618 %t5 = select i1 %t4, i1 true, i1 %t21619 ret i1 %t51620}1621 1622; ((X & 255) == 0 | (X & 15) != 8) -> !(((X & 255) != 0 & (X & 15) == 8)) ->1623; !((X & 15) == 8) -> ((X & 15) != 8)1624define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4(i32 %x) {1625; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4(1626; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151627; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81628; CHECK-NEXT: ret i1 [[T4]]1629;1630 %t1 = and i32 %x, 2551631 %t2 = icmp eq i32 %t1, 01632 %t3 = and i32 %x, 151633 %t4 = icmp ne i32 %t3, 81634 %t5 = or i1 %t4, %t21635 ret i1 %t51636}1637 1638define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(i32 %x) {1639; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(1640; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151641; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81642; CHECK-NEXT: ret i1 [[T4]]1643;1644 %t1 = and i32 %x, 2551645 %t2 = icmp eq i32 %t1, 01646 %t3 = and i32 %x, 151647 %t4 = icmp ne i32 %t3, 81648 %t5 = select i1 %t4, i1 true, i1 %t21649 ret i1 %t51650}1651 1652; ((X & 15) == 0 | (X & 15) != 8) -> !(((X & 15) != 0 & (X & 15) == 8)) ->1653; !((X & 15) == 8) -> ((X & 15) != 8)1654define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5(i32 %x) {1655; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5(1656; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151657; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81658; CHECK-NEXT: ret i1 [[T4]]1659;1660 %t1 = and i32 %x, 151661 %t2 = icmp eq i32 %t1, 01662 %t3 = and i32 %x, 151663 %t4 = icmp ne i32 %t3, 81664 %t5 = or i1 %t4, %t21665 ret i1 %t51666}1667 1668define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(i32 %x) {1669; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(1670; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151671; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81672; CHECK-NEXT: ret i1 [[T4]]1673;1674 %t1 = and i32 %x, 151675 %t2 = icmp eq i32 %t1, 01676 %t3 = and i32 %x, 151677 %t4 = icmp ne i32 %t3, 81678 %t5 = select i1 %t4, i1 true, i1 %t21679 ret i1 %t51680}1681 1682; ((X & 12) == 0 | (X & 15) != 8) -> !(((X & 12) != 0 & (X & 15) == 8)) ->1683; !((X & 15) == 8) -> ((X & 15) != 81684define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6(i32 %x) {1685; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6(1686; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151687; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81688; CHECK-NEXT: ret i1 [[T4]]1689;1690 %t1 = and i32 %x, 121691 %t2 = icmp eq i32 %t1, 01692 %t3 = and i32 %x, 151693 %t4 = icmp ne i32 %t3, 81694 %t5 = or i1 %t4, %t21695 ret i1 %t51696}1697 1698define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(i32 %x) {1699; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(1700; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 151701; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 81702; CHECK-NEXT: ret i1 [[T4]]1703;1704 %t1 = and i32 %x, 121705 %t2 = icmp eq i32 %t1, 01706 %t3 = and i32 %x, 151707 %t4 = icmp ne i32 %t3, 81708 %t5 = select i1 %t4, i1 true, i1 %t21709 ret i1 %t51710}1711 1712; ((X & 7) == 0 | (X & 15) != 8) -> !(((X & 7) != 0 & (X & 15) == 8)) ->1713; !(false) -> true1714define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7(i32 %x) {1715; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7(1716; CHECK-NEXT: ret i1 true1717;1718 %t1 = and i32 %x, 71719 %t2 = icmp eq i32 %t1, 01720 %t3 = and i32 %x, 151721 %t4 = icmp ne i32 %t3, 81722 %t5 = or i1 %t4, %t21723 ret i1 %t51724}1725 1726define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(i32 %x) {1727; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(1728; CHECK-NEXT: ret i1 true1729;1730 %t1 = and i32 %x, 71731 %t2 = icmp eq i32 %t1, 01732 %t3 = and i32 %x, 151733 %t4 = icmp ne i32 %t3, 81734 %t5 = select i1 %t4, i1 true, i1 %t21735 ret i1 %t51736}1737 1738; ((X & 6) == 0 | (X & 15) != 8) -> !(((X & 6) != 0 & (X & 15) == 8)) ->1739; !(false) -> true1740define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b(i32 %x) {1741; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b(1742; CHECK-NEXT: ret i1 true1743;1744 %t1 = and i32 %x, 61745 %t2 = icmp eq i32 %t1, 01746 %t3 = and i32 %x, 151747 %t4 = icmp ne i32 %t3, 81748 %t5 = or i1 %t4, %t21749 ret i1 %t51750}1751 1752define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(i32 %x) {1753; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(1754; CHECK-NEXT: ret i1 true1755;1756 %t1 = and i32 %x, 61757 %t2 = icmp eq i32 %t1, 01758 %t3 = and i32 %x, 151759 %t4 = icmp ne i32 %t3, 81760 %t5 = select i1 %t4, i1 true, i1 %t21761 ret i1 %t51762}1763 1764 1765define i1 @masked_icmps_bmask_notmixed_or(i32 %A) {1766; CHECK-LABEL: @masked_icmps_bmask_notmixed_or(1767; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 151768; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[TMP1]], 31769; CHECK-NEXT: ret i1 [[RES]]1770;1771 %mask1 = and i32 %A, 15 ; 0x0f1772 %tst1 = icmp eq i32 %mask1, 3 ; 0x031773 %mask2 = and i32 %A, 255 ; 0xff1774 %tst2 = icmp eq i32 %mask2, 243; 0xf31775 %res = or i1 %tst1, %tst21776 ret i1 %res1777}1778 1779define <2 x i1> @masked_icmps_bmask_notmixed_or_vec(<2 x i8> %A) {1780; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec(1781; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 15)1782; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[MASK1]], splat (i8 3)1783; CHECK-NEXT: ret <2 x i1> [[RES]]1784;1785 %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f1786 %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 3> ; 0x031787 %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff1788 %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 243> ; 0xf31789 %res = or <2 x i1> %tst1, %tst21790 ret <2 x i1> %res1791}1792 1793define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison1(<2 x i8> %A) {1794; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison1(1795; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 15)1796; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 poison>1797; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], splat (i8 -13)1798; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]1799; CHECK-NEXT: ret <2 x i1> [[RES]]1800;1801 %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f1802 %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 poison> ; 0x031803 %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff1804 %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 243> ; 0xf31805 %res = or <2 x i1> %tst1, %tst21806 ret <2 x i1> %res1807}1808 1809define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison2(<2 x i8> %A) {1810; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison2(1811; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 15)1812; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], splat (i8 3)1813; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 poison>1814; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]1815; CHECK-NEXT: ret <2 x i1> [[RES]]1816;1817 %mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f1818 %tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 3> ; 0x031819 %mask2 = and <2 x i8> %A, <i8 255, i8 255> ; 0xff1820 %tst2 = icmp eq <2 x i8> %mask2, <i8 243, i8 poison> ; 0xf31821 %res = or <2 x i1> %tst1, %tst21822 ret <2 x i1> %res1823}1824 1825define i1 @masked_icmps_bmask_notmixed_or_contradict_notoptimized(i32 %A) {1826; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_contradict_notoptimized(1827; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 151828; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 31829; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 2551830; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 2421831; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]1832; CHECK-NEXT: ret i1 [[RES]]1833;1834 %mask1 = and i32 %A, 15 ; 0x0f1835 %tst1 = icmp eq i32 %mask1, 3 ; 0x031836 %mask2 = and i32 %A, 255 ; 0xff1837 %tst2 = icmp eq i32 %mask2, 242; 0xf21838 %res = or i1 %tst1, %tst21839 ret i1 %res1840}1841 1842define i1 @masked_icmps_bmask_notmixed_and(i32 %A) {1843; CHECK-LABEL: @masked_icmps_bmask_notmixed_and(1844; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 151845; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[TMP1]], 31846; CHECK-NEXT: ret i1 [[RES]]1847;1848 %mask1 = and i32 %A, 15 ; 0x0f1849 %tst1 = icmp ne i32 %mask1, 3 ; 0x031850 %mask2 = and i32 %A, 255 ; 0xff1851 %tst2 = icmp ne i32 %mask2, 243 ; 0xf31852 %res = and i1 %tst1, %tst21853 ret i1 %res1854}1855 1856define i1 @masked_icmps_bmask_notmixed_and_contradict_notoptimized(i32 %A) {1857; CHECK-LABEL: @masked_icmps_bmask_notmixed_and_contradict_notoptimized(1858; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 151859; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 31860; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 2551861; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 2421862; CHECK-NEXT: [[RES:%.*]] = and i1 [[TST1]], [[TST2]]1863; CHECK-NEXT: ret i1 [[RES]]1864;1865 %mask1 = and i32 %A, 15 ; 0x0f1866 %tst1 = icmp ne i32 %mask1, 3 ; 0x031867 %mask2 = and i32 %A, 255 ; 0xff1868 %tst2 = icmp ne i32 %mask2, 242 ; 0xf21869 %res = and i1 %tst1, %tst21870 ret i1 %res1871}1872 1873define i1 @masked_icmps_bmask_notmixed_and_expected_false(i32 %A) {1874; CHECK-LABEL: @masked_icmps_bmask_notmixed_and_expected_false(1875; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 2551876; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 2421877; CHECK-NEXT: ret i1 [[TST2]]1878;1879 %mask1 = and i32 %A, 3 ; 0x0f1880 %tst1 = icmp ne i32 %mask1, 15 ; 0x031881 %mask2 = and i32 %A, 255 ; 0xff1882 %tst2 = icmp ne i32 %mask2, 242 ; 0xf21883 %res = and i1 %tst1, %tst21884 ret i1 %res1885}1886 1887define i1 @masked_icmps_bmask_notmixed_not_subset_notoptimized(i32 %A) {1888; CHECK-LABEL: @masked_icmps_bmask_notmixed_not_subset_notoptimized(1889; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 2541890; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 2521891; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 2531892; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 2521893; CHECK-NEXT: [[RES:%.*]] = and i1 [[TST1]], [[TST2]]1894; CHECK-NEXT: ret i1 [[RES]]1895;1896 %mask1 = and i32 %A, 254 ; 0xfe1897 %tst1 = icmp ne i32 %mask1, 252 ; 0xfc1898 %mask2 = and i32 %A, 253 ; 0xfd1899 %tst2 = icmp ne i32 %mask2, 252 ; 0xfc1900 %res = and i1 %tst1, %tst21901 ret i1 %res1902}1903 1904define i1 @pr120361(i8 %x, i8 %y) {1905; CHECK-LABEL: @pr120361(1906; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[X:%.*]], -11907; CHECK-NEXT: ret i1 [[CMP1]]1908;1909 %cmp1 = icmp samesign eq i8 %x, -11910 %cmp2 = icmp ne i8 %x, 01911 %result = select i1 %cmp2, i1 %cmp1, i1 false1912 ret i1 %result1913}1914 1915define i1 @pr120361_v2(i32 %x) {1916; CHECK-LABEL: @pr120361_v2(1917; CHECK-NEXT: [[AND2:%.*]] = and i32 [[X:%.*]], -1131918; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[AND2]], 151919; CHECK-NEXT: ret i1 [[CMP2]]1920;1921 %and1 = and i32 %x, 151922 %cmp1 = icmp ne i32 %and1, 01923 %and2 = and i32 %x, -1131924 %cmp2 = icmp samesign eq i32 %and2, 151925 %and = select i1 %cmp1, i1 %cmp2, i1 false1926 ret i1 %and1927}1928