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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i1 @shl_nuw_eq_0(i8 %x, i8 %C) {5; CHECK-LABEL: @shl_nuw_eq_0(6; CHECK-NEXT:    [[Z:%.*]] = icmp eq i8 [[X:%.*]], 07; CHECK-NEXT:    ret i1 [[Z]]8;9  %y = shl nuw i8 %x, %C10  %z = icmp eq i8 %y, 011  ret i1 %z12}13 14define <2 x i1> @shl_nsw_ne_0(<2 x i8> %x, <2 x i8> %C) {15; CHECK-LABEL: @shl_nsw_ne_0(16; CHECK-NEXT:    [[Z:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer17; CHECK-NEXT:    ret <2 x i1> [[Z]]18;19  %y = shl nsw <2 x i8> %x, %C20  %z = icmp ne <2 x i8> %y, zeroinitializer21  ret <2 x i1> %z22}23 24define i1 @shl_eq_0_fail_missing_flags(i8 %x, i8 %C) {25; CHECK-LABEL: @shl_eq_0_fail_missing_flags(26; CHECK-NEXT:    [[Y:%.*]] = shl i8 [[X:%.*]], [[C:%.*]]27; CHECK-NEXT:    [[Z:%.*]] = icmp eq i8 [[Y]], 028; CHECK-NEXT:    ret i1 [[Z]]29;30  %y = shl i8 %x, %C31  %z = icmp eq i8 %y, 032  ret i1 %z33}34 35define i1 @shl_ne_1_fail_nonzero(i8 %x, i8 %C) {36; CHECK-LABEL: @shl_ne_1_fail_nonzero(37; CHECK-NEXT:    [[Y:%.*]] = shl nuw nsw i8 [[X:%.*]], [[C:%.*]]38; CHECK-NEXT:    [[Z:%.*]] = icmp ne i8 [[Y]], 139; CHECK-NEXT:    ret i1 [[Z]]40;41  %y = shl nsw nuw i8 %x, %C42  %z = icmp ne i8 %y, 143  ret i1 %z44}45 46define i1 @shl_nsw_slt_1(i8 %x, i8 %C) {47; CHECK-LABEL: @shl_nsw_slt_1(48; CHECK-NEXT:    [[Z:%.*]] = icmp slt i8 [[X:%.*]], 149; CHECK-NEXT:    ret i1 [[Z]]50;51  %y = shl nsw i8 %x, %C52  %z = icmp slt i8 %y, 153  ret i1 %z54}55 56define <2 x i1> @shl_vec_nsw_slt_1_0_todo_non_splat(<2 x i8> %x, <2 x i8> %C) {57; CHECK-LABEL: @shl_vec_nsw_slt_1_0_todo_non_splat(58; CHECK-NEXT:    [[Y:%.*]] = shl nsw <2 x i8> [[X:%.*]], [[C:%.*]]59; CHECK-NEXT:    [[Z:%.*]] = icmp slt <2 x i8> [[Y]], <i8 1, i8 0>60; CHECK-NEXT:    ret <2 x i1> [[Z]]61;62  %y = shl nsw <2 x i8> %x, %C63  %z = icmp slt <2 x i8> %y, <i8 1, i8 0>64  ret <2 x i1> %z65}66 67define <2 x i1> @shl_nsw_sle_n1(<2 x i8> %x, <2 x i8> %C) {68; CHECK-LABEL: @shl_nsw_sle_n1(69; CHECK-NEXT:    [[Y:%.*]] = shl nsw <2 x i8> [[X:%.*]], [[C:%.*]]70; CHECK-NEXT:    [[Z:%.*]] = icmp slt <2 x i8> [[Y]], splat (i8 2)71; CHECK-NEXT:    ret <2 x i1> [[Z]]72;73  %y = shl nsw <2 x i8> %x, %C74  %z = icmp sle <2 x i8> %y, <i8 1, i8 1>75  ret <2 x i1> %z76}77 78define <2 x i1> @shl_nsw_sge_1(<2 x i8> %x, <2 x i8> %C) {79; CHECK-LABEL: @shl_nsw_sge_1(80; CHECK-NEXT:    [[Z:%.*]] = icmp sgt <2 x i8> [[X:%.*]], zeroinitializer81; CHECK-NEXT:    ret <2 x i1> [[Z]]82;83  %y = shl nsw <2 x i8> %x, %C84  %z = icmp sge <2 x i8> %y, <i8 1, i8 1>85  ret <2 x i1> %z86}87 88define i1 @shl_nsw_sgt_n1(i8 %x, i8 %C) {89; CHECK-LABEL: @shl_nsw_sgt_n1(90; CHECK-NEXT:    [[Z:%.*]] = icmp sgt i8 [[X:%.*]], -191; CHECK-NEXT:    ret i1 [[Z]]92;93  %y = shl nsw i8 %x, %C94  %z = icmp sgt i8 %y, -195  ret i1 %z96}97 98define i1 @shl_nuw_sgt_n1_fail_wrong_flag(i8 %x, i8 %C) {99; CHECK-LABEL: @shl_nuw_sgt_n1_fail_wrong_flag(100; CHECK-NEXT:    [[Y:%.*]] = shl nuw i8 [[X:%.*]], [[C:%.*]]101; CHECK-NEXT:    [[Z:%.*]] = icmp sgt i8 [[Y]], -1102; CHECK-NEXT:    ret i1 [[Z]]103;104  %y = shl nuw i8 %x, %C105  %z = icmp sgt i8 %y, -1106  ret i1 %z107}108 109define i1 @shl_nsw_nuw_ult_Csle0(i8 %x, i8 %C) {110; CHECK-LABEL: @shl_nsw_nuw_ult_Csle0(111; CHECK-NEXT:    [[Z:%.*]] = icmp ult i8 [[X:%.*]], -19112; CHECK-NEXT:    ret i1 [[Z]]113;114  %y = shl nuw nsw i8 %x, %C115  %z = icmp ult i8 %y, -19116  ret i1 %z117}118 119define i1 @shl_nsw_ule_Csle0_fail_missing_flag(i8 %x, i8 %C) {120; CHECK-LABEL: @shl_nsw_ule_Csle0_fail_missing_flag(121; CHECK-NEXT:    [[Y:%.*]] = shl nsw i8 [[X:%.*]], [[C:%.*]]122; CHECK-NEXT:    [[Z:%.*]] = icmp ult i8 [[Y]], -18123; CHECK-NEXT:    ret i1 [[Z]]124;125  %y = shl nsw i8 %x, %C126  %z = icmp ule i8 %y, -19127  ret i1 %z128}129 130define i1 @shl_nsw_nuw_uge_Csle0(i8 %x, i8 %C) {131; CHECK-LABEL: @shl_nsw_nuw_uge_Csle0(132; CHECK-NEXT:    [[Z:%.*]] = icmp ugt i8 [[X:%.*]], -121133; CHECK-NEXT:    ret i1 [[Z]]134;135  %y = shl nuw nsw i8 %x, %C136  %z = icmp uge i8 %y, -120137  ret i1 %z138}139 140define i1 @shl_nuw_ugt_Csle0_fail_missing_flag(i8 %x, i8 %C) {141; CHECK-LABEL: @shl_nuw_ugt_Csle0_fail_missing_flag(142; CHECK-NEXT:    [[Y:%.*]] = shl nuw i8 [[X:%.*]], [[C:%.*]]143; CHECK-NEXT:    [[Z:%.*]] = icmp ugt i8 [[Y]], -19144; CHECK-NEXT:    ret i1 [[Z]]145;146  %y = shl nuw i8 %x, %C147  %z = icmp ugt i8 %y, -19148  ret i1 %z149}150 151define <2 x i1> @shl_nsw_nuw_sgt_Csle0(<2 x i8> %x, <2 x i8> %C) {152; CHECK-LABEL: @shl_nsw_nuw_sgt_Csle0(153; CHECK-NEXT:    [[Z:%.*]] = icmp sgt <2 x i8> [[X:%.*]], splat (i8 -10)154; CHECK-NEXT:    ret <2 x i1> [[Z]]155;156  %y = shl nsw nuw <2 x i8> %x, %C157  %z = icmp sgt <2 x i8> %y, <i8 -10, i8 -10>158  ret <2 x i1> %z159}160 161define <2 x i1> @shl_nsw_nuw_sge_Csle0_todo_non_splat(<2 x i8> %x, <2 x i8> %C) {162; CHECK-LABEL: @shl_nsw_nuw_sge_Csle0_todo_non_splat(163; CHECK-NEXT:    [[Y:%.*]] = shl nuw nsw <2 x i8> [[X:%.*]], [[C:%.*]]164; CHECK-NEXT:    [[Z:%.*]] = icmp sgt <2 x i8> [[Y]], <i8 -11, i8 -66>165; CHECK-NEXT:    ret <2 x i1> [[Z]]166;167  %y = shl nsw nuw <2 x i8> %x, %C168  %z = icmp sge <2 x i8> %y, <i8 -10, i8 -65>169  ret <2 x i1> %z170}171 172define <2 x i1> @shl_nsw_nuw_sle_Csle0(<2 x i8> %x, <2 x i8> %C) {173; CHECK-LABEL: @shl_nsw_nuw_sle_Csle0(174; CHECK-NEXT:    [[Z:%.*]] = icmp slt <2 x i8> [[X:%.*]], splat (i8 -5)175; CHECK-NEXT:    ret <2 x i1> [[Z]]176;177  %y = shl nsw nuw <2 x i8> %x, %C178  %z = icmp sle <2 x i8> %y, <i8 -6, i8 -6>179  ret <2 x i1> %z180}181 182define <2 x i1> @shl_nsw_nuw_slt_Csle0_fail_positive(<2 x i8> %x, <2 x i8> %C) {183; CHECK-LABEL: @shl_nsw_nuw_slt_Csle0_fail_positive(184; CHECK-NEXT:    [[Y:%.*]] = shl nuw nsw <2 x i8> [[X:%.*]], [[C:%.*]]185; CHECK-NEXT:    [[Z:%.*]] = icmp slt <2 x i8> [[Y]], splat (i8 6)186; CHECK-NEXT:    ret <2 x i1> [[Z]]187;188  %y = shl nsw nuw <2 x i8> %x, %C189  %z = icmp slt <2 x i8> %y, <i8 6, i8 6>190  ret <2 x i1> %z191}192