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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"5 6declare void @use(i8)7 8define i1 @lshr_eq_msb_low_last_zero(i8 %a) {9; CHECK-LABEL: @lshr_eq_msb_low_last_zero(10; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[A:%.*]], 611; CHECK-NEXT: ret i1 [[CMP]]12;13 %shr = lshr i8 127, %a14 %cmp = icmp eq i8 %shr, 015 ret i1 %cmp16}17 18define <2 x i1> @lshr_eq_msb_low_last_zero_vec(<2 x i8> %a) {19; CHECK-LABEL: @lshr_eq_msb_low_last_zero_vec(20; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[A:%.*]], splat (i8 6)21; CHECK-NEXT: ret <2 x i1> [[CMP]]22;23 %shr = lshr <2 x i8> <i8 127, i8 127>, %a24 %cmp = icmp eq <2 x i8> %shr, zeroinitializer25 ret <2 x i1> %cmp26}27 28define i1 @ashr_eq_msb_low_second_zero(i8 %a) {29; CHECK-LABEL: @ashr_eq_msb_low_second_zero(30; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[A:%.*]], 631; CHECK-NEXT: ret i1 [[CMP]]32;33 %shr = ashr i8 127, %a34 %cmp = icmp eq i8 %shr, 035 ret i1 %cmp36}37 38define i1 @lshr_ne_msb_low_last_zero(i8 %a) {39; CHECK-LABEL: @lshr_ne_msb_low_last_zero(40; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 741; CHECK-NEXT: ret i1 [[CMP]]42;43 %shr = lshr i8 127, %a44 %cmp = icmp ne i8 %shr, 045 ret i1 %cmp46}47 48define i1 @ashr_ne_msb_low_second_zero(i8 %a) {49; CHECK-LABEL: @ashr_ne_msb_low_second_zero(50; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 751; CHECK-NEXT: ret i1 [[CMP]]52;53 %shr = ashr i8 127, %a54 %cmp = icmp ne i8 %shr, 055 ret i1 %cmp56}57 58define i1 @ashr_eq_both_equal(i8 %a) {59; CHECK-LABEL: @ashr_eq_both_equal(60; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 061; CHECK-NEXT: ret i1 [[CMP]]62;63 %shr = ashr i8 128, %a64 %cmp = icmp eq i8 %shr, 12865 ret i1 %cmp66}67 68define i1 @ashr_ne_both_equal(i8 %a) {69; CHECK-LABEL: @ashr_ne_both_equal(70; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 071; CHECK-NEXT: ret i1 [[CMP]]72;73 %shr = ashr i8 128, %a74 %cmp = icmp ne i8 %shr, 12875 ret i1 %cmp76}77 78define i1 @lshr_eq_both_equal(i8 %a) {79; CHECK-LABEL: @lshr_eq_both_equal(80; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 081; CHECK-NEXT: ret i1 [[CMP]]82;83 %shr = lshr i8 127, %a84 %cmp = icmp eq i8 %shr, 12785 ret i1 %cmp86}87 88define i1 @lshr_ne_both_equal(i8 %a) {89; CHECK-LABEL: @lshr_ne_both_equal(90; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 091; CHECK-NEXT: ret i1 [[CMP]]92;93 %shr = lshr i8 127, %a94 %cmp = icmp ne i8 %shr, 12795 ret i1 %cmp96}97 98define i1 @exact_ashr_eq_both_equal(i8 %a) {99; CHECK-LABEL: @exact_ashr_eq_both_equal(100; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 0101; CHECK-NEXT: ret i1 [[CMP]]102;103 %shr = ashr exact i8 128, %a104 %cmp = icmp eq i8 %shr, 128105 ret i1 %cmp106}107 108define i1 @exact_ashr_ne_both_equal(i8 %a) {109; CHECK-LABEL: @exact_ashr_ne_both_equal(110; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 0111; CHECK-NEXT: ret i1 [[CMP]]112;113 %shr = ashr exact i8 128, %a114 %cmp = icmp ne i8 %shr, 128115 ret i1 %cmp116}117 118define i1 @exact_lshr_eq_both_equal(i8 %a) {119; CHECK-LABEL: @exact_lshr_eq_both_equal(120; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 0121; CHECK-NEXT: ret i1 [[CMP]]122;123 %shr = lshr exact i8 126, %a124 %cmp = icmp eq i8 %shr, 126125 ret i1 %cmp126}127 128define i1 @exact_lshr_ne_both_equal(i8 %a) {129; CHECK-LABEL: @exact_lshr_ne_both_equal(130; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 0131; CHECK-NEXT: ret i1 [[CMP]]132;133 %shr = lshr exact i8 126, %a134 %cmp = icmp ne i8 %shr, 126135 ret i1 %cmp136}137 138define i1 @exact_lshr_eq_opposite_msb(i8 %a) {139; CHECK-LABEL: @exact_lshr_eq_opposite_msb(140; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 7141; CHECK-NEXT: ret i1 [[CMP]]142;143 %shr = lshr exact i8 -128, %a144 %cmp = icmp eq i8 %shr, 1145 ret i1 %cmp146}147 148define i1 @lshr_eq_opposite_msb(i8 %a) {149; CHECK-LABEL: @lshr_eq_opposite_msb(150; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 7151; CHECK-NEXT: ret i1 [[CMP]]152;153 %shr = lshr i8 -128, %a154 %cmp = icmp eq i8 %shr, 1155 ret i1 %cmp156}157 158define i1 @exact_lshr_ne_opposite_msb(i8 %a) {159; CHECK-LABEL: @exact_lshr_ne_opposite_msb(160; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 7161; CHECK-NEXT: ret i1 [[CMP]]162;163 %shr = lshr exact i8 -128, %a164 %cmp = icmp ne i8 %shr, 1165 ret i1 %cmp166}167 168define i1 @lshr_ne_opposite_msb(i8 %a) {169; CHECK-LABEL: @lshr_ne_opposite_msb(170; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 7171; CHECK-NEXT: ret i1 [[CMP]]172;173 %shr = lshr i8 -128, %a174 %cmp = icmp ne i8 %shr, 1175 ret i1 %cmp176}177 178define i1 @exact_ashr_eq(i8 %a) {179; CHECK-LABEL: @exact_ashr_eq(180; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 7181; CHECK-NEXT: ret i1 [[CMP]]182;183 %shr = ashr exact i8 -128, %a184 %cmp = icmp eq i8 %shr, -1185 ret i1 %cmp186}187 188define i1 @exact_ashr_ne(i8 %a) {189; CHECK-LABEL: @exact_ashr_ne(190; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 7191; CHECK-NEXT: ret i1 [[CMP]]192;193 %shr = ashr exact i8 -128, %a194 %cmp = icmp ne i8 %shr, -1195 ret i1 %cmp196}197 198define i1 @exact_lshr_eq(i8 %a) {199; CHECK-LABEL: @exact_lshr_eq(200; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 2201; CHECK-NEXT: ret i1 [[CMP]]202;203 %shr = lshr exact i8 4, %a204 %cmp = icmp eq i8 %shr, 1205 ret i1 %cmp206}207 208define i1 @exact_lshr_ne(i8 %a) {209; CHECK-LABEL: @exact_lshr_ne(210; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 2211; CHECK-NEXT: ret i1 [[CMP]]212;213 %shr = lshr exact i8 4, %a214 %cmp = icmp ne i8 %shr, 1215 ret i1 %cmp216}217 218define i1 @nonexact_ashr_eq(i8 %a) {219; CHECK-LABEL: @nonexact_ashr_eq(220; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 7221; CHECK-NEXT: ret i1 [[CMP]]222;223 %shr = ashr i8 -128, %a224 %cmp = icmp eq i8 %shr, -1225 ret i1 %cmp226}227 228define i1 @nonexact_ashr_ne(i8 %a) {229; CHECK-LABEL: @nonexact_ashr_ne(230; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 7231; CHECK-NEXT: ret i1 [[CMP]]232;233 %shr = ashr i8 -128, %a234 %cmp = icmp ne i8 %shr, -1235 ret i1 %cmp236}237 238define i1 @nonexact_lshr_eq(i8 %a) {239; CHECK-LABEL: @nonexact_lshr_eq(240; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 2241; CHECK-NEXT: ret i1 [[CMP]]242;243 %shr = lshr i8 4, %a244 %cmp = icmp eq i8 %shr, 1245 ret i1 %cmp246}247 248define i1 @nonexact_lshr_ne(i8 %a) {249; CHECK-LABEL: @nonexact_lshr_ne(250; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 2251; CHECK-NEXT: ret i1 [[CMP]]252;253 %shr = lshr i8 4, %a254 %cmp = icmp ne i8 %shr, 1255 ret i1 %cmp256}257 258define i1 @exact_lshr_eq_exactdiv(i8 %a) {259; CHECK-LABEL: @exact_lshr_eq_exactdiv(260; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 4261; CHECK-NEXT: ret i1 [[CMP]]262;263 %shr = lshr exact i8 80, %a264 %cmp = icmp eq i8 %shr, 5265 ret i1 %cmp266}267 268define i1 @exact_lshr_ne_exactdiv(i8 %a) {269; CHECK-LABEL: @exact_lshr_ne_exactdiv(270; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 4271; CHECK-NEXT: ret i1 [[CMP]]272;273 %shr = lshr exact i8 80, %a274 %cmp = icmp ne i8 %shr, 5275 ret i1 %cmp276}277 278define i1 @nonexact_lshr_eq_exactdiv(i8 %a) {279; CHECK-LABEL: @nonexact_lshr_eq_exactdiv(280; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 4281; CHECK-NEXT: ret i1 [[CMP]]282;283 %shr = lshr i8 80, %a284 %cmp = icmp eq i8 %shr, 5285 ret i1 %cmp286}287 288define i1 @nonexact_lshr_ne_exactdiv(i8 %a) {289; CHECK-LABEL: @nonexact_lshr_ne_exactdiv(290; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 4291; CHECK-NEXT: ret i1 [[CMP]]292;293 %shr = lshr i8 80, %a294 %cmp = icmp ne i8 %shr, 5295 ret i1 %cmp296}297 298define i1 @exact_ashr_eq_exactdiv(i8 %a) {299; CHECK-LABEL: @exact_ashr_eq_exactdiv(300; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 4301; CHECK-NEXT: ret i1 [[CMP]]302;303 %shr = ashr exact i8 -80, %a304 %cmp = icmp eq i8 %shr, -5305 ret i1 %cmp306}307 308define i1 @exact_ashr_ne_exactdiv(i8 %a) {309; CHECK-LABEL: @exact_ashr_ne_exactdiv(310; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 4311; CHECK-NEXT: ret i1 [[CMP]]312;313 %shr = ashr exact i8 -80, %a314 %cmp = icmp ne i8 %shr, -5315 ret i1 %cmp316}317 318define i1 @nonexact_ashr_eq_exactdiv(i8 %a) {319; CHECK-LABEL: @nonexact_ashr_eq_exactdiv(320; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 4321; CHECK-NEXT: ret i1 [[CMP]]322;323 %shr = ashr i8 -80, %a324 %cmp = icmp eq i8 %shr, -5325 ret i1 %cmp326}327 328define i1 @nonexact_ashr_ne_exactdiv(i8 %a) {329; CHECK-LABEL: @nonexact_ashr_ne_exactdiv(330; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[A:%.*]], 4331; CHECK-NEXT: ret i1 [[CMP]]332;333 %shr = ashr i8 -80, %a334 %cmp = icmp ne i8 %shr, -5335 ret i1 %cmp336}337 338define i1 @exact_lshr_eq_noexactdiv(i8 %a) {339; CHECK-LABEL: @exact_lshr_eq_noexactdiv(340; CHECK-NEXT: ret i1 false341;342 %shr = lshr exact i8 80, %a343 %cmp = icmp eq i8 %shr, 31344 ret i1 %cmp345}346 347define i1 @exact_lshr_ne_noexactdiv(i8 %a) {348; CHECK-LABEL: @exact_lshr_ne_noexactdiv(349; CHECK-NEXT: ret i1 true350;351 %shr = lshr exact i8 80, %a352 %cmp = icmp ne i8 %shr, 31353 ret i1 %cmp354}355 356define i1 @nonexact_lshr_eq_noexactdiv(i8 %a) {357; CHECK-LABEL: @nonexact_lshr_eq_noexactdiv(358; CHECK-NEXT: ret i1 false359;360 %shr = lshr i8 80, %a361 %cmp = icmp eq i8 %shr, 31362 ret i1 %cmp363}364 365define i1 @nonexact_lshr_ne_noexactdiv(i8 %a) {366; CHECK-LABEL: @nonexact_lshr_ne_noexactdiv(367; CHECK-NEXT: ret i1 true368;369 %shr = lshr i8 80, %a370 %cmp = icmp ne i8 %shr, 31371 ret i1 %cmp372}373 374define i1 @exact_ashr_eq_noexactdiv(i8 %a) {375; CHECK-LABEL: @exact_ashr_eq_noexactdiv(376; CHECK-NEXT: ret i1 false377;378 %shr = ashr exact i8 -80, %a379 %cmp = icmp eq i8 %shr, -31380 ret i1 %cmp381}382 383define i1 @exact_ashr_ne_noexactdiv(i8 %a) {384; CHECK-LABEL: @exact_ashr_ne_noexactdiv(385; CHECK-NEXT: ret i1 true386;387 %shr = ashr exact i8 -80, %a388 %cmp = icmp ne i8 %shr, -31389 ret i1 %cmp390}391 392define i1 @nonexact_ashr_eq_noexactdiv(i8 %a) {393; CHECK-LABEL: @nonexact_ashr_eq_noexactdiv(394; CHECK-NEXT: ret i1 false395;396 %shr = ashr i8 -80, %a397 %cmp = icmp eq i8 %shr, -31398 ret i1 %cmp399}400 401define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {402; CHECK-LABEL: @nonexact_ashr_ne_noexactdiv(403; CHECK-NEXT: ret i1 true404;405 %shr = ashr i8 -80, %a406 %cmp = icmp ne i8 %shr, -31407 ret i1 %cmp408}409 410define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {411; CHECK-LABEL: @nonexact_lshr_eq_noexactlog(412; CHECK-NEXT: ret i1 false413;414 %shr = lshr i8 90, %a415 %cmp = icmp eq i8 %shr, 30416 ret i1 %cmp417}418 419define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {420; CHECK-LABEL: @nonexact_lshr_ne_noexactlog(421; CHECK-NEXT: ret i1 true422;423 %shr = lshr i8 90, %a424 %cmp = icmp ne i8 %shr, 30425 ret i1 %cmp426}427 428define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {429; CHECK-LABEL: @nonexact_ashr_eq_noexactlog(430; CHECK-NEXT: ret i1 false431;432 %shr = ashr i8 -90, %a433 %cmp = icmp eq i8 %shr, -30434 ret i1 %cmp435}436 437define i1 @nonexact_ashr_ne_noexactlog(i8 %a) {438; CHECK-LABEL: @nonexact_ashr_ne_noexactlog(439; CHECK-NEXT: ret i1 true440;441 %shr = ashr i8 -90, %a442 %cmp = icmp ne i8 %shr, -30443 ret i1 %cmp444}445 446; Don't try to fold the entire body of function @PR20945 into a447; single `ret i1 true` statement.448; If %B is equal to 1, then this function would return false.449; As a consequence, the instruction combiner is not allowed to fold %cmp450; to 'true'. Instead, it should replace %cmp with a simpler comparison451; between %B and 1.452 453define i1 @PR20945(i32 %B) {454; CHECK-LABEL: @PR20945(455; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[B:%.*]], 1456; CHECK-NEXT: ret i1 [[CMP]]457;458 %shr = ashr i32 -9, %B459 %cmp = icmp ne i32 %shr, -5460 ret i1 %cmp461}462 463define i1 @PR21222(i32 %B) {464; CHECK-LABEL: @PR21222(465; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B:%.*]], 6466; CHECK-NEXT: ret i1 [[CMP]]467;468 %shr = ashr i32 -93, %B469 %cmp = icmp eq i32 %shr, -2470 ret i1 %cmp471}472 473define i1 @PR24873(i64 %V) {474; CHECK-LABEL: @PR24873(475; CHECK-NEXT: [[ICMP:%.*]] = icmp ugt i64 [[V:%.*]], 61476; CHECK-NEXT: ret i1 [[ICMP]]477;478 %ashr = ashr i64 -4611686018427387904, %V479 %icmp = icmp eq i64 %ashr, -1480 ret i1 %icmp481}482 483declare void @foo(i32)484 485define i1 @exact_multiuse(i32 %x) {486; CHECK-LABEL: @exact_multiuse(487; CHECK-NEXT: [[SH:%.*]] = lshr exact i32 [[X:%.*]], 7488; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 131072489; CHECK-NEXT: call void @foo(i32 [[SH]])490; CHECK-NEXT: ret i1 [[CMP]]491;492 %sh = lshr exact i32 %x, 7493 %cmp = icmp eq i32 %sh, 1024494 call void @foo(i32 %sh)495 ret i1 %cmp496}497 498; PR9343 #1499define i1 @ashr_exact_eq_0(i32 %X, i32 %Y) {500; CHECK-LABEL: @ashr_exact_eq_0(501; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[X:%.*]], 0502; CHECK-NEXT: ret i1 [[B]]503;504 %A = ashr exact i32 %X, %Y505 %B = icmp eq i32 %A, 0506 ret i1 %B507}508 509define i1 @ashr_exact_ne_0_uses(i32 %X, i32 %Y) {510; CHECK-LABEL: @ashr_exact_ne_0_uses(511; CHECK-NEXT: [[A:%.*]] = ashr exact i32 [[X:%.*]], [[Y:%.*]]512; CHECK-NEXT: call void @foo(i32 [[A]])513; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X]], 0514; CHECK-NEXT: ret i1 [[B]]515;516 %A = ashr exact i32 %X, %Y517 call void @foo(i32 %A)518 %B = icmp ne i32 %A, 0519 ret i1 %B520}521 522define <2 x i1> @ashr_exact_eq_0_vec(<2 x i32> %X, <2 x i32> %Y) {523; CHECK-LABEL: @ashr_exact_eq_0_vec(524; CHECK-NEXT: [[B:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer525; CHECK-NEXT: ret <2 x i1> [[B]]526;527 %A = ashr exact <2 x i32> %X, %Y528 %B = icmp eq <2 x i32> %A, zeroinitializer529 ret <2 x i1> %B530}531 532define i1 @lshr_exact_ne_0(i32 %X, i32 %Y) {533; CHECK-LABEL: @lshr_exact_ne_0(534; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0535; CHECK-NEXT: ret i1 [[B]]536;537 %A = lshr exact i32 %X, %Y538 %B = icmp ne i32 %A, 0539 ret i1 %B540}541 542define i1 @lshr_exact_eq_0_uses(i32 %X, i32 %Y) {543; CHECK-LABEL: @lshr_exact_eq_0_uses(544; CHECK-NEXT: [[A:%.*]] = lshr exact i32 [[X:%.*]], [[Y:%.*]]545; CHECK-NEXT: call void @foo(i32 [[A]])546; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[X]], 0547; CHECK-NEXT: ret i1 [[B]]548;549 %A = lshr exact i32 %X, %Y550 call void @foo(i32 %A)551 %B = icmp eq i32 %A, 0552 ret i1 %B553}554 555define <2 x i1> @lshr_exact_ne_0_vec(<2 x i32> %X, <2 x i32> %Y) {556; CHECK-LABEL: @lshr_exact_ne_0_vec(557; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer558; CHECK-NEXT: ret <2 x i1> [[B]]559;560 %A = lshr exact <2 x i32> %X, %Y561 %B = icmp ne <2 x i32> %A, zeroinitializer562 ret <2 x i1> %B563}564 565; Verify conversions of ashr+icmp to a sign-bit test.566 567; negative test, but different transform possible568 569define i1 @ashr_ugt_0(i4 %x) {570; CHECK-LABEL: @ashr_ugt_0(571; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], 1572; CHECK-NEXT: ret i1 [[R]]573;574 %s = ashr i4 %x, 1575 %r = icmp ugt i4 %s, 0 ; 0b0000576 ret i1 %r577}578 579define i1 @ashr_ugt_0_multiuse(i4 %x, ptr %p) {580; CHECK-LABEL: @ashr_ugt_0_multiuse(581; CHECK-NEXT: [[S:%.*]] = ashr i4 [[X:%.*]], 1582; CHECK-NEXT: [[R:%.*]] = icmp ne i4 [[S]], 0583; CHECK-NEXT: store i4 [[S]], ptr [[P:%.*]], align 1584; CHECK-NEXT: ret i1 [[R]]585;586 %s = ashr i4 %x, 1587 %r = icmp ugt i4 %s, 0 ; 0b0000588 store i4 %s, ptr %p589 ret i1 %r590}591 592define i1 @ashr_ugt_1(i4 %x) {593; CHECK-LABEL: @ashr_ugt_1(594; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], 3595; CHECK-NEXT: ret i1 [[R]]596;597 %s = ashr i4 %x, 1598 %r = icmp ugt i4 %s, 1 ; 0b0001599 ret i1 %r600}601 602define i1 @ashr_ugt_2(i4 %x) {603; CHECK-LABEL: @ashr_ugt_2(604; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], 5605; CHECK-NEXT: ret i1 [[R]]606;607 %s = ashr i4 %x, 1608 %r = icmp ugt i4 %s, 2 ; 0b0010609 ret i1 %r610}611 612define i1 @ashr_ugt_3(i4 %x) {613; CHECK-LABEL: @ashr_ugt_3(614; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0615; CHECK-NEXT: ret i1 [[R]]616;617 %s = ashr i4 %x, 1618 %r = icmp ugt i4 %s, 3 ; 0b0011619 ret i1 %r620}621 622define i1 @ashr_ugt_4(i4 %x) {623; CHECK-LABEL: @ashr_ugt_4(624; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0625; CHECK-NEXT: ret i1 [[R]]626;627 %s = ashr i4 %x, 1628 %r = icmp ugt i4 %s, 4 ; 0b0100629 ret i1 %r630}631 632define i1 @ashr_ugt_5(i4 %x) {633; CHECK-LABEL: @ashr_ugt_5(634; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0635; CHECK-NEXT: ret i1 [[R]]636;637 %s = ashr i4 %x, 1638 %r = icmp ugt i4 %s, 5 ; 0b0101639 ret i1 %r640}641 642define i1 @ashr_ugt_6(i4 %x) {643; CHECK-LABEL: @ashr_ugt_6(644; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0645; CHECK-NEXT: ret i1 [[R]]646;647 %s = ashr i4 %x, 1648 %r = icmp ugt i4 %s, 6 ; 0b0110649 ret i1 %r650}651 652define i1 @ashr_ugt_7(i4 %x) {653; CHECK-LABEL: @ashr_ugt_7(654; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0655; CHECK-NEXT: ret i1 [[R]]656;657 %s = ashr i4 %x, 1658 %r = icmp ugt i4 %s, 7 ; 0b0111659 ret i1 %r660}661 662define i1 @ashr_ugt_8(i4 %x) {663; CHECK-LABEL: @ashr_ugt_8(664; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0665; CHECK-NEXT: ret i1 [[R]]666;667 %s = ashr i4 %x, 1668 %r = icmp ugt i4 %s, 8 ; 0b1000669 ret i1 %r670}671 672define i1 @ashr_ugt_9(i4 %x) {673; CHECK-LABEL: @ashr_ugt_9(674; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0675; CHECK-NEXT: ret i1 [[R]]676;677 %s = ashr i4 %x, 1678 %r = icmp ugt i4 %s, 9 ; 0b1001679 ret i1 %r680}681 682define i1 @ashr_ugt_10(i4 %x) {683; CHECK-LABEL: @ashr_ugt_10(684; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0685; CHECK-NEXT: ret i1 [[R]]686;687 %s = ashr i4 %x, 1688 %r = icmp ugt i4 %s, 10 ; 0b1010689 ret i1 %r690}691 692define i1 @ashr_ugt_11(i4 %x) {693; CHECK-LABEL: @ashr_ugt_11(694; CHECK-NEXT: [[R:%.*]] = icmp slt i4 [[X:%.*]], 0695; CHECK-NEXT: ret i1 [[R]]696;697 %s = ashr i4 %x, 1698 %r = icmp ugt i4 %s, 11 ; 0b1011699 ret i1 %r700}701 702define i1 @ashr_ugt_12(i4 %x) {703; CHECK-LABEL: @ashr_ugt_12(704; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], -7705; CHECK-NEXT: ret i1 [[R]]706;707 %s = ashr i4 %x, 1708 %r = icmp ugt i4 %s, 12 ; 0b1100709 ret i1 %r710}711 712define i1 @ashr_ugt_13(i4 %x) {713; CHECK-LABEL: @ashr_ugt_13(714; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], -5715; CHECK-NEXT: ret i1 [[R]]716;717 %s = ashr i4 %x, 1718 %r = icmp ugt i4 %s, 13 ; 0b1101719 ret i1 %r720}721 722; negative test, but different transform possible723 724define i1 @ashr_ugt_14(i4 %x) {725; CHECK-LABEL: @ashr_ugt_14(726; CHECK-NEXT: [[R:%.*]] = icmp ugt i4 [[X:%.*]], -3727; CHECK-NEXT: ret i1 [[R]]728;729 %s = ashr i4 %x, 1730 %r = icmp ugt i4 %s, 14 ; 0b1110731 ret i1 %r732}733 734; negative test, but simplifies735 736define i1 @ashr_ugt_15(i4 %x) {737; CHECK-LABEL: @ashr_ugt_15(738; CHECK-NEXT: ret i1 false739;740 %s = ashr i4 %x, 1741 %r = icmp ugt i4 %s, 15 ; 0b1111742 ret i1 %r743}744 745; negative test, but simplifies746 747define i1 @ashr_ult_0(i4 %x) {748; CHECK-LABEL: @ashr_ult_0(749; CHECK-NEXT: ret i1 false750;751 %s = ashr i4 %x, 1752 %r = icmp ult i4 %s, 0 ; 0b0000753 ret i1 %r754}755 756; negative test, but different transform possible757 758define i1 @ashr_ult_1(i4 %x) {759; CHECK-LABEL: @ashr_ult_1(760; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], 2761; CHECK-NEXT: ret i1 [[R]]762;763 %s = ashr i4 %x, 1764 %r = icmp ult i4 %s, 1 ; 0b0001765 ret i1 %r766}767 768; negative test769 770define i1 @ashr_ult_2(i4 %x) {771; CHECK-LABEL: @ashr_ult_2(772; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], 4773; CHECK-NEXT: ret i1 [[R]]774;775 %s = ashr i4 %x, 1776 %r = icmp ult i4 %s, 2 ; 0b0010777 ret i1 %r778}779 780define i1 @ashr_ult_2_multiuse(i4 %x, ptr %p) {781; CHECK-LABEL: @ashr_ult_2_multiuse(782; CHECK-NEXT: [[S:%.*]] = ashr i4 [[X:%.*]], 1783; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[S]], 2784; CHECK-NEXT: store i4 [[S]], ptr [[P:%.*]], align 1785; CHECK-NEXT: ret i1 [[R]]786;787 %s = ashr i4 %x, 1788 %r = icmp ult i4 %s, 2 ; 0b0010789 store i4 %s, ptr %p790 ret i1 %r791}792 793; negative test794 795define i1 @ashr_ult_3(i4 %x) {796; CHECK-LABEL: @ashr_ult_3(797; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], 6798; CHECK-NEXT: ret i1 [[R]]799;800 %s = ashr i4 %x, 1801 %r = icmp ult i4 %s, 3 ; 0b0011802 ret i1 %r803}804 805define i1 @ashr_ult_4(i4 %x) {806; CHECK-LABEL: @ashr_ult_4(807; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1808; CHECK-NEXT: ret i1 [[R]]809;810 %s = ashr i4 %x, 1811 %r = icmp ult i4 %s, 4 ; 0b0100812 ret i1 %r813}814 815define i1 @ashr_ult_5(i4 %x) {816; CHECK-LABEL: @ashr_ult_5(817; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1818; CHECK-NEXT: ret i1 [[R]]819;820 %s = ashr i4 %x, 1821 %r = icmp ult i4 %s, 5 ; 0b0101822 ret i1 %r823}824 825define i1 @ashr_ult_6(i4 %x) {826; CHECK-LABEL: @ashr_ult_6(827; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1828; CHECK-NEXT: ret i1 [[R]]829;830 %s = ashr i4 %x, 1831 %r = icmp ult i4 %s, 6 ; 0b0110832 ret i1 %r833}834 835define i1 @ashr_ult_7(i4 %x) {836; CHECK-LABEL: @ashr_ult_7(837; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1838; CHECK-NEXT: ret i1 [[R]]839;840 %s = ashr i4 %x, 1841 %r = icmp ult i4 %s, 7 ; 0b0111842 ret i1 %r843}844 845define i1 @ashr_ult_8(i4 %x) {846; CHECK-LABEL: @ashr_ult_8(847; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1848; CHECK-NEXT: ret i1 [[R]]849;850 %s = ashr i4 %x, 1851 %r = icmp ult i4 %s, 8 ; 0b1000852 ret i1 %r853}854 855define i1 @ashr_ult_9(i4 %x) {856; CHECK-LABEL: @ashr_ult_9(857; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1858; CHECK-NEXT: ret i1 [[R]]859;860 %s = ashr i4 %x, 1861 %r = icmp ult i4 %s, 9 ; 0b1001862 ret i1 %r863}864 865define i1 @ashr_ult_10(i4 %x) {866; CHECK-LABEL: @ashr_ult_10(867; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1868; CHECK-NEXT: ret i1 [[R]]869;870 %s = ashr i4 %x, 1871 %r = icmp ult i4 %s, 10 ; 0b1010872 ret i1 %r873}874 875define i1 @ashr_ult_11(i4 %x) {876; CHECK-LABEL: @ashr_ult_11(877; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1878; CHECK-NEXT: ret i1 [[R]]879;880 %s = ashr i4 %x, 1881 %r = icmp ult i4 %s, 11 ; 0b1011882 ret i1 %r883}884 885; negative test886 887define i1 @ashr_ult_12(i4 %x) {888; CHECK-LABEL: @ashr_ult_12(889; CHECK-NEXT: [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1890; CHECK-NEXT: ret i1 [[R]]891;892 %s = ashr i4 %x, 1893 %r = icmp ult i4 %s, 12 ; 0b1100894 ret i1 %r895}896 897; negative test898 899define i1 @ashr_ult_13(i4 %x) {900; CHECK-LABEL: @ashr_ult_13(901; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], -6902; CHECK-NEXT: ret i1 [[R]]903;904 %s = ashr i4 %x, 1905 %r = icmp ult i4 %s, 13 ; 0b1101906 ret i1 %r907}908 909; negative test910 911define i1 @ashr_ult_14(i4 %x) {912; CHECK-LABEL: @ashr_ult_14(913; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], -4914; CHECK-NEXT: ret i1 [[R]]915;916 %s = ashr i4 %x, 1917 %r = icmp ult i4 %s, 14 ; 0b1110918 ret i1 %r919}920 921; negative test, but different transform possible922 923define i1 @ashr_ult_15(i4 %x) {924; CHECK-LABEL: @ashr_ult_15(925; CHECK-NEXT: [[R:%.*]] = icmp ult i4 [[X:%.*]], -2926; CHECK-NEXT: ret i1 [[R]]927;928 %s = ashr i4 %x, 1929 %r = icmp ult i4 %s, 15 ; 0b1111930 ret i1 %r931}932 933define i1 @lshr_eq_0_multiuse(i8 %x) {934; CHECK-LABEL: @lshr_eq_0_multiuse(935; CHECK-NEXT: [[S:%.*]] = lshr i8 [[X:%.*]], 2936; CHECK-NEXT: call void @use(i8 [[S]])937; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[S]], 0938; CHECK-NEXT: ret i1 [[C]]939;940 %s = lshr i8 %x, 2941 call void @use(i8 %s)942 %c = icmp eq i8 %s, 0943 ret i1 %c944}945 946define i1 @lshr_ne_0_multiuse(i8 %x) {947; CHECK-LABEL: @lshr_ne_0_multiuse(948; CHECK-NEXT: [[S:%.*]] = lshr i8 [[X:%.*]], 2949; CHECK-NEXT: call void @use(i8 [[S]])950; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[S]], 0951; CHECK-NEXT: ret i1 [[C]]952;953 %s = lshr i8 %x, 2954 call void @use(i8 %s)955 %c = icmp ne i8 %s, 0956 ret i1 %c957}958 959define i1 @ashr_eq_0_multiuse(i8 %x) {960; CHECK-LABEL: @ashr_eq_0_multiuse(961; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2962; CHECK-NEXT: call void @use(i8 [[S]])963; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[S]], 0964; CHECK-NEXT: ret i1 [[C]]965;966 %s = ashr i8 %x, 2967 call void @use(i8 %s)968 %c = icmp eq i8 %s, 0969 ret i1 %c970}971 972define i1 @ashr_ne_0_multiuse(i8 %x) {973; CHECK-LABEL: @ashr_ne_0_multiuse(974; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2975; CHECK-NEXT: call void @use(i8 [[S]])976; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[S]], 0977; CHECK-NEXT: ret i1 [[C]]978;979 %s = ashr i8 %x, 2980 call void @use(i8 %s)981 %c = icmp ne i8 %s, 0982 ret i1 %c983}984 985define i1 @lshr_eq_0(i8 %x) {986; CHECK-LABEL: @lshr_eq_0(987; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X:%.*]], 4988; CHECK-NEXT: ret i1 [[C]]989;990 %s = lshr i8 %x, 2991 %c = icmp eq i8 %s, 0992 ret i1 %c993}994 995define i1 @lshr_ne_0(i8 %x) {996; CHECK-LABEL: @lshr_ne_0(997; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X:%.*]], 3998; CHECK-NEXT: ret i1 [[C]]999;1000 %s = lshr i8 %x, 21001 %c = icmp ne i8 %s, 01002 ret i1 %c1003}1004 1005define i1 @ashr_eq_0(i8 %x) {1006; CHECK-LABEL: @ashr_eq_0(1007; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X:%.*]], 41008; CHECK-NEXT: ret i1 [[C]]1009;1010 %s = ashr i8 %x, 21011 %c = icmp eq i8 %s, 01012 ret i1 %c1013}1014 1015define i1 @ashr_ne_0(i8 %x) {1016; CHECK-LABEL: @ashr_ne_0(1017; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X:%.*]], 31018; CHECK-NEXT: ret i1 [[C]]1019;1020 %s = ashr i8 %x, 21021 %c = icmp ne i8 %s, 01022 ret i1 %c1023}1024 1025define i1 @lshr_exact_eq_0_multiuse(i8 %x) {1026; CHECK-LABEL: @lshr_exact_eq_0_multiuse(1027; CHECK-NEXT: [[S:%.*]] = lshr exact i8 [[X:%.*]], 21028; CHECK-NEXT: call void @use(i8 [[S]])1029; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[X]], 01030; CHECK-NEXT: ret i1 [[C]]1031;1032 %s = lshr exact i8 %x, 21033 call void @use(i8 %s)1034 %c = icmp eq i8 %s, 01035 ret i1 %c1036}1037 1038define i1 @lshr_exact_ne_0_multiuse(i8 %x) {1039; CHECK-LABEL: @lshr_exact_ne_0_multiuse(1040; CHECK-NEXT: [[S:%.*]] = lshr exact i8 [[X:%.*]], 21041; CHECK-NEXT: call void @use(i8 [[S]])1042; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[X]], 01043; CHECK-NEXT: ret i1 [[C]]1044;1045 %s = lshr exact i8 %x, 21046 call void @use(i8 %s)1047 %c = icmp ne i8 %s, 01048 ret i1 %c1049}1050 1051define i1 @ashr_exact_eq_0_multiuse(i8 %x) {1052; CHECK-LABEL: @ashr_exact_eq_0_multiuse(1053; CHECK-NEXT: [[S:%.*]] = ashr exact i8 [[X:%.*]], 21054; CHECK-NEXT: call void @use(i8 [[S]])1055; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[X]], 01056; CHECK-NEXT: ret i1 [[C]]1057;1058 %s = ashr exact i8 %x, 21059 call void @use(i8 %s)1060 %c = icmp eq i8 %s, 01061 ret i1 %c1062}1063 1064define i1 @ashr_exact_ne_0_multiuse(i8 %x) {1065; CHECK-LABEL: @ashr_exact_ne_0_multiuse(1066; CHECK-NEXT: [[S:%.*]] = ashr exact i8 [[X:%.*]], 21067; CHECK-NEXT: call void @use(i8 [[S]])1068; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[X]], 01069; CHECK-NEXT: ret i1 [[C]]1070;1071 %s = ashr exact i8 %x, 21072 call void @use(i8 %s)1073 %c = icmp ne i8 %s, 01074 ret i1 %c1075}1076 1077define i1 @lshr_pow2_ugt(i8 %x) {1078; CHECK-LABEL: @lshr_pow2_ugt(1079; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X:%.*]], 01080; CHECK-NEXT: ret i1 [[R]]1081;1082 %s = lshr i8 2, %x1083 %r = icmp ugt i8 %s, 11084 ret i1 %r1085}1086 1087define i1 @lshr_pow2_ugt_use(i8 %x) {1088; CHECK-LABEL: @lshr_pow2_ugt_use(1089; CHECK-NEXT: [[S:%.*]] = lshr exact i8 -128, [[X:%.*]]1090; CHECK-NEXT: call void @use(i8 [[S]])1091; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[X]], 51092; CHECK-NEXT: ret i1 [[R]]1093;1094 %s = lshr i8 128, %x1095 call void @use(i8 %s)1096 %r = icmp ugt i8 %s, 51097 ret i1 %r1098}1099 1100define <2 x i1> @lshr_pow2_ugt_vec(<2 x i8> %x) {1101; CHECK-LABEL: @lshr_pow2_ugt_vec(1102; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer1103; CHECK-NEXT: ret <2 x i1> [[R]]1104;1105 %s = lshr <2 x i8> <i8 8, i8 8>, %x1106 %r = icmp ugt <2 x i8> %s, <i8 6, i8 6>1107 ret <2 x i1> %r1108}1109 1110; negative test - need power-of-21111 1112define i1 @lshr_not_pow2_ugt(i8 %x) {1113; CHECK-LABEL: @lshr_not_pow2_ugt(1114; CHECK-NEXT: [[S:%.*]] = lshr i8 3, [[X:%.*]]1115; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i8 [[S]], 11116; CHECK-NEXT: ret i1 [[R]]1117;1118 %s = lshr i8 3, %x1119 %r = icmp ugt i8 %s, 11120 ret i1 %r1121}1122 1123define i1 @lshr_pow2_ugt1(i8 %x) {1124; CHECK-LABEL: @lshr_pow2_ugt1(1125; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[X:%.*]], 71126; CHECK-NEXT: ret i1 [[R]]1127;1128 %s = lshr i8 128, %x1129 %r = icmp ugt i8 %s, 11130 ret i1 %r1131}1132 1133; negative test - need logical shift1134 1135define i1 @ashr_pow2_ugt(i8 %x) {1136; CHECK-LABEL: @ashr_pow2_ugt(1137; CHECK-NEXT: [[S:%.*]] = ashr exact i8 -128, [[X:%.*]]1138; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i8 [[S]], -961139; CHECK-NEXT: ret i1 [[R]]1140;1141 %s = ashr i8 128, %x1142 %r = icmp ugt i8 %s, 1601143 ret i1 %r1144}1145 1146; negative test - need unsigned pred1147 1148define i1 @lshr_pow2_sgt(i8 %x) {1149; CHECK-LABEL: @lshr_pow2_sgt(1150; CHECK-NEXT: [[S:%.*]] = lshr exact i8 -128, [[X:%.*]]1151; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[S]], 31152; CHECK-NEXT: ret i1 [[R]]1153;1154 %s = lshr i8 128, %x1155 %r = icmp sgt i8 %s, 31156 ret i1 %r1157}1158 1159define i1 @lshr_pow2_ult(i8 %x) {1160; CHECK-LABEL: @lshr_pow2_ult(1161; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X:%.*]], 11162; CHECK-NEXT: ret i1 [[R]]1163;1164 %s = lshr i8 4, %x1165 %r = icmp ult i8 %s, 21166 ret i1 %r1167}1168 1169define i1 @lshr_pow2_ult_use(i8 %x) {1170; CHECK-LABEL: @lshr_pow2_ult_use(1171; CHECK-NEXT: [[S:%.*]] = lshr exact i8 -128, [[X:%.*]]1172; CHECK-NEXT: call void @use(i8 [[S]])1173; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X]], 41174; CHECK-NEXT: ret i1 [[R]]1175;1176 %s = lshr i8 128, %x1177 call void @use(i8 %s)1178 %r = icmp ult i8 %s, 51179 ret i1 %r1180}1181 1182define <2 x i1> @lshr_pow2_ult_vec(<2 x i8> %x) {1183; CHECK-LABEL: @lshr_pow2_ult_vec(1184; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer1185; CHECK-NEXT: ret <2 x i1> [[R]]1186;1187 %s = lshr <2 x i8> <i8 8, i8 8>, %x1188 %r = icmp ult <2 x i8> %s, <i8 6, i8 6>1189 ret <2 x i1> %r1190}1191 1192; negative test - need power-of-21193 1194define i1 @lshr_not_pow2_ult(i8 %x) {1195; CHECK-LABEL: @lshr_not_pow2_ult(1196; CHECK-NEXT: [[S:%.*]] = lshr i8 3, [[X:%.*]]1197; CHECK-NEXT: [[R:%.*]] = icmp samesign ult i8 [[S]], 21198; CHECK-NEXT: ret i1 [[R]]1199;1200 %s = lshr i8 3, %x1201 %r = icmp ult i8 %s, 21202 ret i1 %r1203}1204 1205define i1 @lshr_pow2_ult_equal_constants(i32 %x) {1206; CHECK-LABEL: @lshr_pow2_ult_equal_constants(1207; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[X:%.*]], 01208; CHECK-NEXT: ret i1 [[R]]1209;1210 %shr = lshr i32 16, %x1211 %r = icmp ult i32 %shr, 161212 ret i1 %r1213}1214 1215define i1 @lshr_pow2_ult_smin(i8 %x) {1216; CHECK-LABEL: @lshr_pow2_ult_smin(1217; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[X:%.*]], 01218; CHECK-NEXT: ret i1 [[R]]1219;1220 %s = lshr i8 128, %x1221 %r = icmp ult i8 %s, 1281222 ret i1 %r1223}1224 1225; negative test - need logical shift1226 1227define i1 @ashr_pow2_ult(i8 %x) {1228; CHECK-LABEL: @ashr_pow2_ult(1229; CHECK-NEXT: [[S:%.*]] = ashr exact i8 -128, [[X:%.*]]1230; CHECK-NEXT: [[R:%.*]] = icmp samesign ult i8 [[S]], -961231; CHECK-NEXT: ret i1 [[R]]1232;1233 %s = ashr i8 128, %x1234 %r = icmp ult i8 %s, 1601235 ret i1 %r1236}1237 1238; negative test - need unsigned pred1239 1240define i1 @lshr_pow2_slt(i8 %x) {1241; CHECK-LABEL: @lshr_pow2_slt(1242; CHECK-NEXT: [[S:%.*]] = lshr exact i8 -128, [[X:%.*]]1243; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 31244; CHECK-NEXT: ret i1 [[R]]1245;1246 %s = lshr i8 128, %x1247 %r = icmp slt i8 %s, 31248 ret i1 %r1249}1250 1251; (ShiftValC >> X) >s -1 --> X != 0 with ShiftValC < 01252 1253define i1 @lshr_neg_sgt_minus_1(i8 %x) {1254; CHECK-LABEL: @lshr_neg_sgt_minus_1(1255; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[X:%.*]], 01256; CHECK-NEXT: ret i1 [[R]]1257;1258 %s = lshr i8 -17, %x1259 %r = icmp sgt i8 %s, -11260 ret i1 %r1261}1262 1263define <2 x i1> @lshr_neg_sgt_minus_1_vector(<2 x i8> %x) {1264; CHECK-LABEL: @lshr_neg_sgt_minus_1_vector(1265; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer1266; CHECK-NEXT: ret <2 x i1> [[R]]1267;1268 %s = lshr <2 x i8> <i8 -17, i8 -17>, %x1269 %r = icmp sgt <2 x i8> %s, <i8 -1, i8 -1>1270 ret <2 x i1> %r1271}1272 1273define i1 @lshr_neg_sgt_minus_1_extra_use(i8 %x) {1274; CHECK-LABEL: @lshr_neg_sgt_minus_1_extra_use(1275; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1276; CHECK-NEXT: call void @use(i8 [[S]])1277; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[X]], 01278; CHECK-NEXT: ret i1 [[R]]1279;1280 %s = lshr i8 -17, %x1281 call void @use(i8 %s)1282 %r = icmp sgt i8 %s, -11283 ret i1 %r1284}1285 1286; Negative tests1287 1288define i1 @lshr_neg_sgt_minus_2(i8 %x) {1289; CHECK-LABEL: @lshr_neg_sgt_minus_2(1290; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1291; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[S]], -21292; CHECK-NEXT: ret i1 [[R]]1293;1294 %s = lshr i8 -17, %x1295 %r = icmp sgt i8 %s, -21296 ret i1 %r1297}1298 1299define i1 @lshr_neg_slt_minus_1(i8 %x) {1300; CHECK-LABEL: @lshr_neg_slt_minus_1(1301; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1302; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], -11303; CHECK-NEXT: ret i1 [[R]]1304;1305 %s = lshr i8 -17, %x1306 %r = icmp slt i8 %s, -11307 ret i1 %r1308}1309 1310; (ShiftValC >> X) <s 0 --> X == 0 with ShiftValC < 01311 1312define i1 @lshr_neg_slt_zero(i8 %x) {1313; CHECK-LABEL: @lshr_neg_slt_zero(1314; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X:%.*]], 01315; CHECK-NEXT: ret i1 [[R]]1316;1317 %s = lshr i8 -17, %x1318 %r = icmp slt i8 %s, 01319 ret i1 %r1320}1321 1322define <2 x i1> @lshr_neg_slt_zero_vector(<2 x i8> %x) {1323; CHECK-LABEL: @lshr_neg_slt_zero_vector(1324; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[X:%.*]], zeroinitializer1325; CHECK-NEXT: ret <2 x i1> [[R]]1326;1327 %s = lshr <2 x i8> <i8 -17, i8 -17>, %x1328 %r = icmp slt <2 x i8> %s, <i8 0, i8 0>1329 ret <2 x i1> %r1330}1331 1332define i1 @lshr_neg_slt_zero_extra_use(i8 %x) {1333; CHECK-LABEL: @lshr_neg_slt_zero_extra_use(1334; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1335; CHECK-NEXT: call void @use(i8 [[S]])1336; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X]], 01337; CHECK-NEXT: ret i1 [[R]]1338;1339 %s = lshr i8 -17, %x1340 call void @use(i8 %s)1341 %r = icmp slt i8 %s, 01342 ret i1 %r1343}1344 1345; Negative tests1346 1347define i1 @lshr_neg_slt_non-zero(i8 %x) {1348; CHECK-LABEL: @lshr_neg_slt_non-zero(1349; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1350; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[S]], 21351; CHECK-NEXT: ret i1 [[R]]1352;1353 %s = lshr i8 -17, %x1354 %r = icmp slt i8 %s, 21355 ret i1 %r1356}1357 1358define i1 @lshr_neg_sgt_zero(i8 %x) {1359; CHECK-LABEL: @lshr_neg_sgt_zero(1360; CHECK-NEXT: [[S:%.*]] = lshr i8 -17, [[X:%.*]]1361; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[S]], 01362; CHECK-NEXT: ret i1 [[R]]1363;1364 %s = lshr i8 -17, %x1365 %r = icmp sgt i8 %s, 01366 ret i1 %r1367}1368 1369define i1 @exactly_one_set_signbit(i8 %x, i8 %y) {1370; CHECK-LABEL: @exactly_one_set_signbit(1371; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]1372; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 01373; CHECK-NEXT: ret i1 [[TMP2]]1374;1375 %xsign = lshr i8 %x, 71376 %ypos = icmp sgt i8 %y, -11377 %yposz = zext i1 %ypos to i81378 %r = icmp eq i8 %xsign, %yposz1379 ret i1 %r1380}1381 1382define i1 @exactly_one_set_signbit_use1(i8 %x, i8 %y) {1383; CHECK-LABEL: @exactly_one_set_signbit_use1(1384; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 71385; CHECK-NEXT: call void @use(i8 [[XSIGN]])1386; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], [[Y:%.*]]1387; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 01388; CHECK-NEXT: ret i1 [[TMP2]]1389;1390 %xsign = lshr i8 %x, 71391 call void @use(i8 %xsign)1392 %ypos = icmp sgt i8 %y, -11393 %yposz = zext i1 %ypos to i81394 %r = icmp eq i8 %xsign, %yposz1395 ret i1 %r1396}1397 1398define <2 x i1> @same_signbit(<2 x i8> %x, <2 x i8> %y) {1399; CHECK-LABEL: @same_signbit(1400; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]1401; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], splat (i8 -1)1402; CHECK-NEXT: ret <2 x i1> [[R1]]1403;1404 %xsign = lshr <2 x i8> %x, <i8 7, i8 7>1405 %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 -1>1406 %yposz = zext <2 x i1> %ypos to <2 x i8>1407 %r = icmp ne <2 x i8> %xsign, %yposz1408 ret <2 x i1> %r1409}1410 1411define i1 @same_signbit_use2(i8 %x, i8 %y) {1412; CHECK-LABEL: @same_signbit_use2(1413; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11414; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i81415; CHECK-NEXT: call void @use(i8 [[YPOSZ]])1416; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y]]1417; CHECK-NEXT: [[R1:%.*]] = icmp sgt i8 [[TMP1]], -11418; CHECK-NEXT: ret i1 [[R1]]1419;1420 %xsign = lshr i8 %x, 71421 %ypos = icmp sgt i8 %y, -11422 %yposz = zext i1 %ypos to i81423 call void @use(i8 %yposz)1424 %r = icmp ne i8 %xsign, %yposz1425 ret i1 %r1426}1427 1428; negative test1429 1430define i1 @same_signbit_use3(i8 %x, i8 %y) {1431; CHECK-LABEL: @same_signbit_use3(1432; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 71433; CHECK-NEXT: call void @use(i8 [[XSIGN]])1434; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11435; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i81436; CHECK-NEXT: call void @use(i8 [[YPOSZ]])1437; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]1438; CHECK-NEXT: ret i1 [[R]]1439;1440 %xsign = lshr i8 %x, 71441 call void @use(i8 %xsign)1442 %ypos = icmp sgt i8 %y, -11443 %yposz = zext i1 %ypos to i81444 call void @use(i8 %yposz)1445 %r = icmp ne i8 %xsign, %yposz1446 ret i1 %r1447}1448 1449define <2 x i1> @same_signbit_poison_elts(<2 x i8> %x, <2 x i8> %y) {1450; CHECK-LABEL: @same_signbit_poison_elts(1451; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>1452; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer1453; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]1454; CHECK-NEXT: ret <2 x i1> [[R1]]1455;1456 %xsign = lshr <2 x i8> %x, <i8 7, i8 poison>1457 %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 poison>1458 %yposz = zext <2 x i1> %ypos to <2 x i8>1459 %r = icmp ne <2 x i8> %xsign, %yposz1460 ret <2 x i1> %r1461}1462 1463; negative test1464 1465define i1 @same_signbit_wrong_type(i8 %x, i32 %y) {1466; CHECK-LABEL: @same_signbit_wrong_type(1467; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -11468; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 01469; CHECK-NEXT: [[R1:%.*]] = xor i1 [[TMP1]], [[YPOS]]1470; CHECK-NEXT: ret i1 [[R1]]1471;1472 %xsign = lshr i8 %x, 71473 %ypos = icmp sgt i32 %y, -11474 %yposz = zext i1 %ypos to i81475 %r = icmp ne i8 %xsign, %yposz1476 ret i1 %r1477}1478 1479; negative test1480 1481define i1 @exactly_one_set_signbit_wrong_shamt(i8 %x, i8 %y) {1482; CHECK-LABEL: @exactly_one_set_signbit_wrong_shamt(1483; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 61484; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11485; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i81486; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]1487; CHECK-NEXT: ret i1 [[R]]1488;1489 %xsign = lshr i8 %x, 61490 %ypos = icmp sgt i8 %y, -11491 %yposz = zext i1 %ypos to i81492 %r = icmp eq i8 %xsign, %yposz1493 ret i1 %r1494}1495 1496; negative test1497; TODO: This could reduce.1498 1499define i1 @exactly_one_set_signbit_wrong_shr(i8 %x, i8 %y) {1500; CHECK-LABEL: @exactly_one_set_signbit_wrong_shr(1501; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 71502; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11503; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i81504; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]1505; CHECK-NEXT: ret i1 [[R]]1506;1507 %xsign = ashr i8 %x, 71508 %ypos = icmp sgt i8 %y, -11509 %yposz = zext i1 %ypos to i81510 %r = icmp eq i8 %xsign, %yposz1511 ret i1 %r1512}1513 1514; negative test1515; TODO: This could reduce.1516 1517define i1 @exactly_one_set_signbit_wrong_pred(i8 %x, i8 %y) {1518; CHECK-LABEL: @exactly_one_set_signbit_wrong_pred(1519; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y:%.*]], [[X:%.*]]1520; CHECK-NEXT: [[R1:%.*]] = icmp slt i8 [[TMP1]], 01521; CHECK-NEXT: ret i1 [[R1]]1522;1523 %xsign = lshr i8 %x, 71524 %ypos = icmp sgt i8 %y, -11525 %yposz = zext i1 %ypos to i81526 %r = icmp sgt i8 %xsign, %yposz1527 ret i1 %r1528}1529 1530define i1 @exactly_one_set_signbit_signed(i8 %x, i8 %y) {1531; CHECK-LABEL: @exactly_one_set_signbit_signed(1532; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]1533; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 01534; CHECK-NEXT: ret i1 [[TMP2]]1535;1536 %xsign = ashr i8 %x, 71537 %ypos = icmp sgt i8 %y, -11538 %yposz = sext i1 %ypos to i81539 %r = icmp eq i8 %xsign, %yposz1540 ret i1 %r1541}1542 1543define i1 @exactly_one_set_signbit_use1_signed(i8 %x, i8 %y) {1544; CHECK-LABEL: @exactly_one_set_signbit_use1_signed(1545; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 71546; CHECK-NEXT: call void @use(i8 [[XSIGN]])1547; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], [[Y:%.*]]1548; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 01549; CHECK-NEXT: ret i1 [[TMP2]]1550;1551 %xsign = ashr i8 %x, 71552 call void @use(i8 %xsign)1553 %ypos = icmp sgt i8 %y, -11554 %yposz = sext i1 %ypos to i81555 %r = icmp eq i8 %xsign, %yposz1556 ret i1 %r1557}1558 1559define <2 x i1> @same_signbit_signed(<2 x i8> %x, <2 x i8> %y) {1560; CHECK-LABEL: @same_signbit_signed(1561; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]1562; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], splat (i8 -1)1563; CHECK-NEXT: ret <2 x i1> [[R1]]1564;1565 %xsign = ashr <2 x i8> %x, <i8 7, i8 7>1566 %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 -1>1567 %yposz = sext <2 x i1> %ypos to <2 x i8>1568 %r = icmp ne <2 x i8> %xsign, %yposz1569 ret <2 x i1> %r1570}1571 1572define i1 @same_signbit_use2_signed(i8 %x, i8 %y) {1573; CHECK-LABEL: @same_signbit_use2_signed(1574; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11575; CHECK-NEXT: [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i81576; CHECK-NEXT: call void @use(i8 [[YPOSZ]])1577; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y]]1578; CHECK-NEXT: [[R1:%.*]] = icmp sgt i8 [[TMP1]], -11579; CHECK-NEXT: ret i1 [[R1]]1580;1581 %xsign = ashr i8 %x, 71582 %ypos = icmp sgt i8 %y, -11583 %yposz = sext i1 %ypos to i81584 call void @use(i8 %yposz)1585 %r = icmp ne i8 %xsign, %yposz1586 ret i1 %r1587}1588 1589; negative test1590 1591define i1 @same_signbit_use3_signed(i8 %x, i8 %y) {1592; CHECK-LABEL: @same_signbit_use3_signed(1593; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 71594; CHECK-NEXT: call void @use(i8 [[XSIGN]])1595; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11596; CHECK-NEXT: [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i81597; CHECK-NEXT: call void @use(i8 [[YPOSZ]])1598; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]1599; CHECK-NEXT: ret i1 [[R]]1600;1601 %xsign = ashr i8 %x, 71602 call void @use(i8 %xsign)1603 %ypos = icmp sgt i8 %y, -11604 %yposz = sext i1 %ypos to i81605 call void @use(i8 %yposz)1606 %r = icmp ne i8 %xsign, %yposz1607 ret i1 %r1608}1609 1610define <2 x i1> @same_signbit_poison_elts_signed(<2 x i8> %x, <2 x i8> %y) {1611; CHECK-LABEL: @same_signbit_poison_elts_signed(1612; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>1613; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer1614; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]1615; CHECK-NEXT: ret <2 x i1> [[R1]]1616;1617 %xsign = ashr <2 x i8> %x, <i8 7, i8 poison>1618 %ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 poison>1619 %yposz = sext <2 x i1> %ypos to <2 x i8>1620 %r = icmp ne <2 x i8> %xsign, %yposz1621 ret <2 x i1> %r1622}1623 1624; negative test1625 1626define i1 @same_signbit_wrong_type_signed(i8 %x, i32 %y) {1627; CHECK-LABEL: @same_signbit_wrong_type_signed(1628; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -11629; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 01630; CHECK-NEXT: [[R1:%.*]] = xor i1 [[TMP1]], [[YPOS]]1631; CHECK-NEXT: ret i1 [[R1]]1632;1633 %xsign = ashr i8 %x, 71634 %ypos = icmp sgt i32 %y, -11635 %yposz = sext i1 %ypos to i81636 %r = icmp ne i8 %xsign, %yposz1637 ret i1 %r1638}1639 1640; negative test1641 1642define i1 @exactly_one_set_signbit_wrong_shamt_signed(i8 %x, i8 %y) {1643; CHECK-LABEL: @exactly_one_set_signbit_wrong_shamt_signed(1644; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 61645; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -11646; CHECK-NEXT: [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i81647; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[XSIGN]], [[YPOSZ]]1648; CHECK-NEXT: ret i1 [[R]]1649;1650 %xsign = ashr i8 %x, 61651 %ypos = icmp sgt i8 %y, -11652 %yposz = sext i1 %ypos to i81653 %r = icmp eq i8 %xsign, %yposz1654 ret i1 %r1655}1656 1657define i1 @slt_zero_ult_i1(i32 %a, i1 %b) {1658; CHECK-LABEL: @slt_zero_ult_i1(1659; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 01660; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[B:%.*]], true1661; CHECK-NEXT: [[CMP21:%.*]] = and i1 [[TMP1]], [[TMP2]]1662; CHECK-NEXT: ret i1 [[CMP21]]1663;1664 %conv = zext i1 %b to i321665 %cmp1 = lshr i32 %a, 311666 %cmp2 = icmp ult i32 %conv, %cmp11667 ret i1 %cmp21668}1669 1670define i1 @slt_zero_ult_i1_fail1(i32 %a, i1 %b) {1671; CHECK-LABEL: @slt_zero_ult_i1_fail1(1672; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i321673; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 301674; CHECK-NEXT: [[CMP2:%.*]] = icmp samesign ugt i32 [[CMP1]], [[CONV]]1675; CHECK-NEXT: ret i1 [[CMP2]]1676;1677 %conv = zext i1 %b to i321678 %cmp1 = lshr i32 %a, 301679 %cmp2 = icmp ult i32 %conv, %cmp11680 ret i1 %cmp21681}1682 1683define i1 @slt_zero_ult_i1_fail2(i32 %a, i1 %b) {1684; CHECK-LABEL: @slt_zero_ult_i1_fail2(1685; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i321686; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A:%.*]], 311687; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]1688; CHECK-NEXT: ret i1 [[CMP2]]1689;1690 %conv = zext i1 %b to i321691 %cmp1 = ashr i32 %a, 311692 %cmp2 = icmp ult i32 %conv, %cmp11693 ret i1 %cmp21694}1695 1696define i1 @slt_zero_slt_i1_fail(i32 %a, i1 %b) {1697; CHECK-LABEL: @slt_zero_slt_i1_fail(1698; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 01699; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[B:%.*]], true1700; CHECK-NEXT: [[CMP21:%.*]] = and i1 [[TMP1]], [[TMP2]]1701; CHECK-NEXT: ret i1 [[CMP21]]1702;1703 %conv = zext i1 %b to i321704 %cmp1 = lshr i32 %a, 311705 %cmp2 = icmp slt i32 %conv, %cmp11706 ret i1 %cmp21707}1708 1709define i1 @slt_zero_eq_i1_signed(i32 %a, i1 %b) {1710; CHECK-LABEL: @slt_zero_eq_i1_signed(1711; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -11712; CHECK-NEXT: [[CMP21:%.*]] = xor i1 [[TMP1]], [[B:%.*]]1713; CHECK-NEXT: ret i1 [[CMP21]]1714;1715 %conv = sext i1 %b to i321716 %cmp1 = ashr i32 %a, 311717 %cmp2 = icmp eq i32 %conv, %cmp11718 ret i1 %cmp21719}1720 1721define i1 @slt_zero_eq_i1_fail_signed(i32 %a, i1 %b) {1722; CHECK-LABEL: @slt_zero_eq_i1_fail_signed(1723; CHECK-NEXT: [[CONV:%.*]] = sext i1 [[B:%.*]] to i321724; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 311725; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]1726; CHECK-NEXT: ret i1 [[CMP2]]1727;1728 %conv = sext i1 %b to i321729 %cmp1 = lshr i32 %a, 311730 %cmp2 = icmp eq i32 %conv, %cmp11731 ret i1 %cmp21732}1733