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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i1 @icmp_ugt_sremsmin_smin(i32 %x) {5; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smin(6; CHECK-SAME: i32 [[X:%.*]]) {7; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -21474836488; CHECK-NEXT: ret i1 [[C]]9;10 %r = srem i32 %x, -214748364811 %c = icmp ugt i32 %r, -214748364812 ret i1 %c13}14 15define i1 @icmp_ugt_sremsmin_sminp1(i32 %x) {16; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_sminp1(17; CHECK-SAME: i32 [[X:%.*]]) {18; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364819; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -214748364720; CHECK-NEXT: ret i1 [[C]]21;22 %r = srem i32 %x, -214748364823 %c = icmp ugt i32 %r, -214748364724 ret i1 %c25}26 27define i1 @icmp_ugt_sremsmin_smaxm1(i32 %x) {28; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smaxm1(29; CHECK-SAME: i32 [[X:%.*]]) {30; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364831; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 214748364632; CHECK-NEXT: ret i1 [[C]]33;34 %r = srem i32 %x, -214748364835 %c = icmp ugt i32 %r, 214748364636 ret i1 %c37}38 39define i1 @icmp_ugt_sremsmin_smax(i32 %x) {40; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smax(41; CHECK-SAME: i32 [[X:%.*]]) {42; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -214748364843; CHECK-NEXT: ret i1 [[C]]44;45 %r = srem i32 %x, -214748364846 %c = icmp ugt i32 %r, 214748364747 ret i1 %c48}49 50define i1 @icmp_ult_sremsmin_smin(i32 %x) {51; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smin(52; CHECK-SAME: i32 [[X:%.*]]) {53; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364854; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -155; CHECK-NEXT: ret i1 [[C]]56;57 %r = srem i32 %x, -214748364858 %c = icmp ult i32 %r, -214748364859 ret i1 %c60}61 62define i1 @icmp_ult_sremsmin_sminp1(i32 %x) {63; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp1(64; CHECK-SAME: i32 [[X:%.*]]) {65; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364866; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -167; CHECK-NEXT: ret i1 [[C]]68;69 %r = srem i32 %x, -214748364870 %c = icmp ult i32 %r, -214748364771 ret i1 %c72}73 74define i1 @icmp_ult_sremsmin_sminp2(i32 %x) {75; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp2(76; CHECK-SAME: i32 [[X:%.*]]) {77; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364878; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -214748364679; CHECK-NEXT: ret i1 [[C]]80;81 %r = srem i32 %x, -214748364882 %c = icmp ult i32 %r, -214748364683 ret i1 %c84}85 86define i1 @icmp_ult_sremsmin_smax(i32 %x) {87; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smax(88; CHECK-SAME: i32 [[X:%.*]]) {89; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -214748364890; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 214748364791; CHECK-NEXT: ret i1 [[C]]92;93 %r = srem i32 %x, -214748364894 %c = icmp ult i32 %r, 214748364795 ret i1 %c96}97 98define i1 @icmp_ugt_srem5_smin(i32 %x) {99; CHECK-LABEL: define i1 @icmp_ugt_srem5_smin(100; CHECK-SAME: i32 [[X:%.*]]) {101; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5102; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0103; CHECK-NEXT: ret i1 [[C]]104;105 %r = srem i32 %x, 5106 %c = icmp ugt i32 %r, -2147483648107 ret i1 %c108}109 110define i1 @icmp_ugt_srem5_m5(i32 %x) {111; CHECK-LABEL: define i1 @icmp_ugt_srem5_m5(112; CHECK-SAME: i32 [[X:%.*]]) {113; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5114; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0115; CHECK-NEXT: ret i1 [[C]]116;117 %r = srem i32 %x, 5118 %c = icmp ugt i32 %r, -5119 ret i1 %c120}121 122define i1 @icmp_ugt_srem5_m4(i32 %x) {123; CHECK-LABEL: define i1 @icmp_ugt_srem5_m4(124; CHECK-SAME: i32 [[X:%.*]]) {125; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5126; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -4127; CHECK-NEXT: ret i1 [[C]]128;129 %r = srem i32 %x, 5130 %c = icmp ugt i32 %r, -4131 ret i1 %c132}133 134define i1 @icmp_ugt_srem5_3(i32 %x) {135; CHECK-LABEL: define i1 @icmp_ugt_srem5_3(136; CHECK-SAME: i32 [[X:%.*]]) {137; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5138; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 3139; CHECK-NEXT: ret i1 [[C]]140;141 %r = srem i32 %x, 5142 %c = icmp ugt i32 %r, 3143 ret i1 %c144}145 146define i1 @icmp_ugt_srem5_4(i32 %x) {147; CHECK-LABEL: define i1 @icmp_ugt_srem5_4(148; CHECK-SAME: i32 [[X:%.*]]) {149; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5150; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0151; CHECK-NEXT: ret i1 [[C]]152;153 %r = srem i32 %x, 5154 %c = icmp ugt i32 %r, 4155 ret i1 %c156}157 158define i1 @icmp_ugt_srem5_smaxm1(i32 %x) {159; CHECK-LABEL: define i1 @icmp_ugt_srem5_smaxm1(160; CHECK-SAME: i32 [[X:%.*]]) {161; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5162; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0163; CHECK-NEXT: ret i1 [[C]]164;165 %r = srem i32 %x, 5166 %c = icmp ugt i32 %r, 2147483646167 ret i1 %c168}169 170define i1 @icmp_ult_srem5_sminp1(i32 %x) {171; CHECK-LABEL: define i1 @icmp_ult_srem5_sminp1(172; CHECK-SAME: i32 [[X:%.*]]) {173; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5174; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1175; CHECK-NEXT: ret i1 [[C]]176;177 %r = srem i32 %x, 5178 %c = icmp ult i32 %r, -2147483647179 ret i1 %c180}181 182define i1 @icmp_ult_srem5_m4(i32 %x) {183; CHECK-LABEL: define i1 @icmp_ult_srem5_m4(184; CHECK-SAME: i32 [[X:%.*]]) {185; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5186; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1187; CHECK-NEXT: ret i1 [[C]]188;189 %r = srem i32 %x, 5190 %c = icmp ult i32 %r, -4191 ret i1 %c192}193 194define i1 @icmp_ult_srem5_m3(i32 %x) {195; CHECK-LABEL: define i1 @icmp_ult_srem5_m3(196; CHECK-SAME: i32 [[X:%.*]]) {197; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5198; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -3199; CHECK-NEXT: ret i1 [[C]]200;201 %r = srem i32 %x, 5202 %c = icmp ult i32 %r, -3203 ret i1 %c204}205 206define i1 @icmp_ult_srem5_4(i32 %x) {207; CHECK-LABEL: define i1 @icmp_ult_srem5_4(208; CHECK-SAME: i32 [[X:%.*]]) {209; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5210; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 4211; CHECK-NEXT: ret i1 [[C]]212;213 %r = srem i32 %x, 5214 %c = icmp ult i32 %r, 4215 ret i1 %c216}217 218define i1 @icmp_ult_srem5_5(i32 %x) {219; CHECK-LABEL: define i1 @icmp_ult_srem5_5(220; CHECK-SAME: i32 [[X:%.*]]) {221; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5222; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1223; CHECK-NEXT: ret i1 [[C]]224;225 %r = srem i32 %x, 5226 %c = icmp ult i32 %r, 5227 ret i1 %c228}229 230define i1 @icmp_ult_srem5_smax(i32 %x) {231; CHECK-LABEL: define i1 @icmp_ult_srem5_smax(232; CHECK-SAME: i32 [[X:%.*]]) {233; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5234; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1235; CHECK-NEXT: ret i1 [[C]]236;237 %r = srem i32 %x, 5238 %c = icmp ult i32 %r, 2147483647239 ret i1 %c240}241 242define i1 @icmp_ugt_sremsmax_smin(i32 %x) {243; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smin(244; CHECK-SAME: i32 [[X:%.*]]) {245; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647246; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0247; CHECK-NEXT: ret i1 [[C]]248;249 %r = srem i32 %x, 2147483647250 %c = icmp ugt i32 %r, -2147483648251 ret i1 %c252}253 254define i1 @icmp_ugt_sremsmax_sminp1(i32 %x) {255; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp1(256; CHECK-SAME: i32 [[X:%.*]]) {257; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647258; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0259; CHECK-NEXT: ret i1 [[C]]260;261 %r = srem i32 %x, 2147483647262 %c = icmp ugt i32 %r, -2147483647263 ret i1 %c264}265 266define i1 @icmp_ugt_sremsmax_sminp2(i32 %x) {267; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp2(268; CHECK-SAME: i32 [[X:%.*]]) {269; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647270; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -2147483646271; CHECK-NEXT: ret i1 [[C]]272;273 %r = srem i32 %x, 2147483647274 %c = icmp ugt i32 %r, -2147483646275 ret i1 %c276}277 278define i1 @icmp_ugt_sremsmax_smaxm2(i32 %x) {279; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm2(280; CHECK-SAME: i32 [[X:%.*]]) {281; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647282; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 2147483645283; CHECK-NEXT: ret i1 [[C]]284;285 %r = srem i32 %x, 2147483647286 %c = icmp ugt i32 %r, 2147483645287 ret i1 %c288}289 290define i1 @icmp_ugt_sremsmax_smaxm1(i32 %x) {291; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm1(292; CHECK-SAME: i32 [[X:%.*]]) {293; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647294; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0295; CHECK-NEXT: ret i1 [[C]]296;297 %r = srem i32 %x, 2147483647298 %c = icmp ugt i32 %r, 2147483646299 ret i1 %c300}301 302define i1 @icmp_ugt_sremsmax_smax(i32 %x) {303; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smax(304; CHECK-SAME: i32 [[X:%.*]]) {305; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647306; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0307; CHECK-NEXT: ret i1 [[C]]308;309 %r = srem i32 %x, 2147483647310 %c = icmp ugt i32 %r, 2147483647311 ret i1 %c312}313 314define i1 @icmp_ult_sremsmax_smin(i32 %x) {315; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smin(316; CHECK-SAME: i32 [[X:%.*]]) {317; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647318; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1319; CHECK-NEXT: ret i1 [[C]]320;321 %r = srem i32 %x, 2147483647322 %c = icmp ult i32 %r, -2147483648323 ret i1 %c324}325 326define i1 @icmp_ult_sremsmax_sminp1(i32 %x) {327; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp1(328; CHECK-SAME: i32 [[X:%.*]]) {329; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647330; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1331; CHECK-NEXT: ret i1 [[C]]332;333 %r = srem i32 %x, 2147483647334 %c = icmp ult i32 %r, -2147483647335 ret i1 %c336}337 338define i1 @icmp_ult_sremsmax_sminp2(i32 %x) {339; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp2(340; CHECK-SAME: i32 [[X:%.*]]) {341; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647342; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1343; CHECK-NEXT: ret i1 [[C]]344;345 %r = srem i32 %x, 2147483647346 %c = icmp ult i32 %r, -2147483646347 ret i1 %c348}349 350define i1 @icmp_ult_sremsmax_sminp3(i32 %x) {351; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp3(352; CHECK-SAME: i32 [[X:%.*]]) {353; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647354; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -2147483645355; CHECK-NEXT: ret i1 [[C]]356;357 %r = srem i32 %x, 2147483647358 %c = icmp ult i32 %r, -2147483645359 ret i1 %c360}361 362define i1 @icmp_ult_sremsmax_smaxm1(i32 %x) {363; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smaxm1(364; CHECK-SAME: i32 [[X:%.*]]) {365; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647366; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 2147483646367; CHECK-NEXT: ret i1 [[C]]368;369 %r = srem i32 %x, 2147483647370 %c = icmp ult i32 %r, 2147483646371 ret i1 %c372}373 374define i1 @icmp_ult_sremsmax_smax(i32 %x) {375; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smax(376; CHECK-SAME: i32 [[X:%.*]]) {377; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647378; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1379; CHECK-NEXT: ret i1 [[C]]380;381 %r = srem i32 %x, 2147483647382 %c = icmp ult i32 %r, 2147483647383 ret i1 %c384}385