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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; https://bugs.llvm.org/show_bug.cgi?id=387085 6; Pattern:7; (1 << bits) u> val8; Should be transformed into:9; (val l>> bits) == 010 11; ============================================================================ ;12; Basic positive tests13; ============================================================================ ;14 15define i1 @p0(i8 %val, i8 %bits) {16; CHECK-LABEL: @p0(17; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL:%.*]], [[BITS:%.*]]18; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 019; CHECK-NEXT: ret i1 [[R]]20;21 %t0 = shl i8 1, %bits22 %r = icmp ugt i8 %t0, %val23 ret i1 %r24}25 26; ============================================================================ ;27; Vector tests28; ============================================================================ ;29 30define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) {31; CHECK-LABEL: @p1_vec(32; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <2 x i8> [[VAL:%.*]], [[BITS:%.*]]33; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[VAL_HIGHBITS]], zeroinitializer34; CHECK-NEXT: ret <2 x i1> [[R]]35;36 %t0 = shl <2 x i8> <i8 1, i8 1>, %bits37 %r = icmp ugt <2 x i8> %t0, %val38 ret <2 x i1> %r39}40 41define <3 x i1> @p2_vec_poison(<3 x i8> %val, <3 x i8> %bits) {42; CHECK-LABEL: @p2_vec_poison(43; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS:%.*]]44; CHECK-NEXT: [[R:%.*]] = icmp eq <3 x i8> [[VAL_HIGHBITS]], zeroinitializer45; CHECK-NEXT: ret <3 x i1> [[R]]46;47 %t0 = shl <3 x i8> <i8 1, i8 poison, i8 1>, %bits48 %r = icmp ugt <3 x i8> %t0, %val49 ret <3 x i1> %r50}51 52; ============================================================================ ;53; Commutativity tests.54; ============================================================================ ;55 56declare i8 @gen8()57 58define i1 @c0(i8 %bits) {59; CHECK-LABEL: @c0(60; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()61; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL]], [[BITS:%.*]]62; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 063; CHECK-NEXT: ret i1 [[R]]64;65 %t0 = shl i8 1, %bits66 %val = call i8 @gen8()67 %r = icmp ult i8 %val, %t0 ; swapped order and predicate68 ret i1 %r69}70 71; What if we have the same pattern on both sides?72define i1 @both(i8 %bits0, i8 %bits1) {73; CHECK-LABEL: @both(74; CHECK-NEXT: [[T1:%.*]] = shl nuw i8 1, [[BITS1:%.*]]75; CHECK-NEXT: [[T1_HIGHBITS:%.*]] = lshr i8 [[T1]], [[BITS0:%.*]]76; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[T1_HIGHBITS]], 077; CHECK-NEXT: ret i1 [[R]]78;79 %t0 = shl i8 1, %bits080 %t1 = shl i8 1, %bits181 %r = icmp ugt i8 %t0, %t182 ret i1 %r83}84 85; ============================================================================ ;86; One-use tests.87; ============================================================================ ;88 89declare void @use8(i8)90 91define i1 @oneuse0(i8 %val, i8 %bits) {92; CHECK-LABEL: @oneuse0(93; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[BITS:%.*]]94; CHECK-NEXT: call void @use8(i8 [[T0]])95; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]96; CHECK-NEXT: ret i1 [[R]]97;98 %t0 = shl i8 1, %bits99 call void @use8(i8 %t0)100 %r = icmp ugt i8 %t0, %val101 ret i1 %r102}103 104; ============================================================================ ;105; Negative tests106; ============================================================================ ;107 108define i1 @n0(i8 %val, i8 %bits) {109; CHECK-LABEL: @n0(110; CHECK-NEXT: [[T0:%.*]] = shl i8 2, [[BITS:%.*]]111; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[VAL:%.*]]112; CHECK-NEXT: ret i1 [[R]]113;114 %t0 = shl i8 2, %bits ; constant is not 1115 %r = icmp ugt i8 %t0, %val116 ret i1 %r117}118 119define <2 x i1> @n1_vec_nonsplat(<2 x i8> %val, <2 x i8> %bits) {120; CHECK-LABEL: @n1_vec_nonsplat(121; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 2>, [[BITS:%.*]]122; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], [[VAL:%.*]]123; CHECK-NEXT: ret <2 x i1> [[R]]124;125 %t0 = shl <2 x i8> <i8 1, i8 2>, %bits ; again, wrong constant126 %r = icmp ugt <2 x i8> %t0, %val127 ret <2 x i1> %r128}129 130define i1 @n2(i8 %val, i8 %bits) {131; CHECK-LABEL: @n2(132; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[BITS:%.*]]133; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[VAL:%.*]]134; CHECK-NEXT: ret i1 [[R]]135;136 %t0 = shl i8 1, %bits137 %r = icmp uge i8 %t0, %val ; wrong predicate138 ret i1 %r139}140 141define i1 @n3(i8 %bits) {142; CHECK-LABEL: @n3(143; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[BITS:%.*]]144; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()145; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[VAL]], [[T0]]146; CHECK-NEXT: ret i1 [[R]]147;148 %t0 = shl i8 1, %bits149 %val = call i8 @gen8()150 %r = icmp ule i8 %val, %t0 ; swapped order and [wrong] predicate151 ret i1 %r152}153