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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=instcombine -use-constant-int-for-scalable-splat=false -use-constant-fp-for-scalable-splat=false < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CV,LITTLE,LITTLE-CV3; RUN: opt -S -passes=instcombine -use-constant-int-for-scalable-splat -use-constant-fp-for-scalable-splat < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CI,LITTLE,LITTLE-CI4; RUN: opt -S -passes=instcombine -data-layout="E" -use-constant-int-for-scalable-splat=false -use-constant-fp-for-scalable-splat=false < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CV,BIG,BIG-CV5; RUN: opt -S -passes=instcombine -data-layout="E" -use-constant-int-for-scalable-splat -use-constant-fp-for-scalable-splat < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CI,BIG,BIG-CI6 7define i8 @load_smaller_int(ptr %p) {8; LITTLE-LABEL: @load_smaller_int(9; LITTLE-NEXT: store i16 258, ptr [[P:%.*]], align 210; LITTLE-NEXT: ret i8 211;12; BIG-LABEL: @load_smaller_int(13; BIG-NEXT: store i16 258, ptr [[P:%.*]], align 214; BIG-NEXT: ret i8 115;16 store i16 258, ptr %p17 %load = load i8, ptr %p18 ret i8 %load19}20 21; This case can *not* be forwarded, as we only see part of the stored value.22define i32 @load_larger_int(ptr %p) {23; CHECK-LABEL: @load_larger_int(24; CHECK-NEXT: store i16 258, ptr [[P:%.*]], align 225; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 426; CHECK-NEXT: ret i32 [[LOAD]]27;28 store i16 258, ptr %p29 %load = load i32, ptr %p30 ret i32 %load31}32 33define i32 @vec_store_load_first(ptr %p) {34; CHECK-LABEL: @vec_store_load_first(35; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 836; CHECK-NEXT: ret i32 137;38 store <2 x i32> <i32 1, i32 2>, ptr %p39 %load = load i32, ptr %p40 ret i32 %load41}42 43define i17 @vec_store_load_first_odd_size(ptr %p) {44; CHECK-LABEL: @vec_store_load_first_odd_size(45; CHECK-NEXT: store <2 x i17> <i17 1, i17 2>, ptr [[P:%.*]], align 846; CHECK-NEXT: [[LOAD:%.*]] = load i17, ptr [[P]], align 447; CHECK-NEXT: ret i17 [[LOAD]]48;49 store <2 x i17> <i17 1, i17 2>, ptr %p50 %load = load i17, ptr %p51 ret i17 %load52}53 54define i32 @vec_store_load_first_constexpr(ptr %p) {55; CHECK-LABEL: @vec_store_load_first_constexpr(56; CHECK-NEXT: store <2 x i32> bitcast (i64 ptrtoint (ptr @vec_store_load_first to i64) to <2 x i32>), ptr [[P:%.*]], align 857; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 458; CHECK-NEXT: ret i32 [[LOAD]]59;60 store <2 x i32> bitcast (i64 ptrtoint (ptr @vec_store_load_first to i64) to <2 x i32>), ptr %p, align 861 %load = load i32, ptr %p, align 462 ret i32 %load63}64 65define i32 @vec_store_load_second(ptr %p) {66; CHECK-LABEL: @vec_store_load_second(67; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 868; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i64 469; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P3]], align 470; CHECK-NEXT: ret i32 [[LOAD]]71;72 store <2 x i32> <i32 1, i32 2>, ptr %p73 %p3 = getelementptr i32, ptr %p, i64 174 %load = load i32, ptr %p375 ret i32 %load76}77 78define i64 @vec_store_load_whole(ptr %p) {79; LITTLE-LABEL: @vec_store_load_whole(80; LITTLE-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 881; LITTLE-NEXT: ret i64 858993459382;83; BIG-LABEL: @vec_store_load_whole(84; BIG-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 885; BIG-NEXT: ret i64 429496729886;87 store <2 x i32> <i32 1, i32 2>, ptr %p88 %load = load i64, ptr %p89 ret i64 %load90}91 92define i32 @vec_store_load_overlap(ptr %p) {93; CHECK-LABEL: @vec_store_load_overlap(94; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 895; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, ptr [[P]], i64 296; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P4]], align 297; CHECK-NEXT: ret i32 [[LOAD]]98;99 store <2 x i32> <i32 1, i32 2>, ptr %p100 %p4 = getelementptr i8, ptr %p, i64 2101 %load = load i32, ptr %p4, align 2102 ret i32 %load103}104 105define i32 @load_i32_store_nxv4i32(ptr %a) {106; CHECK-CV-LABEL: @load_i32_store_nxv4i32(107; CHECK-CV-NEXT: entry:108; CHECK-CV-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16109; CHECK-CV-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4110; CHECK-CV-NEXT: ret i32 [[TMP0]]111;112; CHECK-CI-LABEL: @load_i32_store_nxv4i32(113; CHECK-CI-NEXT: entry:114; CHECK-CI-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16115; CHECK-CI-NEXT: ret i32 1116;117entry:118 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16119 %0 = load i32, ptr %a, align 4120 ret i32 %0121}122 123define i64 @load_i64_store_nxv8i8(ptr %a) {124; CHECK-LABEL: @load_i64_store_nxv8i8(125; CHECK-NEXT: entry:126; CHECK-NEXT: store <vscale x 8 x i8> splat (i8 1), ptr [[A:%.*]], align 16127; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8128; CHECK-NEXT: ret i64 [[LOAD]]129;130entry:131 store <vscale x 8 x i8> splat (i8 1), ptr %a, align 16132 %load = load i64, ptr %a, align 8133 ret i64 %load134}135 136define i64 @load_i64_store_nxv4i32(ptr %a) {137; CHECK-LABEL: @load_i64_store_nxv4i32(138; CHECK-NEXT: entry:139; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16140; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8141; CHECK-NEXT: ret i64 [[LOAD]]142;143entry:144 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16145 %load = load i64, ptr %a, align 8146 ret i64 %load147}148 149define i8 @load_i8_store_nxv4i32(ptr %a) {150; CHECK-LABEL: @load_i8_store_nxv4i32(151; CHECK-NEXT: entry:152; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16153; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr [[A]], align 1154; CHECK-NEXT: ret i8 [[LOAD]]155;156entry:157 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16158 %load = load i8, ptr %a, align 1159 ret i8 %load160}161 162define float @load_f32_store_nxv4f32(ptr %a) {163; CHECK-CV-LABEL: @load_f32_store_nxv4f32(164; CHECK-CV-NEXT: entry:165; CHECK-CV-NEXT: store <vscale x 4 x float> splat (float 1.000000e+00), ptr [[A:%.*]], align 16166; CHECK-CV-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4167; CHECK-CV-NEXT: ret float [[TMP0]]168;169; CHECK-CI-LABEL: @load_f32_store_nxv4f32(170; CHECK-CI-NEXT: entry:171; CHECK-CI-NEXT: store <vscale x 4 x float> splat (float 1.000000e+00), ptr [[A:%.*]], align 16172; CHECK-CI-NEXT: ret float 1.000000e+00173;174entry:175 store <vscale x 4 x float> splat (float 1.0), ptr %a, align 16176 %0 = load float, ptr %a, align 4177 ret float %0178}179 180define i32 @load_i32_store_nxv4f32(ptr %a) {181; CHECK-CV-LABEL: @load_i32_store_nxv4f32(182; CHECK-CV-NEXT: entry:183; CHECK-CV-NEXT: store <vscale x 4 x float> splat (float 1.000000e+00), ptr [[A:%.*]], align 16184; CHECK-CV-NEXT: [[LOAD:%.*]] = load i32, ptr [[A]], align 4185; CHECK-CV-NEXT: ret i32 [[LOAD]]186;187; CHECK-CI-LABEL: @load_i32_store_nxv4f32(188; CHECK-CI-NEXT: entry:189; CHECK-CI-NEXT: store <vscale x 4 x float> splat (float 1.000000e+00), ptr [[A:%.*]], align 16190; CHECK-CI-NEXT: ret i32 1065353216191;192entry:193 store <vscale x 4 x float> splat (float 1.0), ptr %a, align 16194 %load = load i32, ptr %a, align 4195 ret i32 %load196}197 198define <4 x i32> @load_v4i32_store_nxv4i32(ptr %a) {199; CHECK-LABEL: @load_v4i32_store_nxv4i32(200; CHECK-NEXT: entry:201; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16202; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A]], align 16203; CHECK-NEXT: ret <4 x i32> [[TMP0]]204;205entry:206 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16207 %0 = load <4 x i32>, ptr %a, align 16208 ret <4 x i32> %0209}210 211define <4 x i16> @load_v4i16_store_nxv4i32(ptr %a) {212; CHECK-LABEL: @load_v4i16_store_nxv4i32(213; CHECK-NEXT: entry:214; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16215; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 16216; CHECK-NEXT: ret <4 x i16> [[TMP0]]217;218entry:219 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16220 %0 = load <4 x i16>, ptr %a, align 16221 ret <4 x i16> %0222}223 224; Loaded data type exceeds the known minimum size of the store.225define i64 @load_i64_store_nxv4i8(ptr %a) {226; CHECK-LABEL: @load_i64_store_nxv4i8(227; CHECK-NEXT: entry:228; CHECK-NEXT: store <vscale x 4 x i8> splat (i8 1), ptr [[A:%.*]], align 16229; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8230; CHECK-NEXT: ret i64 [[LOAD]]231;232entry:233 store <vscale x 4 x i8> splat (i8 1), ptr %a, align 16234 %load = load i64, ptr %a, align 8235 ret i64 %load236}237 238; Loaded data size is unknown - we cannot guarantee it won't239; exceed the store size.240define <vscale x 4 x i8> @load_nxv4i8_store_nxv4i32(ptr %a) {241; CHECK-LABEL: @load_nxv4i8_store_nxv4i32(242; CHECK-NEXT: entry:243; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[A:%.*]], align 16244; CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 4 x i8>, ptr [[A]], align 16245; CHECK-NEXT: ret <vscale x 4 x i8> [[TMP0]]246;247entry:248 store <vscale x 4 x i32> splat (i32 1), ptr %a, align 16249 %0 = load <vscale x 4 x i8>, ptr %a, align 16250 ret <vscale x 4 x i8> %0251}252 253define i8 @load_i8_store_i1(ptr %a) {254; CHECK-LABEL: @load_i8_store_i1(255; CHECK-NEXT: store i1 true, ptr [[A:%.*]], align 1256; CHECK-NEXT: [[V:%.*]] = load i8, ptr [[A]], align 1257; CHECK-NEXT: ret i8 [[V]]258;259 store i1 true, ptr %a260 %v = load i8, ptr %a261 ret i8 %v262}263 264define i1 @load_i1_store_i8(ptr %a) {265; CHECK-LABEL: @load_i1_store_i8(266; CHECK-NEXT: store i8 1, ptr [[A:%.*]], align 1267; CHECK-NEXT: ret i1 true268;269 store i8 1, ptr %a270 %v = load i1, ptr %a271 ret i1 %v272}273 274define i32 @load_after_memset_0(ptr %a) {275; CHECK-LABEL: @load_after_memset_0(276; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)277; CHECK-NEXT: ret i32 0278;279 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)280 %v = load i32, ptr %a281 ret i32 %v282}283 284define float @load_after_memset_0_float(ptr %a) {285; CHECK-LABEL: @load_after_memset_0_float(286; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)287; CHECK-NEXT: ret float 0.000000e+00288;289 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)290 %v = load float, ptr %a291 ret float %v292}293 294define i27 @load_after_memset_0_non_byte_sized(ptr %a) {295; CHECK-LABEL: @load_after_memset_0_non_byte_sized(296; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)297; CHECK-NEXT: ret i27 0298;299 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)300 %v = load i27, ptr %a301 ret i27 %v302}303 304define i1 @load_after_memset_0_i1(ptr %a) {305; CHECK-LABEL: @load_after_memset_0_i1(306; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)307; CHECK-NEXT: ret i1 false308;309 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)310 %v = load i1, ptr %a311 ret i1 %v312}313 314define <4 x i8> @load_after_memset_0_vec(ptr %a) {315; CHECK-LABEL: @load_after_memset_0_vec(316; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)317; CHECK-NEXT: ret <4 x i8> zeroinitializer318;319 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)320 %v = load <4 x i8>, ptr %a321 ret <4 x i8> %v322}323 324define i32 @load_after_memset_1(ptr %a) {325; CHECK-LABEL: @load_after_memset_1(326; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)327; CHECK-NEXT: ret i32 16843009328;329 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)330 %v = load i32, ptr %a331 ret i32 %v332}333 334define float @load_after_memset_1_float(ptr %a) {335; CHECK-LABEL: @load_after_memset_1_float(336; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)337; CHECK-NEXT: ret float 0x3820202020000000338;339 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)340 %v = load float, ptr %a341 ret float %v342}343 344define i27 @load_after_memset_1_non_byte_sized(ptr %a) {345; CHECK-LABEL: @load_after_memset_1_non_byte_sized(346; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)347; CHECK-NEXT: ret i27 16843009348;349 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)350 %v = load i27, ptr %a351 ret i27 %v352}353 354define i1 @load_after_memset_1_i1(ptr %a) {355; CHECK-LABEL: @load_after_memset_1_i1(356; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)357; CHECK-NEXT: ret i1 true358;359 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)360 %v = load i1, ptr %a361 ret i1 %v362}363 364define <4 x i8> @load_after_memset_1_vec(ptr %a) {365; CHECK-LABEL: @load_after_memset_1_vec(366; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)367; CHECK-NEXT: ret <4 x i8> splat (i8 1)368;369 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)370 %v = load <4 x i8>, ptr %a371 ret <4 x i8> %v372}373 374define i32 @load_after_memset_unknown(ptr %a, i8 %byte) {375; CHECK-LABEL: @load_after_memset_unknown(376; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 [[BYTE:%.*]], i64 16, i1 false)377; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4378; CHECK-NEXT: ret i32 [[V]]379;380 call void @llvm.memset.p0.i64(ptr %a, i8 %byte, i64 16, i1 false)381 %v = load i32, ptr %a382 ret i32 %v383}384 385define i32 @load_after_memset_0_offset(ptr %a) {386; CHECK-LABEL: @load_after_memset_0_offset(387; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)388; CHECK-NEXT: ret i32 0389;390 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)391 %gep = getelementptr i8, ptr %a, i64 4392 %v = load i32, ptr %gep393 ret i32 %v394}395 396define i32 @load_after_memset_1_offset(ptr %a) {397; CHECK-LABEL: @load_after_memset_1_offset(398; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)399; CHECK-NEXT: ret i32 16843009400;401 call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)402 %gep = getelementptr i8, ptr %a, i64 4403 %v = load i32, ptr %gep404 ret i32 %v405}406 407define i1 @load_after_memset_0_offset_i1(ptr %a) {408; CHECK-LABEL: @load_after_memset_0_offset_i1(409; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)410; CHECK-NEXT: ret i1 false411;412 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)413 %gep = getelementptr i1, ptr %a, i64 12414 %v = load i1, ptr %gep415 ret i1 %v416}417 418define i8 @neg_load_after_memset_0_neg_offset(ptr %a) {419; CHECK-LABEL: @neg_load_after_memset_0_neg_offset(420; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 2421; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[GEP]], i8 0, i64 16, i1 false)422; CHECK-NEXT: [[V:%.*]] = load i8, ptr [[A]], align 1423; CHECK-NEXT: ret i8 [[V]]424;425 %gep = getelementptr i8, ptr %a, i64 2426 call void @llvm.memset.p0.i64(ptr %gep, i8 0, i64 16, i1 false)427 %v = load i8, ptr %a428 ret i8 %v429}430 431define i32 @load_after_memset_0_offset_too_large(ptr %a) {432; CHECK-LABEL: @load_after_memset_0_offset_too_large(433; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)434; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A]], i64 13435; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[GEP]], align 4436; CHECK-NEXT: ret i32 [[V]]437;438 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)439 %gep = getelementptr i8, ptr %a, i64 13440 %v = load i32, ptr %gep441 ret i32 %v442}443 444define i32 @load_after_memset_0_offset_negative(ptr %a) {445; CHECK-LABEL: @load_after_memset_0_offset_negative(446; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)447; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[A]], i64 -1448; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[GEP]], align 4449; CHECK-NEXT: ret i32 [[V]]450;451 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)452 %gep = getelementptr i8, ptr %a, i64 -1453 %v = load i32, ptr %gep454 ret i32 %v455}456 457define i32 @load_after_memset_0_clobber(ptr %a) {458; CHECK-LABEL: @load_after_memset_0_clobber(459; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)460; CHECK-NEXT: store i8 1, ptr [[A]], align 1461; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4462; CHECK-NEXT: ret i32 [[V]]463;464 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)465 store i8 1, ptr %a466 %v = load i32, ptr %a467 ret i32 %v468}469 470define i256 @load_after_memset_0_too_small(ptr %a) {471; CHECK-LABEL: @load_after_memset_0_too_small(472; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)473; CHECK-NEXT: [[V:%.*]] = load i256, ptr [[A]], align 4474; CHECK-NEXT: ret i256 [[V]]475;476 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)477 %v = load i256, ptr %a478 ret i256 %v479}480 481define i129 @load_after_memset_0_too_small_by_one_bit(ptr %a) {482; CHECK-LABEL: @load_after_memset_0_too_small_by_one_bit(483; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)484; CHECK-NEXT: [[V:%.*]] = load i129, ptr [[A]], align 4485; CHECK-NEXT: ret i129 [[V]]486;487 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)488 %v = load i129, ptr %a489 ret i129 %v490}491 492define i32 @load_after_memset_0_unknown_length(ptr %a, i64 %len) {493; CHECK-LABEL: @load_after_memset_0_unknown_length(494; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[A:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)495; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4496; CHECK-NEXT: ret i32 [[V]]497;498 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 %len, i1 false)499 %v = load i32, ptr %a500 ret i32 %v501}502 503define i32 @load_after_memset_0_atomic(ptr %a) {504; CHECK-LABEL: @load_after_memset_0_atomic(505; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)506; CHECK-NEXT: [[V:%.*]] = load atomic i32, ptr [[A]] seq_cst, align 4507; CHECK-NEXT: ret i32 [[V]]508;509 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)510 %v = load atomic i32, ptr %a seq_cst, align 4511 ret i32 %v512}513 514define <vscale x 1 x i32> @load_after_memset_0_scalable(ptr %a) {515; CHECK-LABEL: @load_after_memset_0_scalable(516; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)517; CHECK-NEXT: [[V:%.*]] = load <vscale x 1 x i32>, ptr [[A]], align 4518; CHECK-NEXT: ret <vscale x 1 x i32> [[V]]519;520 call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)521 %v = load <vscale x 1 x i32>, ptr %a522 ret <vscale x 1 x i32> %v523}524 525declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)526;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:527; BIG-CI: {{.*}}528; BIG-CV: {{.*}}529; LITTLE-CI: {{.*}}530; LITTLE-CV: {{.*}}531