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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3;4; Make sure the llvm.access.group meta-data is preserved5; when a memcpy is replaced with a load+store by instcombine6;7; #include <string.h>8; void test(char* out, long size)9; {10; #pragma clang loop vectorize(assume_safety)11; for (long i = 0; i < size; i+=2) {12; memcpy(&(out[i]), &(out[i+size]), 2);13; }14; }15 16define void @_Z4testPcl(ptr %out, i64 %size) {17; CHECK-LABEL: @_Z4testPcl(18; CHECK-NEXT: entry:19; CHECK-NEXT: br label [[FOR_COND:%.*]]20; CHECK: for.cond:21; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD2:%.*]], [[FOR_INC:%.*]] ]22; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_0]], [[SIZE:%.*]]23; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]24; CHECK: for.body:25; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[OUT:%.*]], i64 [[I_0]]26; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[OUT]], i64 [[I_0]]27; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[SIZE]]28; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 1, !llvm.access.group [[ACC_GRP0:![0-9]+]]29; CHECK-NEXT: store i16 [[TMP1]], ptr [[ARRAYIDX]], align 1, !llvm.access.group [[ACC_GRP0]]30; CHECK-NEXT: br label [[FOR_INC]]31; CHECK: for.inc:32; CHECK-NEXT: [[ADD2]] = add nuw nsw i64 [[I_0]], 233; CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP1:![0-9]+]]34; CHECK: for.end:35; CHECK-NEXT: ret void36;37entry:38 br label %for.cond39 40for.cond: ; preds = %for.inc, %entry41 %i.0 = phi i64 [ 0, %entry ], [ %add2, %for.inc ]42 %cmp = icmp slt i64 %i.0, %size43 br i1 %cmp, label %for.body, label %for.end44 45for.body: ; preds = %for.cond46 %arrayidx = getelementptr inbounds i8, ptr %out, i64 %i.047 %add = add nsw i64 %i.0, %size48 %arrayidx1 = getelementptr inbounds i8, ptr %out, i64 %add49 call void @llvm.memcpy.p0.p0.i64(ptr %arrayidx, ptr %arrayidx1, i64 2, i1 false), !llvm.access.group !450 br label %for.inc51 52for.inc: ; preds = %for.body53 %add2 = add nsw i64 %i.0, 254 br label %for.cond, !llvm.loop !255 56for.end: ; preds = %for.cond57 ret void58}59 60declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)61 62!1 = distinct !{!1, !2, !3, !{!"llvm.loop.parallel_accesses", !4}}63!2 = distinct !{!2, !3}64!3 = !{!"llvm.loop.vectorize.enable", i1 true}65!4 = distinct !{} ; access group66